forked from mirror/uv-k5-firmware
231 lines
2.8 KiB
Modula-2
231 lines
2.8 KiB
Modula-2
# Copyright 2023 Dual Tachyon
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# https://github.com/DualTachyon
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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[UART]
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$ = UART_Port_t
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CTRL = 0x0000
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> UARTEN, 0, 1
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= DISABLE, 0
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= ENABLE, 1
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> RXEN, 1, 1
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= DISABLE, 0
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= ENABLE, 1
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> TXEN, 2, 1
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= DISABLE, 0
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= ENABLE, 1
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> RXDMAEN, 3, 1
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= DISABLE, 0
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= ENABLE, 1
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> TXDMAEN, 4, 1
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= DISABLE, 0
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= ENABLE, 1
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> NINEBIT, 5, 1
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= DISABLE, 0
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= ENABLE, 1
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> PAREN, 6, 1
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= DISABLE, 0
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= ENABLE, 1
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BAUD = 0x0004
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TDR = 0x0008
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RDR = 0x000C
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IE = 0x0010
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> TXDONE, 2, 1
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= DISABLE, 0
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= ENABLE, 1
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> PARITYE, 3, 1
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= DISABLE, 0
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= ENABLE, 1
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> STOPE, 4, 1
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= DISABLE, 0
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= ENABLE, 1
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> RXTO, 5, 1
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= DISABLE, 0
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= ENABLE, 1
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> RXFIFO, 6, 1
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= DISABLE, 0
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= ENABLE, 1
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> TXFIFO, 7, 1
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= DISABLE, 0
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= ENABLE, 1
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> RXFIFO_OVF, 8, 1
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= DISABLE, 0
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= ENABLE, 1
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> ABRD_OVF, 9, 1
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= DISABLE, 0
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= ENABLE, 1
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IF = 0x0014
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> TXDONE, 2, 1
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= NOT_SET, 0
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= SET, 1
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> PARITYE, 3, 1
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= NOT_SET, 0
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= SET, 1
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> STOPE, 4, 1
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= NOT_SET, 0
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= SET, 1
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> RXTO, 5, 1
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= NOT_SET, 0
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= SET, 1
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> RXFIFO, 6, 1
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= NOT_SET, 0
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= SET, 1
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> TXFIFO, 7, 1
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= NOT_SET, 0
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= SET, 1
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> RXFIFO_OVF, 8, 1
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= NOT_SET, 0
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= SET, 1
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> ABRD_OVF, 9, 1
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= NOT_SET, 0
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= SET, 1
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> RXFIFO_EMPTY, 10, 1
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= NOT_SET, 0
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= SET, 1
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> RXFIFO_FULL, 11, 1
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= NOT_SET, 0
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= SET, 1
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> RXFIFO_HFULL, 12, 1
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= NOT_SET, 0
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= SET, 1
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> TXFIFO_EMPTY, 13, 1
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= NOT_SET, 0
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= SET, 1
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> TXFIFO_FULL, 14, 1
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= NOT_SET, 0
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= SET, 1
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> TXFIFO_HFULL, 15, 1
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= NOT_SET, 0
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= SET, 1
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> TXBUSY, 16, 1
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= NOT_SET, 0
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= SET, 1
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> RF_LEVEL, 17, 3
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= 0_8_BYTE, 0
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= 1_BYTE, 1
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= 2_BYTE, 2
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= 3_BYTE, 3
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= 4_BYTE, 4
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= 5_BYTE, 5
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= 6_BYTE, 6
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= 7_BYTE, 7
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> TF_LEVEL, 20, 3
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= 0_8_BYTE, 0
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= 1_BYTE, 1
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= 2_BYTE, 2
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= 3_BYTE, 3
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= 4_BYTE, 4
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= 5_BYTE, 5
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= 6_BYTE, 6
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= 7_BYTE, 7
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FIFO = 0x0018
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> RF_LEVEL, 0, 3
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= 1_BYTE, 0
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= 2_BYTE, 1
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= 3_BYTE, 2
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= 4_BYTE, 3
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= 5_BYTE, 4
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= 6_BYTE, 5
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= 7_BYTE, 6
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= 8_BYTE, 7
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> TF_LEVEL, 3, 3
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= 0_BYTE, 0
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= 1_BYTE, 1
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= 2_BYTE, 2
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= 3_BYTE, 3
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= 4_BYTE, 4
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= 5_BYTE, 5
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= 6_BYTE, 6
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= 7_BYTE, 7
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> RF_CLR, 6, 1
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= DISABLE, 0
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= ENABLE, 1
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> TF_CLR, 7, 1
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= DISABLE, 0
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= ENABLE, 1
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FC = 0x001C
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> CTSEN, 0, 1
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= DISABLE, 0
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= ENABLE, 1
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> RTSEN, 1, 1
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= DISABLE, 0
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= ENABLE, 1
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> CTSPOL, 2, 1
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= LOW, 0
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= HIGH, 1
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> RTSPOL, 3, 1
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= LOW, 0
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= HIGH, 1
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> CTS_SIGNAL, 4, 1
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= LOW, 0
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= HIGH, 1
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> RTS_SIGNAL, 5, 1
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= LOW, 0
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= HIGH, 1
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RXTO = 0x0020
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[UART0]
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@ = 0x4006B000, 0x800, $UART
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[UART1]
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@ = 0x4006B800, 0x800, $UART
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[UART2]
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@ = 0x4006C000, 0x800, $UART
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