forked from mirror/uv-k5-firmware
Fixed AES driver, thanks to Manuel.
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parent
118df78df1
commit
768e4362bb
10
driver/aes.c
10
driver/aes.c
@ -24,8 +24,8 @@ static void AES_Setup_ENC_CBC(bool IsDecrypt, const void *pKey, const void *pIv)
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const uint32_t *pK = (const uint32_t *)pKey;
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const uint32_t *pI = (const uint32_t *)pIv;
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AES_CR = (AES_CR & ~AES_CR_EN_MASK) | AES_CR_EN_VALUE_DISABLE;
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AES_CR = AES_CR_CHMOD_VALUE_CBC;
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AES_CR = (AES_CR & ~AES_CR_EN_MASK) | AES_CR_EN_BITS_DISABLE;
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AES_CR = AES_CR_CHMOD_BITS_CBC;
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AES_KEYR3 = pK[0];
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AES_KEYR2 = pK[1];
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AES_KEYR1 = pK[2];
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@ -34,7 +34,7 @@ static void AES_Setup_ENC_CBC(bool IsDecrypt, const void *pKey, const void *pIv)
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AES_IVR2 = pI[1];
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AES_IVR1 = pI[2];
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AES_IVR0 = pI[3];
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AES_CR = (AES_CR & ~AES_CR_EN_MASK) | AES_CR_EN_VALUE_ENABLE;
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AES_CR = (AES_CR & ~AES_CR_EN_MASK) | AES_CR_EN_BITS_ENABLE;
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}
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static void AES_Transform(const void *pIn, void *pOut)
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@ -47,7 +47,7 @@ static void AES_Transform(const void *pIn, void *pOut)
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AES_DINR = pI[2];
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AES_DINR = pI[3];
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while ((AES_SR & AES_SR_CCF_MASK) == AES_SR_CCF_VALUE_NOT_COMPLETE) {
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while ((AES_SR & AES_SR_CCF_MASK) == AES_SR_CCF_BITS_NOT_COMPLETE) {
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}
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pO[0] = AES_DOUTR;
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@ -55,7 +55,7 @@ static void AES_Transform(const void *pIn, void *pOut)
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pO[2] = AES_DOUTR;
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pO[3] = AES_DOUTR;
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AES_CR |= AES_CR_CCFC_VALUE_SET;
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AES_CR |= AES_CR_CCFC_BITS_SET;
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}
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void AES_Encrypt(const void *pKey, const void *pIv, const void *pIn, void *pOut, uint8_t NumBlocks)
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