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Remove support for HPPA (a/k/a PA-RISC) architecture.
This old CPU architecture hasn't been produced in decades, and whatever instances might still survive are surely too underpowered for anyone to consider running Postgres on in production. We'd nonetheless continued to carry code support for it (largely at my insistence), because its unique implementation of spinlocks seemed like a good edge case for our spinlock infrastructure. However, our last buildfarm animal of this type was retired last year, and it seems quite unlikely that another will emerge. Without the ability to run tests, the argument that this is useful test code fails to hold water. Furthermore, carrying code support for an untestable architecture has costs not to be ignored. So, remove HPPA-specific code, in the same vein as commits718aa43a4and92d70b77e. Discussion: https://postgr.es/m/3351991.1697728588@sss.pgh.pa.us
This commit is contained in:
Tom Lane
parent
7967d10c5b
commit
edadeb0710
@ -41,7 +41,7 @@
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#ifdef __i386__
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#define BF_ASM 0 /* 1 */
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#define BF_SCALE 1
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#elif defined(__x86_64__) || defined(__hppa__)
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#elif defined(__x86_64__)
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#define BF_ASM 0
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#define BF_SCALE 1
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#else
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@ -3390,8 +3390,8 @@ export MANPATH
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<para>
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In general, <productname>PostgreSQL</productname> can be expected to work on
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these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS, RISC-V,
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and PA-RISC, including
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these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS,
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and RISC-V, including
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big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
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It is often
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possible to build on an unsupported CPU type by configuring with
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@ -3422,7 +3422,8 @@ export MANPATH
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<para>
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Historical versions of <productname>PostgreSQL</productname> or POSTGRES
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also ran on CPU architectures including Alpha, Itanium, M32R, M68K,
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M88K, NS32K, SuperH, and VAX, and operating systems including 4.3BSD, AIX, BEOS,
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M88K, NS32K, PA-RISC, SuperH, and VAX,
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and operating systems including 4.3BSD, AIX, BEOS,
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BSD/OS, DG/UX, Dynix, HP-UX, IRIX, NeXTSTEP, QNX, SCO, SINIX, Sprite, SunOS,
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Tru64 UNIX, and ULTRIX.
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</para>
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@ -116,12 +116,7 @@ s_lock(volatile slock_t *lock, const char *file, int line, const char *func)
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void
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s_unlock(volatile slock_t *lock)
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{
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#ifdef TAS_ACTIVE_WORD
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/* HP's PA-RISC */
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*TAS_ACTIVE_WORD(lock) = -1;
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#else
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*lock = 0;
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#endif
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}
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#endif
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@ -69,8 +69,6 @@
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#include "port/atomics/arch-x86.h"
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#elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
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#include "port/atomics/arch-ppc.h"
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#elif defined(__hppa) || defined(__hppa__)
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#include "port/atomics/arch-hppa.h"
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#endif
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/*
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@ -1,17 +0,0 @@
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/*-------------------------------------------------------------------------
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*
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* arch-hppa.h
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* Atomic operations considerations specific to HPPA
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*
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* Portions Copyright (c) 1996-2024, PostgreSQL Global Development Group
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* Portions Copyright (c) 1994, Regents of the University of California
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*
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* NOTES:
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*
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* src/include/port/atomics/arch-hppa.h
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*
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*-------------------------------------------------------------------------
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*/
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/* HPPA doesn't do either read or write reordering */
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#define pg_memory_barrier_impl() pg_compiler_barrier_impl()
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@ -75,11 +75,7 @@ typedef struct pg_atomic_flag
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* be content with just one byte instead of 4, but that's not too much
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* waste.
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*/
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#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
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int sema[4];
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#else
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int sema;
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#endif
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volatile bool value;
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} pg_atomic_flag;
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@ -93,11 +89,7 @@ typedef struct pg_atomic_flag
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typedef struct pg_atomic_uint32
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{
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/* Check pg_atomic_flag's definition above for an explanation */
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#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
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int sema[4];
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#else
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int sema;
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#endif
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volatile uint32 value;
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} pg_atomic_uint32;
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@ -111,11 +103,7 @@ typedef struct pg_atomic_uint32
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typedef struct pg_atomic_uint64
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{
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/* Check pg_atomic_flag's definition above for an explanation */
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#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
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int sema[4];
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#else
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int sema;
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#endif
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volatile uint64 value;
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} pg_atomic_uint64;
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@ -526,71 +526,6 @@ do \
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#endif /* __mips__ && !__sgi */
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#if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */
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/*
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* HP's PA-RISC
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*
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* Because LDCWX requires a 16-byte-aligned address, we declare slock_t as a
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* 16-byte struct. The active word in the struct is whichever has the aligned
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* address; the other three words just sit at -1.
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*/
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#define HAS_TEST_AND_SET
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typedef struct
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{
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int sema[4];
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} slock_t;
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#define TAS_ACTIVE_WORD(lock) ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
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static __inline__ int
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tas(volatile slock_t *lock)
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{
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volatile int *lockword = TAS_ACTIVE_WORD(lock);
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int lockval;
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/*
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* The LDCWX instruction atomically clears the target word and
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* returns the previous value. Hence, if the instruction returns
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* 0, someone else has already acquired the lock before we tested
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* it (i.e., we have failed).
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*
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* Notice that this means that we actually clear the word to set
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* the lock and set the word to clear the lock. This is the
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* opposite behavior from the SPARC LDSTUB instruction. For some
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* reason everything that H-P does is rather baroque...
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*
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* For details about the LDCWX instruction, see the "Precision
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* Architecture and Instruction Reference Manual" (09740-90014 of June
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* 1987), p. 5-38.
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*/
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__asm__ __volatile__(
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" ldcwx 0(0,%2),%0 \n"
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: "=r"(lockval), "+m"(*lockword)
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: "r"(lockword)
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: "memory");
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return (lockval == 0);
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}
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#define S_UNLOCK(lock) \
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do { \
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__asm__ __volatile__("" : : : "memory"); \
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*TAS_ACTIVE_WORD(lock) = -1; \
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} while (0)
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#define S_INIT_LOCK(lock) \
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do { \
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volatile slock_t *lock_ = (lock); \
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lock_->sema[0] = -1; \
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lock_->sema[1] = -1; \
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lock_->sema[2] = -1; \
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lock_->sema[3] = -1; \
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} while (0)
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#define S_LOCK_FREE(lock) (*TAS_ACTIVE_WORD(lock) != 0)
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#endif /* __hppa || __hppa__ */
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/*
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* If we have no platform-specific knowledge, but we found that the compiler
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@ -107,12 +107,10 @@ do
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# Likewise, these files are platform-specific, and the one
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# relevant to our platform will be included by atomics.h.
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test "$f" = src/include/port/atomics/arch-arm.h && continue
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test "$f" = src/include/port/atomics/arch-hppa.h && continue
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test "$f" = src/include/port/atomics/arch-ppc.h && continue
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test "$f" = src/include/port/atomics/arch-x86.h && continue
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test "$f" = src/include/port/atomics/fallback.h && continue
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test "$f" = src/include/port/atomics/generic.h && continue
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test "$f" = src/include/port/atomics/generic-acc.h && continue
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test "$f" = src/include/port/atomics/generic-gcc.h && continue
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test "$f" = src/include/port/atomics/generic-msvc.h && continue
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test "$f" = src/include/port/atomics/generic-sunpro.h && continue
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