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Further corrections from the department of redundancy department.
Thom Brown
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@ -125,7 +125,7 @@ we get a disk layout like this:
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where the numbers are page numbers *at that level*, starting from 0.
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where the numbers are page numbers *at that level*, starting from 0.
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To find the physical block # corresponding to leaf page n, we need to
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To find the physical block # corresponding to leaf page n, we need to
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count the number number of leaf and upper-level pages preceding page n.
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count the number of leaf and upper-level pages preceding page n.
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This turns out to be
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This turns out to be
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y = n + (n / F + 1) + (n / F^2 + 1) + ... + 1
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y = n + (n / F + 1) + (n / F^2 + 1) + ... + 1
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@ -1009,7 +1009,7 @@ LogAccessExclusiveLockPrepare(void)
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* RecordTransactionAbort() do not optimise away the transaction
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* RecordTransactionAbort() do not optimise away the transaction
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* completion record which recovery relies upon to release locks. It's a
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* completion record which recovery relies upon to release locks. It's a
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* hack, but for a corner case not worth adding code for into the main
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* hack, but for a corner case not worth adding code for into the main
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* commit path. Second, must must assign an xid before the lock is
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* commit path. Second, we must assign an xid before the lock is
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* recorded in shared memory, otherwise a concurrently executing
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* recorded in shared memory, otherwise a concurrently executing
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* GetRunningTransactionLocks() might see a lock associated with an
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* GetRunningTransactionLocks() might see a lock associated with an
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* InvalidTransactionId which we later assert cannot happen.
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* InvalidTransactionId which we later assert cannot happen.
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@ -128,7 +128,7 @@ And the reader can do this:
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On machines with strong memory ordering, these weaker barriers will simply
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On machines with strong memory ordering, these weaker barriers will simply
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prevent compiler rearrangement, without emitting any actual machine code.
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prevent compiler rearrangement, without emitting any actual machine code.
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On machines with weak memory ordering, they will will prevent compiler
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On machines with weak memory ordering, they will prevent compiler
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reordering and also emit whatever hardware barrier may be required. Even
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reordering and also emit whatever hardware barrier may be required. Even
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on machines with weak memory ordering, a read or write barrier may be able
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on machines with weak memory ordering, a read or write barrier may be able
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to use a less expensive instruction than a full barrier.
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to use a less expensive instruction than a full barrier.
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