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f5a63bf1c0
openssl/crypto/sha
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slontis f5a63bf1c0 Fix SHA3_squeeze on armv4. 
For armv4 - Only the first 4 parameters can be passed via registers
(r0..r3).

As all of the general registers are already used,
r11 was used to store the 'next' param.
R11 is now pushed/poped on entry/exit.

Reviewed-by: Paul Dale <pauli@openssl.org>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22719)
2023-11-15 09:02:30 +01:00
..
asm Fix SHA3_squeeze on armv4. 2023-11-15 09:02:30 +01:00
build.info riscv: Support SHA-512 family on platforms with vlen >= 128. 2023-10-26 15:55:50 +01:00
keccak1600.c Add EVP_DigestSqueeze() API. 2023-11-10 13:27:00 +01:00
sha1_one.c
sha1dgst.c
sha3.c Add EVP_DigestSqueeze() API. 2023-11-10 13:27:00 +01:00
sha256.c crypto: sha256: Add mechanism to keep C code as fallback for SHA256_ASM 2023-10-26 15:55:49 +01:00
sha512.c crypto: sha512: Add mechanism to keep C code as fallback for SHA512_ASM 2023-10-26 15:55:49 +01:00
sha_local.h
sha_ppc.c
sha_riscv.c riscv: Support SHA-512 family on platforms with vlen >= 128. 2023-10-26 15:55:50 +01:00