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apparently impossible to compose blended code with would perform satisfactory on all x86 and x86_64 cores, an extra RC4_CHAR code-path is introduced and P4 core is detected at run-time. This way we keep original performance on non-P4 implementations and turbo-charge P4 performance by factor of 2.8x (on 32-bit core).
36 lines
1.5 KiB
Plaintext
36 lines
1.5 KiB
Plaintext
=pod
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=head1 NAME
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OPENSSL_ia32cap
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=head1 SYNOPSIS
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unsigned long *OPENSSL_ia32cap_loc(void);
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#define OPENSSL_ia32cap (*(OPENSSL_ia32cap_loc()))
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=head1 DESCRIPTION
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Value returned by OPENSSL_ia32cap_loc() is address of a variable
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containing IA-32 processor capabilities bit vector as it appears in EDX
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register after executing CPUID instruction with EAX=1 input value (see
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Intel Application Note #241618). Naturally it's meaningful on IA-32[E]
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platforms only. The variable is normally set up automatically upon
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toolkit initialization, but can be manipulated afterwards to modify
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crypto library behaviour. For the moment of this writing three bits are
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significant, namely bit #28 denoting Hyperthreading, which is used to
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distinguish Intel P4 core, bit #26 denoting SSE2 support, and bit #4
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denoting presence of Time-Stamp Counter. Clearing bit #26 at run-time
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for example disables high-performance SSE2 code present in the crypto
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library. You might have to do this if target OpenSSL application is
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executed on SSE2 capable CPU, but under control of OS which does not
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support SSE2 extentions. Even though you can manipulate the value
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programmatically, you most likely will find it more appropriate to set
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up an environment variable with the same name prior starting target
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application, e.g. 'env OPENSSL_ia32cap=0x10 apps/openssl', to achieve
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same effect without modifying the application source code.
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Alternatively you can reconfigure the toolkit with no-sse2 option and
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recompile.
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=cut
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