mirror of
https://github.com/openssl/openssl.git
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281 lines
8.0 KiB
Perl
281 lines
8.0 KiB
Perl
#! /usr/bin/env perl
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# Copyright 2021-2023 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the Apache License 2.0 (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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#
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# This module implements support for Armv8 SM3 instructions
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# $output is the last argument if it looks like a file (it has an extension)
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# $flavour is the first argument if it doesn't look like a file
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$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
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die "can't locate arm-xlate.pl";
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open OUT,"| \"$^X\" $xlate $flavour \"$output\""
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or die "can't call $xlate: $!";
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*STDOUT=*OUT;
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# Message expanding:
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# Wj <- P1(W[j-16]^W[j-9]^(W[j-3]<<<15))^(W[j-13]<<<7)^W[j-6]
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# Input: s0, s1, s2, s3
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# s0 = w0 | w1 | w2 | w3
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# s1 = w4 | w5 | w6 | w7
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# s2 = w8 | w9 | w10 | w11
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# s3 = w12 | w13 | w14 | w15
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# Output: s4
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sub msg_exp () {
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my $s0 = shift;
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my $s1 = shift;
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my $s2 = shift;
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my $s3 = shift;
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my $s4 = shift;
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my $vtmp1 = shift;
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my $vtmp2 = shift;
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$code.=<<___;
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// s4 = w7 | w8 | w9 | w10
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ext $s4.16b, $s1.16b, $s2.16b, #12
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// vtmp1 = w3 | w4 | w5 | w6
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ext $vtmp1.16b, $s0.16b, $s1.16b, #12
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// vtmp2 = w10 | w11 | w12 | w13
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ext $vtmp2.16b, $s2.16b, $s3.16b, #8
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sm3partw1 $s4.4s, $s0.4s, $s3.4s
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sm3partw2 $s4.4s, $vtmp2.4s, $vtmp1.4s
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___
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}
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# A round of compresson function
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# Input:
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# ab - choose instruction among sm3tt1a, sm3tt1b, sm3tt2a, sm3tt2b
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# vstate0 - vstate1, store digest status(A - H)
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# vconst0 - vconst1, interleaved used to store Tj <<< j
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# vtmp - temporary register
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# vw - for sm3tt1ab, vw = s0 eor s1
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# s0 - for sm3tt2ab, just be s0
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# i, choose wj' or wj from vw
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sub round () {
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my $ab = shift;
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my $vstate0 = shift;
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my $vstate1 = shift;
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my $vconst0 = shift;
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my $vconst1 = shift;
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my $vtmp = shift;
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my $vw = shift;
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my $s0 = shift;
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my $i = shift;
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$code.=<<___;
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sm3ss1 $vtmp.4s, $vstate0.4s, $vconst0.4s, $vstate1.4s
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shl $vconst1.4s, $vconst0.4s, #1
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sri $vconst1.4s, $vconst0.4s, #31
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sm3tt1$ab $vstate0.4s, $vtmp.4s, $vw.4s[$i]
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sm3tt2$ab $vstate1.4s, $vtmp.4s, $s0.4s[$i]
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___
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}
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sub qround () {
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my $ab = shift;
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my $vstate0 = shift;
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my $vstate1 = shift;
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my $vconst0 = shift;
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my $vconst1 = shift;
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my $vtmp1 = shift;
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my $vtmp2 = shift;
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my $s0 = shift;
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my $s1 = shift;
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my $s2 = shift;
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my $s3 = shift;
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my $s4 = shift;
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if($s4) {
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&msg_exp($s0, $s1, $s2, $s3, $s4, $vtmp1, $vtmp2);
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}
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$code.=<<___;
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eor $vtmp1.16b, $s0.16b, $s1.16b
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___
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&round($ab, $vstate0, $vstate1, $vconst0, $vconst1, $vtmp2,
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$vtmp1, $s0, 0);
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&round($ab, $vstate0, $vstate1, $vconst1, $vconst0, $vtmp2,
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$vtmp1, $s0, 1);
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&round($ab, $vstate0, $vstate1, $vconst0, $vconst1, $vtmp2,
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$vtmp1, $s0, 2);
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&round($ab, $vstate0, $vstate1, $vconst1, $vconst0, $vtmp2,
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$vtmp1, $s0, 3);
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}
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$code=<<___;
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#include "arm_arch.h"
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.text
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___
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{{{
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my ($pstate,$pdata,$num)=("x0","x1","w2");
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my ($state1,$state2)=("v5","v6");
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my ($sconst1, $sconst2)=("s16","s17");
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my ($vconst1, $vconst2)=("v16","v17");
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my ($s0,$s1,$s2,$s3,$s4)=map("v$_",(0..4));
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my ($bkstate1,$bkstate2)=("v18","v19");
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my ($vconst_tmp1,$vconst_tmp2)=("v20","v21");
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my ($vtmp1,$vtmp2)=("v22","v23");
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my $constaddr="x8";
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# void ossl_hwsm3_block_data_order(SM3_CTX *c, const void *p, size_t num)
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$code.=<<___;
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.globl ossl_hwsm3_block_data_order
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.type ossl_hwsm3_block_data_order,%function
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.align 5
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ossl_hwsm3_block_data_order:
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AARCH64_VALID_CALL_TARGET
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// load state
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ld1 {$state1.4s-$state2.4s}, [$pstate]
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rev64 $state1.4s, $state1.4s
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rev64 $state2.4s, $state2.4s
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ext $state1.16b, $state1.16b, $state1.16b, #8
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ext $state2.16b, $state2.16b, $state2.16b, #8
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adr $constaddr, .Tj
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ldp $sconst1, $sconst2, [$constaddr]
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.Loop:
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// load input
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ld1 {$s0.16b-$s3.16b}, [$pdata], #64
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sub $num, $num, #1
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mov $bkstate1.16b, $state1.16b
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mov $bkstate2.16b, $state2.16b
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#ifndef __ARMEB__
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rev32 $s0.16b, $s0.16b
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rev32 $s1.16b, $s1.16b
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rev32 $s2.16b, $s2.16b
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rev32 $s3.16b, $s3.16b
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#endif
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ext $vconst_tmp1.16b, $vconst1.16b, $vconst1.16b, #4
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___
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&qround("a",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s0,$s1,$s2,$s3,$s4);
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&qround("a",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s1,$s2,$s3,$s4,$s0);
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&qround("a",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s2,$s3,$s4,$s0,$s1);
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&qround("a",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s3,$s4,$s0,$s1,$s2);
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$code.=<<___;
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ext $vconst_tmp1.16b, $vconst2.16b, $vconst2.16b, #4
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___
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s4,$s0,$s1,$s2,$s3);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s0,$s1,$s2,$s3,$s4);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s1,$s2,$s3,$s4,$s0);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s2,$s3,$s4,$s0,$s1);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s3,$s4,$s0,$s1,$s2);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s4,$s0,$s1,$s2,$s3);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s0,$s1,$s2,$s3,$s4);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s1,$s2,$s3,$s4,$s0);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s2,$s3,$s4,$s0,$s1);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s3,$s4);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s4,$s0);
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&qround("b",$state1,$state2,$vconst_tmp1,$vconst_tmp2,$vtmp1,$vtmp2,
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$s0,$s1);
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$code.=<<___;
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eor $state1.16b, $state1.16b, $bkstate1.16b
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eor $state2.16b, $state2.16b, $bkstate2.16b
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// any remained blocks?
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cbnz $num, .Loop
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// save state
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rev64 $state1.4s, $state1.4s
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rev64 $state2.4s, $state2.4s
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ext $state1.16b, $state1.16b, $state1.16b, #8
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ext $state2.16b, $state2.16b, $state2.16b, #8
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st1 {$state1.4s-$state2.4s}, [$pstate]
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ret
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.size ossl_hwsm3_block_data_order,.-ossl_hwsm3_block_data_order
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.align 3
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.Tj:
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.word 0x79cc4519, 0x9d8a7a87
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___
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}}}
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#########################################
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my %sm3partopcode = (
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"sm3partw1" => 0xce60C000,
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"sm3partw2" => 0xce60C400);
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my %sm3ss1opcode = (
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"sm3ss1" => 0xce400000);
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my %sm3ttopcode = (
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"sm3tt1a" => 0xce408000,
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"sm3tt1b" => 0xce408400,
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"sm3tt2a" => 0xce408800,
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"sm3tt2b" => 0xce408C00);
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sub unsm3part {
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my ($mnemonic,$arg)=@_;
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$arg=~ m/[qv](\d+)[^,]*,\s*[qv](\d+)[^,]*,\s*[qv](\d+)/o
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&&
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sprintf ".inst\t0x%08x\t//%s %s",
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$sm3partopcode{$mnemonic}|$1|($2<<5)|($3<<16),
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$mnemonic,$arg;
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}
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sub unsm3ss1 {
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my ($mnemonic,$arg)=@_;
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$arg=~ m/[qv](\d+)[^,]*,\s*[qv](\d+)[^,]*,\s*[qv](\d+)[^,]*,\s*[qv](\d+)/o
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&&
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sprintf ".inst\t0x%08x\t//%s %s",
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$sm3ss1opcode{$mnemonic}|$1|($2<<5)|($3<<16)|($4<<10),
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$mnemonic,$arg;
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}
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sub unsm3tt {
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my ($mnemonic,$arg)=@_;
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$arg=~ m/[qv](\d+)[^,]*,\s*[qv](\d+)[^,]*,\s*[qv](\d+)[^,]*\[([0-3])\]/o
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&&
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sprintf ".inst\t0x%08x\t//%s %s",
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$sm3ttopcode{$mnemonic}|$1|($2<<5)|($3<<16)|($4<<12),
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$mnemonic,$arg;
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}
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open SELF,$0;
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while(<SELF>) {
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next if (/^#!/);
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last if (!s/^#/\/\// and !/^$/);
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print;
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}
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close SELF;
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foreach(split("\n",$code)) {
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s/\`([^\`]*)\`/eval($1)/ge;
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s/\b(sm3partw[1-2])\s+([qv].*)/unsm3part($1,$2)/ge;
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s/\b(sm3ss1)\s+([qv].*)/unsm3ss1($1,$2)/ge;
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s/\b(sm3tt[1-2][a-b])\s+([qv].*)/unsm3tt($1,$2)/ge;
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print $_,"\n";
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}
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close STDOUT or die "error closing STDOUT: $!";
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