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71396cd048
SM3 hardware instruction is optional feature of crypto extension for aarch64. This implementation accelerates SM3 via SM3 instructions. For the platform not supporting SM3 instruction, the original C implementation still works. Thanks to AliBaba for testing and reporting the following perf numbers for Yitian710: Benchmark on T-Head Yitian-710 2.75GHz: Before: type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes sm3 49297.82k 121062.63k 223106.05k 283371.52k 307574.10k 309400.92k After (33% - 74% faster): type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes sm3 65640.01k 179121.79k 359854.59k 481448.96k 534055.59k 538274.47k Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17454)
95 lines
3.4 KiB
C
95 lines
3.4 KiB
C
/*
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* Copyright 2017-2021 The OpenSSL Project Authors. All Rights Reserved.
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* Copyright 2017 Ribose Inc. All Rights Reserved.
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* Ported from Ribose contributions from Botan.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include <string.h>
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#include "internal/sm3.h"
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#define DATA_ORDER_IS_BIG_ENDIAN
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#define HASH_LONG SM3_WORD
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#define HASH_CTX SM3_CTX
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#define HASH_CBLOCK SM3_CBLOCK
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#define HASH_UPDATE ossl_sm3_update
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#define HASH_TRANSFORM ossl_sm3_transform
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#define HASH_FINAL ossl_sm3_final
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#define HASH_MAKE_STRING(c, s) \
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do { \
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unsigned long ll; \
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ll=(c)->A; (void)HOST_l2c(ll, (s)); \
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ll=(c)->B; (void)HOST_l2c(ll, (s)); \
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ll=(c)->C; (void)HOST_l2c(ll, (s)); \
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ll=(c)->D; (void)HOST_l2c(ll, (s)); \
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ll=(c)->E; (void)HOST_l2c(ll, (s)); \
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ll=(c)->F; (void)HOST_l2c(ll, (s)); \
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ll=(c)->G; (void)HOST_l2c(ll, (s)); \
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ll=(c)->H; (void)HOST_l2c(ll, (s)); \
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} while (0)
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#if defined(OPENSSL_SM3_ASM)
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# if defined(__aarch64__)
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# include "crypto/arm_arch.h"
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# define HWSM3_CAPABLE (OPENSSL_armcap_P & ARMV8_SM3)
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void ossl_hwsm3_block_data_order(SM3_CTX *c, const void *p, size_t num);
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# endif
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#endif
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#if defined(HWSM3_CAPABLE)
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# define HASH_BLOCK_DATA_ORDER (HWSM3_CAPABLE ? ossl_hwsm3_block_data_order \
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: ossl_sm3_block_data_order)
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#else
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# define HASH_BLOCK_DATA_ORDER ossl_sm3_block_data_order
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#endif
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void ossl_sm3_block_data_order(SM3_CTX *c, const void *p, size_t num);
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void ossl_sm3_transform(SM3_CTX *c, const unsigned char *data);
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#include "crypto/md32_common.h"
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#define P0(X) (X ^ ROTATE(X, 9) ^ ROTATE(X, 17))
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#define P1(X) (X ^ ROTATE(X, 15) ^ ROTATE(X, 23))
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#define FF0(X,Y,Z) (X ^ Y ^ Z)
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#define GG0(X,Y,Z) (X ^ Y ^ Z)
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#define FF1(X,Y,Z) ((X & Y) | ((X | Y) & Z))
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#define GG1(X,Y,Z) ((Z ^ (X & (Y ^ Z))))
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#define EXPAND(W0,W7,W13,W3,W10) \
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(P1(W0 ^ W7 ^ ROTATE(W13, 15)) ^ ROTATE(W3, 7) ^ W10)
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#define RND(A, B, C, D, E, F, G, H, TJ, Wi, Wj, FF, GG) \
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do { \
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const SM3_WORD A12 = ROTATE(A, 12); \
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const SM3_WORD A12_SM = A12 + E + TJ; \
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const SM3_WORD SS1 = ROTATE(A12_SM, 7); \
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const SM3_WORD TT1 = FF(A, B, C) + D + (SS1 ^ A12) + (Wj); \
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const SM3_WORD TT2 = GG(E, F, G) + H + SS1 + Wi; \
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B = ROTATE(B, 9); \
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D = TT1; \
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F = ROTATE(F, 19); \
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H = P0(TT2); \
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} while(0)
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#define R1(A,B,C,D,E,F,G,H,TJ,Wi,Wj) \
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RND(A,B,C,D,E,F,G,H,TJ,Wi,Wj,FF0,GG0)
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#define R2(A,B,C,D,E,F,G,H,TJ,Wi,Wj) \
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RND(A,B,C,D,E,F,G,H,TJ,Wi,Wj,FF1,GG1)
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#define SM3_A 0x7380166fUL
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#define SM3_B 0x4914b2b9UL
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#define SM3_C 0x172442d7UL
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#define SM3_D 0xda8a0600UL
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#define SM3_E 0xa96f30bcUL
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#define SM3_F 0x163138aaUL
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#define SM3_G 0xe38dee4dUL
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#define SM3_H 0xb0fb0e4eUL
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