XiaokangQian 954f45ba4c Optimize AES-GCM for uarchs with unroll and new instructions ... Increase the block numbers to 8 for every iteration. Increase the hash table capacity. Make use of EOR3 instruction to improve the performance. This can improve performance 25-40% on out-of-order microarchitectures with a large number of fast execution units, such as Neoverse V1. We also see 20-30% performance improvements on other architectures such as the M1. Assembly code reviewd by Tom Cosgrove (ARM). Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/15916)		2022-01-25 14:30:00 +11:00
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asm	Optimize AES-GCM for uarchs with unroll and new instructions	2022-01-25 14:30:00 +11:00
build.info	Optimize AES-GCM for uarchs with unroll and new instructions	2022-01-25 14:30:00 +11:00
cbc128.c
ccm128.c
cfb128.c
ctr128.c
cts128.c
gcm128.c	Split bignum code out of the sparcv9cap.c	2021-07-15 09:33:04 +02:00
ocb128.c
ofb128.c
siv128.c
wrap128.c
xts128.c