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cc82b09cbd
Unroll AES-CTR loops to a maximum 12 blocks for ARM Neoverse V1 and
V2, to fully utilize their AES pipeline resources.
Improvement on ARM Neoverse V1.
Package Size(Bytes) 16 32 64 128 256 1024
Improvement(%) 3.93 -0.45 11.30 4.31 12.48 37.66
Package Size(Bytes) 1500 8192 16384 61440 65536
Improvement(%) 37.16 38.90 39.89 40.55 40.41
Change-Id: Ifb8fad9af22476259b9ba75132bc3d8010a7fdbd
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22733)
113 lines
3.8 KiB
C++
113 lines
3.8 KiB
C++
/*
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* Copyright 2019-2023 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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/*
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* Crypto extension support for AES GCM.
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* This file is included by cipher_aes_gcm_hw.c
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*/
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size_t armv8_aes_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len,
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const void *key, unsigned char ivec[16], u64 *Xi)
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{
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size_t align_bytes = 0;
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align_bytes = len - len % 16;
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AES_KEY *aes_key = (AES_KEY *)key;
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switch(aes_key->rounds) {
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case 10:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_enc_128_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_enc_128_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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case 12:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_enc_192_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_enc_192_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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case 14:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_enc_256_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_enc_256_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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}
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return align_bytes;
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}
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size_t armv8_aes_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len,
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const void *key, unsigned char ivec[16], u64 *Xi)
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{
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size_t align_bytes = 0;
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align_bytes = len - len % 16;
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AES_KEY *aes_key = (AES_KEY *)key;
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switch(aes_key->rounds) {
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case 10:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_dec_128_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_dec_128_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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case 12:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_dec_192_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_dec_192_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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case 14:
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if (IS_CPU_SUPPORT_UNROLL8_EOR3()) {
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unroll8_eor3_aes_gcm_dec_256_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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} else {
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aes_gcm_dec_256_kernel(in, align_bytes * 8, out, (uint64_t *)Xi, ivec, key);
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}
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break;
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}
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return align_bytes;
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}
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static int armv8_aes_gcm_initkey(PROV_GCM_CTX *ctx, const unsigned char *key,
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size_t keylen)
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{
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PROV_AES_GCM_CTX *actx = (PROV_AES_GCM_CTX *)ctx;
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AES_KEY *ks = &actx->ks.ks;
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if (AES_UNROLL12_EOR3_CAPABLE) {
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GCM_HW_SET_KEY_CTR_FN(ks, aes_v8_set_encrypt_key, aes_v8_encrypt,
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aes_v8_ctr32_encrypt_blocks_unroll12_eor3);
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} else {
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GCM_HW_SET_KEY_CTR_FN(ks, aes_v8_set_encrypt_key, aes_v8_encrypt,
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aes_v8_ctr32_encrypt_blocks);
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}
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return 1;
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}
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static const PROV_GCM_HW armv8_aes_gcm = {
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armv8_aes_gcm_initkey,
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ossl_gcm_setiv,
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ossl_gcm_aad_update,
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generic_aes_gcm_cipher_update,
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ossl_gcm_cipher_final,
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ossl_gcm_one_shot
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};
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const PROV_GCM_HW *ossl_prov_aes_hw_gcm(size_t keybits)
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{
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return AES_PMULL_CAPABLE ? &armv8_aes_gcm : &aes_gcm;
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}
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