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03ce37e117
Although we have a Zvkb version of Chacha20, the Zvkb from the RISC-V Vector Cryptography Bit-manipulation extension was ratified in late 2023 and does not come to the RVA23 Profile. Many CPUs in 2024 currently do not support Zvkb but may have Vector and Bit-manipulation, which are already in the RVA22 Profile. This commit provides a vector-only implementation that replaced the vror with vsll+vsrl+vor and can provide enough speed for Chacha20 for new CPUs this year. Signed-off-by: Yangyu Chen <cyy@cyyself.name> Reviewed-by: Paul Dale <ppzgs1@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/24069)
58 lines
1.8 KiB
Plaintext
58 lines
1.8 KiB
Plaintext
LIBS=../../libcrypto
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$CHACHAASM=chacha_enc.c
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IF[{- !$disabled{asm} -}]
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$CHACHAASM_x86=chacha-x86.S
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$CHACHAASM_x86_64=chacha-x86_64.s
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$CHACHAASM_ia64=chacha-ia64.s
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$CHACHAASM_s390x=chacha-s390x.S
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$CHACHAASM_armv4=chacha-armv4.S
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$CHACHAASM_aarch64=chacha-armv8.S chacha-armv8-sve.S
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$CHACHAASM_loongarch64=chacha-loongarch64.S
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$CHACHAASM_ppc32=chacha_ppc.c chacha-ppc.s
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IF[{- $target{sys_id} ne "AIX" && $target{sys_id} ne "MACOSX" -}]
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$CHACHAASM_ppc32=chacha_ppc.c chacha-ppc.s chachap10-ppc.s
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ENDIF
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$CHACHAASM_ppc64=$CHACHAASM_ppc32
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$CHACHAASM_c64xplus=chacha-c64xplus.s
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$CHACHAASM_riscv64=chacha_riscv.c chacha_enc.c chacha-riscv64-v-zbb.s chacha-riscv64-v-zbb-zvkb.s
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$CHACHADEF_riscv64=INCLUDE_C_CHACHA20
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# Now that we have defined all the arch specific variables, use the
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# appropriate one
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IF[$CHACHAASM_{- $target{asm_arch} -}]
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$CHACHAASM=$CHACHAASM_{- $target{asm_arch} -}
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$CHACHADEF=$CHACHADEF_{- $target{asm_arch} -}
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ENDIF
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ENDIF
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SOURCE[../../libcrypto]=$CHACHAASM
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DEFINE[../../libcrypto]=$CHACHADEF
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GENERATE[chacha-x86.S]=asm/chacha-x86.pl
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GENERATE[chacha-x86_64.s]=asm/chacha-x86_64.pl
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GENERATE[chacha-ppc.s]=asm/chacha-ppc.pl
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GENERATE[chachap10-ppc.s]=asm/chachap10-ppc.pl
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GENERATE[chacha-armv4.S]=asm/chacha-armv4.pl
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INCLUDE[chacha-armv4.o]=..
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GENERATE[chacha-armv8.S]=asm/chacha-armv8.pl
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GENERATE[chacha-armv8-sve.S]=asm/chacha-armv8-sve.pl
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INCLUDE[chacha-armv8.o]=..
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INCLUDE[chacha-armv8-sve.o]=..
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INCLUDE[chacha-loongarch64.o]=..
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INCLUDE[chacha-s390x.o]=..
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GENERATE[chacha-c64xplus.S]=asm/chacha-c64xplus.pl
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GENERATE[chacha-s390x.S]=asm/chacha-s390x.pl
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GENERATE[chacha-ia64.S]=asm/chacha-ia64.pl
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GENERATE[chacha-ia64.s]=chacha-ia64.S
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GENERATE[chacha-loongarch64.S]=asm/chacha-loongarch64.pl
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GENERATE[chacha-riscv64-v-zbb.s]=asm/chacha-riscv64-v-zbb.pl
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GENERATE[chacha-riscv64-v-zbb-zvkb.s]=asm/chacha-riscv64-v-zbb.pl zvkb
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