XiaokangQian 954f45ba4c Optimize AES-GCM for uarchs with unroll and new instructions ... Increase the block numbers to 8 for every iteration. Increase the hash table capacity. Make use of EOR3 instruction to improve the performance. This can improve performance 25-40% on out-of-order microarchitectures with a large number of fast execution units, such as Neoverse V1. We also see 20-30% performance improvements on other architectures such as the M1. Assembly code reviewd by Tom Cosgrove (ARM). Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/15916)		2022-01-25 14:30:00 +11:00
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aes-gcm-armv8_64.pl	aarch64: support BTI and pointer authentication in assembly	2021-10-01 09:35:38 +02:00
aes-gcm-armv8-unroll8_64.pl	Optimize AES-GCM for uarchs with unroll and new instructions	2022-01-25 14:30:00 +11:00
aes-gcm-ppc.pl	AES-GCM performance optimzation with stitched method for p9+ ppc64le	2022-01-24 11:25:53 +11:00
aesni-gcm-x86_64.pl
ghash-alpha.pl
ghash-armv4.pl
ghash-c64xplus.pl
ghash-ia64.pl
ghash-parisc.pl
ghash-s390x.pl
ghash-sparcv9.pl
ghash-x86_64.pl
ghash-x86.pl
ghashp8-ppc.pl
ghashv8-armx.pl	Optimize AES-GCM for uarchs with unroll and new instructions	2022-01-25 14:30:00 +11:00