Martin Schwenke 3f55ff6af5 bn: save/restore registers to/from stack ... mtvsrd/mfvsrd are ISA >= 2.07 only, so this won't work for older CPUs. It would be possible to use this scheme only in the ISA >= 3.0 implementation. However, in the future it may be possible for newer ISAs to allow CPU implementations without a vector unit, so don't bother. The performance improvement versus using the stack was small anyway. Signed-off-by: Martin Schwenke <martin@meltin.net> Reviewed-by: Amitay Isaacs <amitay@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/15798)		2021-06-22 18:30:17 +10:00
..
alpha-mont.pl
armv4-gf2m.pl
armv4-mont.pl
armv8-mont.pl	Update copyright year	2021-05-20 14:22:33 +01:00
bn-586.pl
bn-c64xplus.asm
c64xplus-gf2m.pl
co-586.pl
ia64-mont.pl
ia64.S
mips-mont.pl
mips.pl
parisc-mont.pl
ppc64-mont-fixed.pl	bn: save/restore registers to/from stack	2021-06-22 18:30:17 +10:00
ppc64-mont.pl
ppc-mont.pl
ppc.pl
rsaz-avx2.pl
rsaz-avx512.pl	rsa: rename global rsaz_ sumbols so they are in namespace	2021-05-27 09:35:50 +10:00
rsaz-x86_64.pl
s390x-gf2m.pl
s390x-mont.pl
s390x.S
sparct4-mont.pl
sparcv8.S
sparcv8plus.S
sparcv9-gf2m.pl
sparcv9-mont.pl
sparcv9a-mont.pl
via-mont.pl
vis3-mont.pl
x86_64-gcc.c
x86_64-gf2m.pl
x86_64-mont5.pl
x86_64-mont.pl
x86-gf2m.pl
x86-mont.pl