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5ea64b456b
MIDR_EL1 system register exposes microarchitecture information so that people can make micro-arch related optimization such as exposing as much instruction level parallelism as possible. MIDR_EL1 register can be read only if HWCAP_CPUID feature is supported. Change-Id: Iabb8a36c5d31b184dba6399f378598058d394d4e Reviewed-by: Paul Dale <paul.dale@oracle.com> Reviewed-by: Tomas Mraz <tmraz@fedoraproject.org> (Merged from https://github.com/openssl/openssl/pull/11744)
158 lines
3.2 KiB
Perl
Executable File
158 lines
3.2 KiB
Perl
Executable File
#! /usr/bin/env perl
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# Copyright 2015-2020 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the Apache License 2.0 (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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# $output is the last argument if it looks like a file (it has an extension)
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# $flavour is the first argument if it doesn't look like a file
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$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
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die "can't locate arm-xlate.pl";
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open OUT,"| \"$^X\" $xlate $flavour \"$output\""
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or die "can't call $xlate: $!";
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*STDOUT=*OUT;
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$code.=<<___;
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#include "arm_arch.h"
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.text
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.arch armv8-a+crypto
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.align 5
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.globl _armv7_neon_probe
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.type _armv7_neon_probe,%function
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_armv7_neon_probe:
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orr v15.16b, v15.16b, v15.16b
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ret
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.size _armv7_neon_probe,.-_armv7_neon_probe
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.globl _armv7_tick
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.type _armv7_tick,%function
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_armv7_tick:
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#ifdef __APPLE__
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mrs x0, CNTPCT_EL0
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#else
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mrs x0, CNTVCT_EL0
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#endif
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ret
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.size _armv7_tick,.-_armv7_tick
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.globl _armv8_aes_probe
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.type _armv8_aes_probe,%function
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_armv8_aes_probe:
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aese v0.16b, v0.16b
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ret
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.size _armv8_aes_probe,.-_armv8_aes_probe
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.globl _armv8_sha1_probe
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.type _armv8_sha1_probe,%function
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_armv8_sha1_probe:
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sha1h s0, s0
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ret
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.size _armv8_sha1_probe,.-_armv8_sha1_probe
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.globl _armv8_sha256_probe
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.type _armv8_sha256_probe,%function
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_armv8_sha256_probe:
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sha256su0 v0.4s, v0.4s
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ret
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.size _armv8_sha256_probe,.-_armv8_sha256_probe
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.globl _armv8_pmull_probe
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.type _armv8_pmull_probe,%function
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_armv8_pmull_probe:
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pmull v0.1q, v0.1d, v0.1d
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ret
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.size _armv8_pmull_probe,.-_armv8_pmull_probe
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.globl _armv8_sha512_probe
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.type _armv8_sha512_probe,%function
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_armv8_sha512_probe:
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.long 0xcec08000 // sha512su0 v0.2d,v0.2d
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ret
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.size _armv8_sha512_probe,.-_armv8_sha512_probe
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.globl _armv8_cpuid_probe
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.type _armv8_cpuid_probe,%function
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_armv8_cpuid_probe:
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mrs x0, midr_el1
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ret
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.size _armv8_cpuid_probe,.-_armv8_cpuid_probe
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.globl OPENSSL_cleanse
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.type OPENSSL_cleanse,%function
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.align 5
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OPENSSL_cleanse:
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cbz x1,.Lret // len==0?
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cmp x1,#15
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b.hi .Lot // len>15
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nop
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.Little:
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strb wzr,[x0],#1 // store byte-by-byte
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subs x1,x1,#1
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b.ne .Little
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.Lret: ret
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.align 4
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.Lot: tst x0,#7
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b.eq .Laligned // inp is aligned
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strb wzr,[x0],#1 // store byte-by-byte
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sub x1,x1,#1
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b .Lot
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.align 4
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.Laligned:
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str xzr,[x0],#8 // store word-by-word
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sub x1,x1,#8
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tst x1,#-8
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b.ne .Laligned // len>=8
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cbnz x1,.Little // len!=0?
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ret
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.size OPENSSL_cleanse,.-OPENSSL_cleanse
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.globl CRYPTO_memcmp
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.type CRYPTO_memcmp,%function
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.align 4
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CRYPTO_memcmp:
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eor w3,w3,w3
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cbz x2,.Lno_data // len==0?
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cmp x2,#16
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b.ne .Loop_cmp
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ldp x8,x9,[x0]
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ldp x10,x11,[x1]
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eor x8,x8,x10
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eor x9,x9,x11
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orr x8,x8,x9
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mov x0,#1
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cmp x8,#0
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csel x0,xzr,x0,eq
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ret
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.align 4
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.Loop_cmp:
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ldrb w4,[x0],#1
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ldrb w5,[x1],#1
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eor w4,w4,w5
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orr w3,w3,w4
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subs x2,x2,#1
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b.ne .Loop_cmp
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.Lno_data:
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neg w0,w3
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lsr w0,w0,#31
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ret
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.size CRYPTO_memcmp,.-CRYPTO_memcmp
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___
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print $code;
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close STDOUT or die "error closing STDOUT: $!";
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