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7f2d6188c7
Loongarch64 architecture defines 128 bit vector extension lsx and 256 bit vector extension lasx. The cpucfg instruction can be used to obtain whether the CPU has a corresponding extension. This part of code is added to prepare for the subsequent addition of corresponding vector instruction optimization. Signed-off-by: zhuchen <zhuchen@loongson.cn> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19364)
23 lines
581 B
C
23 lines
581 B
C
/*
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* Copyright 2022 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include "loongarch_arch.h"
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unsigned int OPENSSL_loongarchcap_P = 0;
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void OPENSSL_cpuid_setup(void)
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{
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unsigned int reg;
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__asm__ volatile(
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"cpucfg %0, %1 \n\t"
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: "+&r"(reg)
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: "r"(LOONGARCH_CFG2)
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);
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OPENSSL_loongarchcap_P = reg;
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}
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