Henry Brausen 360f6dcc5a Add basic RISC-V cpuid and OPENSSL_riscvcap ... RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to be enabled at runtime using OPENSSL_riscvcap environment variable. For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc" Architecture string parsing is still very primitive, but can be expanded in the future. Currently, only bitmanip extensions Zba, Zbb, Zbc and Zbs are supported. Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm, as well as OPENSSL_cleanse. Assembly implementations are written using perlasm. Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Henry Brausen <henry.brausen@vrull.eu> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17640)		2022-05-19 16:32:49 +10:00
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crypto	Add basic RISC-V cpuid and OPENSSL_riscvcap	2022-05-19 16:32:49 +10:00
internal	Always try locale initialization from OPENSSL_strcasecmp	2022-05-13 08:30:48 +02:00
openssl	Prepare NonStop for fixed-size integer types.	2022-05-19 13:30:43 +10:00