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RISC-V: Add Zbb rori opcode in riscv.pm

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Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn>

Reviewed-by: Paul Dale <ppzgs1@gmail.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/27161)
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Julian Zhu 2025-02-27 17:08:39 +08:00 committed by Tomas Mraz
parent bf4c9b7b66
commit f04fdd908c
1 changed files with 10 additions and 0 deletions
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10
crypto/perlasm/riscv.pm
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@ -384,6 +384,16 @@ sub rev8 {
return ".word ".($template | ($rs << 15) | ($rd << 7));
}
sub rori {
# Encoding for rori rd, rs1, shamt instruction on RV64
# XXXXXXX_ shamt _ rs1 _XXX_ rd _XXXXXXX
my $template = 0b0110000_00000_00000_101_00000_0010011;
my $rd = read_reg shift;
my $rs1 = read_reg shift;
my $shamt = shift;
return ".word ".($template | ($shamt << 20) | ($rs1 << 15) | ($rd << 7));
}
sub roriw {
# Encoding for roriw rd, rs1, shamt instruction on RV64
# XXXXXXX_ shamt _ rs1 _XXX_ rd _XXXXXXX