mirror of
https://github.com/openssl/openssl.git
synced 2025-02-17 14:32:04 +08:00
Fix detection of ARMv7 and ARM64 CPU features on FreeBSD
OpenSSL assumes AT_HWCAP = 16 (as on Linux), but on FreeBSD AT_HWCAP = 25 Switch to using AT_HWCAP, and setting it to 16 if it is not defined. OpenSSL calls elf_auxv_info() with AT_CANARY which returns ENOENT resulting in all ARM acceleration features being disabled. CLA: trivial Reviewed-by: Ben Kaduk <kaduk@mit.edu> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17082)
This commit is contained in:
parent
0e9a265e42
commit
c1dabe26e3
@ -112,20 +112,23 @@ static unsigned long getauxval(unsigned long key)
|
||||
* ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
|
||||
* AArch64 used AT_HWCAP.
|
||||
*/
|
||||
# ifndef AT_HWCAP
|
||||
# define AT_HWCAP 16
|
||||
# endif
|
||||
# ifndef AT_HWCAP2
|
||||
# define AT_HWCAP2 26
|
||||
# endif
|
||||
# if defined(__arm__) || defined (__arm)
|
||||
# define HWCAP 16
|
||||
/* AT_HWCAP */
|
||||
# define HWCAP AT_HWCAP
|
||||
# define HWCAP_NEON (1 << 12)
|
||||
|
||||
# define HWCAP_CE 26
|
||||
/* AT_HWCAP2 */
|
||||
# define HWCAP_CE AT_HWCAP2
|
||||
# define HWCAP_CE_AES (1 << 0)
|
||||
# define HWCAP_CE_PMULL (1 << 1)
|
||||
# define HWCAP_CE_SHA1 (1 << 2)
|
||||
# define HWCAP_CE_SHA256 (1 << 3)
|
||||
# elif defined(__aarch64__)
|
||||
# define HWCAP 16
|
||||
/* AT_HWCAP */
|
||||
# define HWCAP AT_HWCAP
|
||||
# define HWCAP_NEON (1 << 1)
|
||||
|
||||
# define HWCAP_CE HWCAP
|
||||
|
Loading…
Reference in New Issue
Block a user