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RISC-V: Provide optimized SHA-512 implementation using Zbb extension
Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn> Reviewed-by: Paul Dale <ppzgs1@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/27161)
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crypto/sha/asm/sha512-riscv64-zbb.pl
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436
crypto/sha/asm/sha512-riscv64-zbb.pl
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#! /usr/bin/env perl
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# This file is dual-licensed, meaning that you can use it under your
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# choice of either of the following two licenses:
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#
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# Copyright 2025 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the Apache License 2.0 (the "License"). You can obtain
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# a copy in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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#
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# or
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#
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# Copyright (c) 2025, Julian Zhu <julian.oerv@isrc.iscas.ac.cn>
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# The generated code of this file depends on the following RISC-V extensions:
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# - RV64I
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# - RISC-V Basic Bit-manipulation extension ('Zbb')
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use strict;
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use warnings;
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use FindBin qw($Bin);
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use lib "$Bin";
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use lib "$Bin/../../perlasm";
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use riscv;
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# $output is the last argument if it looks like a file (it has an extension)
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# $flavour is the first argument if it doesn't look like a file
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my $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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my $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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$output and open STDOUT,">$output";
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my $code=<<___;
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.text
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___
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my $K512 = "K512";
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# Function arguments
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my ($INP, $LEN, $ADDR) = ("a1", "a2", "sp");
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my ($KT, $T1, $T2, $T3, $T4, $T5, $T6) = ("t0", "t1", "t2", "t3", "t4", "t5", "t6");
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my ($A, $B, $C, $D ,$E ,$F ,$G ,$H) = ("s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9");
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sub MSGSCHEDULE0 {
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my (
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$index,
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) = @_;
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my $code=<<___;
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ld $T1, (8*$index+0)($INP)
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@{[rev8 $T1, $T1]}
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sd $T1, 8*$index($ADDR)
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___
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return $code;
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}
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sub MSGSCHEDULE1 {
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my (
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$INDEX,
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) = @_;
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my $code=<<___;
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ld $T1, (($INDEX-2)&0x0f)*8($ADDR)
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ld $T2, (($INDEX-15)&0x0f)*8($ADDR)
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ld $T3, (($INDEX-7)&0x0f)*8($ADDR)
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ld $T4, ($INDEX&0x0f)*8($ADDR)
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@{[rori $T5, $T1, 19]}
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@{[rori $T6, $T1, 61]}
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srli $T1, $T1, 6
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xor $T1, $T1, $T5
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xor $T1, $T1, $T6
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add $T1, $T1, $T3
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@{[rori $T5, $T2, 1]}
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@{[rori $T6, $T2, 8]}
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srli $T2, $T2, 7
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xor $T2, $T2, $T5
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xor $T2, $T2, $T6
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add $T1, $T1, $T2
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add $T1, $T1, $T4
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sd $T1, 8*($INDEX&0x0f)($ADDR)
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___
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return $code;
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}
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sub sha512_T1 {
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my (
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$INDEX, $e, $f, $g, $h,
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) = @_;
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my $code=<<___;
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ld $T4, 8*$INDEX($KT)
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add $h, $h, $T1
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add $h, $h, $T4
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@{[rori $T2, $e, 14]}
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@{[rori $T3, $e, 18]}
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@{[rori $T4, $e, 41]}
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xor $T2, $T2, $T3
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xor $T1, $f, $g
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xor $T2, $T2, $T4
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and $T1, $T1, $e
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add $h, $h, $T2
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xor $T1, $T1, $g
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add $T1, $T1, $h
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___
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return $code;
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}
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sub sha512_T2 {
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my (
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$a, $b, $c,
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) = @_;
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my $code=<<___;
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# Sigma0
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@{[rori $T2, $a, 28]}
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@{[rori $T3, $a, 34]}
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@{[rori $T4, $a, 39]}
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xor $T2, $T2, $T3
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# Maj
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xor $T5, $b, $c
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and $T3, $b, $c
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and $T5, $T5, $a
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xor $T2, $T2, $T4
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xor $T3, $T3, $T5
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# T2
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add $T2, $T2, $T3
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___
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return $code;
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}
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sub SHA512ROUND {
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my (
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$INDEX, $a, $b, $c, $d, $e, $f, $g, $h
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) = @_;
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my $code=<<___;
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@{[sha512_T1 $INDEX, $e, $f, $g, $h]}
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@{[sha512_T2 $a, $b, $c]}
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add $d, $d, $T1
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add $h, $T2, $T1
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___
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return $code;
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}
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sub SHA512ROUND0 {
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my (
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$INDEX, $a, $b, $c, $d, $e, $f, $g, $h
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) = @_;
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my $code=<<___;
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@{[MSGSCHEDULE0 $INDEX]}
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@{[SHA512ROUND $INDEX, $a, $b, $c, $d, $e, $f, $g, $h]}
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___
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return $code;
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}
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sub SHA512ROUND1 {
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my (
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$INDEX, $a, $b, $c, $d, $e, $f, $g, $h
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) = @_;
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my $code=<<___;
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@{[MSGSCHEDULE1 $INDEX]}
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@{[SHA512ROUND $INDEX, $a, $b, $c, $d, $e, $f, $g, $h]}
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___
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return $code;
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}
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################################################################################
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# void sha512_block_data_order_zbb(void *c, const void *p, size_t len)
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$code .= <<___;
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.p2align 3
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.globl sha512_block_data_order_zbb
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.type sha512_block_data_order_zbb,\@function
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sha512_block_data_order_zbb:
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addi sp, sp, -96
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sd s0, 0(sp)
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sd s1, 8(sp)
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sd s2, 16(sp)
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sd s3, 24(sp)
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sd s4, 32(sp)
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sd s5, 40(sp)
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sd s6, 48(sp)
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sd s7, 56(sp)
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sd s8, 64(sp)
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sd s9, 72(sp)
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sd s10, 80(sp)
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sd s11, 88(sp)
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addi sp, sp, -128
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la $KT, $K512
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# load ctx
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ld $A, 0(a0)
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ld $B, 8(a0)
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ld $C, 16(a0)
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ld $D, 24(a0)
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ld $E, 32(a0)
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ld $F, 40(a0)
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ld $G, 48(a0)
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ld $H, 56(a0)
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L_round_loop:
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# Decrement length by 1
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addi $LEN, $LEN, -1
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@{[SHA512ROUND0 0, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND0 1, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND0 2, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND0 3, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND0 4, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND0 5, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND0 6, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND0 7, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND0 8, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND0 9, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND0 10, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND0 11, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND0 12, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND0 13, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND0 14, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND0 15, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 16, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 17, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 18, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 19, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 20, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 21, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 22, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 23, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 24, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 25, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 26, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 27, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 28, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 29, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 30, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 31, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 32, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 33, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 34, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 35, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 36, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 37, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 38, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 39, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 40, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 41, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 42, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 43, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 44, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 45, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 46, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 47, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 48, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 49, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 50, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 51, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 52, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 53, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 54, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 55, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 56, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 57, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 58, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 59, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 60, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 61, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 62, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 63, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 64, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 65, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 66, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 67, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 68, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 69, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 70, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 71, $B, $C, $D, $E, $F, $G, $H, $A]}
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@{[SHA512ROUND1 72, $A, $B, $C, $D, $E, $F, $G, $H]}
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@{[SHA512ROUND1 73, $H, $A, $B, $C, $D, $E, $F, $G]}
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@{[SHA512ROUND1 74, $G, $H, $A, $B, $C, $D, $E, $F]}
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@{[SHA512ROUND1 75, $F, $G, $H, $A, $B, $C, $D, $E]}
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@{[SHA512ROUND1 76, $E, $F, $G, $H, $A, $B, $C, $D]}
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@{[SHA512ROUND1 77, $D, $E, $F, $G, $H, $A, $B, $C]}
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@{[SHA512ROUND1 78, $C, $D, $E, $F, $G, $H, $A, $B]}
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@{[SHA512ROUND1 79, $B, $C, $D, $E, $F, $G, $H, $A]}
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ld $T1, 0(a0)
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ld $T2, 8(a0)
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ld $T3, 16(a0)
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ld $T4, 24(a0)
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add $A, $A, $T1
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add $B, $B, $T2
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add $C, $C, $T3
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add $D, $D, $T4
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sd $A, 0(a0)
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sd $B, 8(a0)
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sd $C, 16(a0)
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sd $D, 24(a0)
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ld $T1, 32(a0)
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ld $T2, 40(a0)
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ld $T3, 48(a0)
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ld $T4, 56(a0)
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add $E, $E, $T1
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add $F, $F, $T2
|
||||
add $G, $G, $T3
|
||||
add $H, $H, $T4
|
||||
|
||||
sd $E, 32(a0)
|
||||
sd $F, 40(a0)
|
||||
sd $G, 48(a0)
|
||||
sd $H, 56(a0)
|
||||
|
||||
addi $INP, $INP, 128
|
||||
|
||||
bnez $LEN, L_round_loop
|
||||
|
||||
addi sp, sp, 128
|
||||
|
||||
ld s0, 0(sp)
|
||||
ld s1, 8(sp)
|
||||
ld s2, 16(sp)
|
||||
ld s3, 24(sp)
|
||||
ld s4, 32(sp)
|
||||
ld s5, 40(sp)
|
||||
ld s6, 48(sp)
|
||||
ld s7, 56(sp)
|
||||
ld s8, 64(sp)
|
||||
ld s9, 72(sp)
|
||||
ld s10, 80(sp)
|
||||
ld s11, 88(sp)
|
||||
|
||||
addi sp, sp, 96
|
||||
|
||||
ret
|
||||
.size sha512_block_data_order_zbb,.-sha512_block_data_order_zbb
|
||||
|
||||
.section .rodata
|
||||
.p2align 3
|
||||
.type $K512,\@object
|
||||
$K512:
|
||||
.dword 0x428a2f98d728ae22, 0x7137449123ef65cd
|
||||
.dword 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
|
||||
.dword 0x3956c25bf348b538, 0x59f111f1b605d019
|
||||
.dword 0x923f82a4af194f9b, 0xab1c5ed5da6d8118
|
||||
.dword 0xd807aa98a3030242, 0x12835b0145706fbe
|
||||
.dword 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2
|
||||
.dword 0x72be5d74f27b896f, 0x80deb1fe3b1696b1
|
||||
.dword 0x9bdc06a725c71235, 0xc19bf174cf692694
|
||||
.dword 0xe49b69c19ef14ad2, 0xefbe4786384f25e3
|
||||
.dword 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65
|
||||
.dword 0x2de92c6f592b0275, 0x4a7484aa6ea6e483
|
||||
.dword 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5
|
||||
.dword 0x983e5152ee66dfab, 0xa831c66d2db43210
|
||||
.dword 0xb00327c898fb213f, 0xbf597fc7beef0ee4
|
||||
.dword 0xc6e00bf33da88fc2, 0xd5a79147930aa725
|
||||
.dword 0x06ca6351e003826f, 0x142929670a0e6e70
|
||||
.dword 0x27b70a8546d22ffc, 0x2e1b21385c26c926
|
||||
.dword 0x4d2c6dfc5ac42aed, 0x53380d139d95b3df
|
||||
.dword 0x650a73548baf63de, 0x766a0abb3c77b2a8
|
||||
.dword 0x81c2c92e47edaee6, 0x92722c851482353b
|
||||
.dword 0xa2bfe8a14cf10364, 0xa81a664bbc423001
|
||||
.dword 0xc24b8b70d0f89791, 0xc76c51a30654be30
|
||||
.dword 0xd192e819d6ef5218, 0xd69906245565a910
|
||||
.dword 0xf40e35855771202a, 0x106aa07032bbd1b8
|
||||
.dword 0x19a4c116b8d2d0c8, 0x1e376c085141ab53
|
||||
.dword 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8
|
||||
.dword 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb
|
||||
.dword 0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3
|
||||
.dword 0x748f82ee5defb2fc, 0x78a5636f43172f60
|
||||
.dword 0x84c87814a1f0ab72, 0x8cc702081a6439ec
|
||||
.dword 0x90befffa23631e28, 0xa4506cebde82bde9
|
||||
.dword 0xbef9a3f7b2c67915, 0xc67178f2e372532b
|
||||
.dword 0xca273eceea26619c, 0xd186b8c721c0c207
|
||||
.dword 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178
|
||||
.dword 0x06f067aa72176fba, 0x0a637dc5a2c898a6
|
||||
.dword 0x113f9804bef90dae, 0x1b710b35131c471b
|
||||
.dword 0x28db77f523047d84, 0x32caab7b40c72493
|
||||
.dword 0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c
|
||||
.dword 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a
|
||||
.dword 0x5fcb6fab3ad6faec, 0x6c44198c4a475817
|
||||
.size $K512,.-$K512
|
||||
___
|
||||
|
||||
print $code;
|
||||
|
||||
close STDOUT or die "error closing STDOUT: $!";
|
@ -46,7 +46,7 @@ IF[{- !$disabled{asm} -}]
|
||||
$SHA1ASM_c64xplus=sha1-c64xplus.s sha256-c64xplus.s sha512-c64xplus.s
|
||||
$SHA1DEF_c64xplus=SHA1_ASM SHA256_ASM SHA512_ASM
|
||||
|
||||
$SHA1ASM_riscv64=sha_riscv.c sha256-riscv64-zvkb-zvknha_or_zvknhb.S sha512-riscv64-zvkb-zvknhb.S
|
||||
$SHA1ASM_riscv64=sha_riscv.c sha256-riscv64-zvkb-zvknha_or_zvknhb.S sha512-riscv64-zbb.S sha512-riscv64-zvkb-zvknhb.S
|
||||
$SHA1DEF_riscv64=SHA256_ASM INCLUDE_C_SHA256 SHA512_ASM INCLUDE_C_SHA512
|
||||
|
||||
# Now that we have defined all the arch specific variables, use the
|
||||
@ -171,6 +171,7 @@ GENERATE[sha256-c64xplus.S]=asm/sha256-c64xplus.pl
|
||||
GENERATE[sha512-c64xplus.S]=asm/sha512-c64xplus.pl
|
||||
|
||||
GENERATE[sha256-riscv64-zvkb-zvknha_or_zvknhb.S]=asm/sha256-riscv64-zvkb-zvknha_or_zvknhb.pl
|
||||
GENERATE[sha512-riscv64-zbb.S]=asm/sha512-riscv64-zbb.pl
|
||||
GENERATE[sha512-riscv64-zvkb-zvknhb.S]=asm/sha512-riscv64-zvkb-zvknhb.pl
|
||||
|
||||
# These are not yet used and do not support multi-squeeze
|
||||
|
@ -30,6 +30,7 @@ void sha256_block_data_order(SHA256_CTX *ctx, const void *in, size_t num)
|
||||
}
|
||||
|
||||
void sha512_block_data_order_zvkb_zvknhb(void *ctx, const void *in, size_t num);
|
||||
void sha512_block_data_order_zbb(void *ctx, const void *in, size_t num);
|
||||
void sha512_block_data_order_c(void *ctx, const void *in, size_t num);
|
||||
void sha512_block_data_order(SHA512_CTX *ctx, const void *in, size_t num);
|
||||
|
||||
@ -37,6 +38,8 @@ void sha512_block_data_order(SHA512_CTX *ctx, const void *in, size_t num)
|
||||
{
|
||||
if (RISCV_HAS_ZVKB_AND_ZVKNHB() && riscv_vlen() >= 128) {
|
||||
sha512_block_data_order_zvkb_zvknhb(ctx, in, num);
|
||||
} else if (RISCV_HAS_ZBB()) {
|
||||
sha512_block_data_order_zbb(ctx, in, num);
|
||||
} else {
|
||||
sha512_block_data_order_c(ctx, in, num);
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user