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Add clmul-based gmult for riscv64 with Zbb, Zbc
ghash-riscv64.pl implements 128-bit galois field multiplication for use in the GCM mode using RISC-V carryless multiplication primitives. The clmul-accelerated routine can be selected by setting the Zbb and Zbc bits of the OPENSSL_riscvcap environment variable at runtime. Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Henry Brausen <henry.brausen@vrull.eu> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17640)
This commit is contained in:
Henry Brausen
Pauli
parent
360f6dcc5a
commit
999376dcf3
298
crypto/modes/asm/ghash-riscv64.pl
Normal file
298
crypto/modes/asm/ghash-riscv64.pl
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@ -0,0 +1,298 @@
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#! /usr/bin/env perl
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# Copyright 2022 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the Apache License 2.0 (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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# $output is the last argument if it looks like a file (it has an extension)
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# $flavour is the first argument if it doesn't look like a file
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$output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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$flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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$output and open STDOUT,">$output";
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my @regs = map("x$_",(0..31));
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my @regaliases = ('zero','ra','sp','gp','tp','t0','t1','t2','s0','s1',
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map("a$_",(0..7)),
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map("s$_",(2..11)),
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map("t$_",(3..6))
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);
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my %reglookup;
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@reglookup{@regs} = @regs;
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@reglookup{@regaliases} = @regs;
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# Takes a register name, possibly an alias, and converts it to a register index
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# from 0 to 31
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sub read_reg {
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my $reg = lc shift;
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if (!exists($reglookup{$reg})) {
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die("Unknown register ".$reg);
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}
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my $regstr = $reglookup{$reg};
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if (!($regstr =~ /^x([0-9]+)$/)) {
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die("Could not process register ".$reg);
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}
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return $1;
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}
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sub rv64_rev8 {
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# Encoding for rev8 rd, rs instruction on RV64
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# XXXXXXXXXXXXX_ rs _XXX_ rd _XXXXXXX
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my $template = 0b011010111000_00000_101_00000_0010011;
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my $rd = read_reg shift;
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my $rs = read_reg shift;
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return ".word ".($template | ($rs << 15) | ($rd << 7));
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}
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sub rv64_clmul {
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# Encoding for clmul rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0000101_00000_00000_001_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub rv64_clmulh {
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# Encoding for clmulh rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0000101_00000_00000_011_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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################################################################################
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# gcm_init_clmul_rv64i_zbb_zbc(u128 Htable[16], const u64 Xi[2])
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# Initialization function for clmul-based implementation of GMULT
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# This function is used in tandem with gcm_gmult_clmul_rv64i_zbb_zbc
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################################################################################
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{
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my ($Haddr,$Xi,$TEMP) = ("a0","a1","a2");
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$code .= <<___;
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.text
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.balign 16
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.globl gcm_init_clmul_rv64i_zbb_zbc
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.type gcm_init_clmul_rv64i_zbb_zbc,\@function
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# Initialize clmul-based implementation of galois field multiplication routine.
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# gcm_init_clmul_rv64i_zbb_zbc(ctx->Htable, ctx->H.u)
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gcm_init_clmul_rv64i_zbb_zbc:
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# argument 0 = ctx->Htable (store H here)
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# argument 1 = H.u[] (2x 64-bit words) [H_high64, H_low64]
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# Simply store [H_high64, H_low64] for later
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ld $TEMP,0($Xi)
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sd $TEMP,0($Haddr)
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ld $TEMP,8($Xi)
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sd $TEMP,8($Haddr)
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ret
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___
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}
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################################################################################
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# gcm_gmult_clmul_rv64i_zbb_zbc(u64 Xi[2], const u128 Htable[16])
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# Compute GMULT (X*H mod f) using the Zbc (clmul) and Zbb (basic bit manip)
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# extensions, and the Modified Barrett Reduction technique
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################################################################################
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{
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my ($Xi,$Haddr,$A1,$A0,$B1,$B0,$C1,$C0,$D1,$D0,$E1,$E0,$TEMP,$TEMP2,$qp_low) =
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("a0","a1","a2","a3","a4","a5","a6","a7","t0","t1","t2","t3","t4","t5","t6");
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$code .= <<___;
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.text
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.balign 16
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.globl gcm_gmult_clmul_rv64i_zbb_zbc
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.type gcm_gmult_clmul_rv64i_zbb_zbc,\@function
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# static void gcm_gmult_clmul_rv64i_zbb_zbc(u64 Xi[2], const u128 Htable[16])
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# Computes product of X*H mod f
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gcm_gmult_clmul_rv64i_zbb_zbc:
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# Load X and H (H is saved previously in gcm_init_clmul_rv64i_zbb_zbc)
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ld $A1,0($Xi)
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ld $A0,8($Xi)
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ld $B1,0($Haddr)
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ld $B0,8($Haddr)
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li $qp_low,0xe100000000000000
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# Perform Katratsuba Multiplication to generate a 255-bit intermediate
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# A = [A1:A0]
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# B = [B1:B0]
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# Let:
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# [C1:C0] = A1*B1
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# [D1:D0] = A0*B0
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# [E1:E0] = (A0+A1)*(B0+B1)
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# Then:
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# A*B = [C1:C0+C1+D1+E1:D1+C0+D0+E0:D0]
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@{[rv64_rev8 $A1, $A1]}
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@{[rv64_clmul $C0,$A1,$B1]}
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@{[rv64_clmulh $C1,$A1,$B1]}
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@{[rv64_rev8 $A0,$A0]}
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@{[rv64_clmul $D0,$A0,$B0]}
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@{[rv64_clmulh $D1,$A0,$B0]}
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xor $TEMP,$A0,$A1
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xor $TEMP2,$B0,$B1
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@{[rv64_clmul $E0,$TEMP,$TEMP2]}
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@{[rv64_clmulh $E1,$TEMP,$TEMP2]}
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# 0th term is just C1
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# Construct term 1 in E1 (E1 only appears in dword 1)
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xor $E1,$E1,$D1
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xor $E1,$E1,$C1
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xor $E1,$E1,$C0
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# Term 1 is E1
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# Construct term 2 in E0 (E0 only appears in dword 2)
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xor $E0,$E0,$D0
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xor $E0,$E0,$C0
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xor $E0,$E0,$D1
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# Term 2 is E0
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# final term is just D0
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# X*H is now stored in [C1,E1,E0,D0]
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# Left-justify
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slli $C1,$C1,1
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# Or in the high bit of E1
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srli $TEMP,$E1,63
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or $C1,$C1,$TEMP
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slli $E1,$E1,1
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# Or in the high bit of E0
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srli $TEMP2,$E0,63
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or $E1,$E1,$TEMP2
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slli $E0,$E0,1
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# Or in the high bit of D0
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srli $TEMP,$D0,63
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or $E0,$E0,$TEMP
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slli $D0,$D0,1
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# Barrett Reduction
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# c = [E0, D0]
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# We want the top 128 bits of the result of c*f
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# We'll get this by computing the low-half (most significant 128 bits in
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# the reflected domain) of clmul(c,fs)<<1 first, then
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# xor in c to complete the calculation
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# AA = [AA1:AA0] = [E0,D0] = c
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# BB = [BB1:BB0] = [qp_low,0]
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# [CC1:CC0] = AA1*BB1
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# [DD1:DD0] = AA0*BB0
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# [EE1:EE0] = (AA0+AA1)*(BB0+BB1)
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# Then:
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# AA*BB = [CC1:CC0+CC1+DD1+EE1:DD1+CC0+DD0+EE0:DD0]
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# We only need CC0,DD1,DD0,EE0 to compute the low 128 bits of c * qp_low
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___
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my ($CC0,$EE0,$AA1,$AA0,$BB1) = ($A0,$B1,$E0,$D0,$qp_low);
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$code .= <<___;
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@{[rv64_clmul $CC0,$AA1,$BB1]}
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#clmul DD0,AA0,BB0 # BB0 is 0, so DD0 = 0
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#clmulh DD1,AA0,BB0 # BB0 is 0, so DD1 = 0
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xor $TEMP,$AA0,$AA1
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#xor TEMP2,BB0,BB1 # TEMP2 = BB1 = qp_low
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@{[rv64_clmul $EE0,$TEMP,$BB1]}
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# Result is [N/A:N/A:DD1+CC0+DD0+EE0:DD0]
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# Simplifying: [CC0+EE0:0]
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xor $TEMP2,$CC0,$EE0
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# Shift left by 1 to correct for bit reflection
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slli $TEMP2,$TEMP2,1
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# xor into c = [E0,D0]
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# Note that only E0 is affected
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xor $E0,$E0,$TEMP2
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# Now, q = [E0,D0]
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# The final step is to compute clmul(q,[qp_low:0])<<1
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# The leftmost 128 bits are the reduced result.
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# Once again, we use Karatsuba multiplication, but many of the terms
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# simplify or cancel out.
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# AA = [AA1:AA0] = [E0,D0] = c
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# BB = [BB1:BB0] = [qp_low,0]
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# [CC1:CC0] = AA1*BB1
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# [DD1:DD0] = AA0*BB0
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# [EE1:EE0] = (AA0+AA1)*(BB0+BB1)
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# Then:
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# AA*BB = [CC1:CC0+CC1+DD1+EE1:DD1+CC0+DD0+EE0:DD0]
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# We need CC1,CC0,DD0,DD1,EE1,EE0 to compute the leftmost 128 bits of AA*BB
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___
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my ($AA1,$AA0,$BB1,$CC1,$CC0,$EE1,$EE0) = ($E0,$D0,$qp_low,$A0,$A1,$C0,$B0);
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$code .= <<___;
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@{[rv64_clmul $CC0,$AA1,$BB1]}
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@{[rv64_clmulh $CC1,$AA1,$BB1]}
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#clmul DD0,AA0,BB0 # BB0 = 0 so DD0 = 0
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#clmulh DD1,AA0,BB0 # BB0 = 0 so DD1 = 0
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xor $TEMP,$AA0,$AA1
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#xor TEMP2,BB0,BB1 # BB0 = 0 to TEMP2 == BB1 == qp_low
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@{[rv64_clmul $EE0,$TEMP,$BB1]}
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@{[rv64_clmulh $EE1,$TEMP,$BB1]}
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# Need the DD1+CC0+DD0+EE0 term to shift its leftmost bit into the
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# intermediate result.
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# This is just CC0+EE0, store it in TEMP
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xor $TEMP,$CC0,$EE0
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# Result is [CC1:CC0+CC1+EE1:(a single bit)]<<1
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# Combine into [CC1:CC0]
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xor $CC0,$CC0,$CC1
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xor $CC0,$CC0,$EE1
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# Shift 128-bit quantity, xor in [C1,E1] and store
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slli $CC1,$CC1,1
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srli $TEMP2,$CC0,63
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or $CC1,$CC1,$TEMP2
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# xor in C1
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xor $CC1,$CC1,$C1
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@{[rv64_rev8 $CC1,$CC1]}
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slli $CC0,$CC0,1
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srli $TEMP,$TEMP,63
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or $CC0,$CC0,$TEMP
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# xor in E1
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xor $CC0,$CC0,$E1
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@{[rv64_rev8 $CC0,$CC0]}
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sd $CC1,0(a0)
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sd $CC0,8(a0)
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ret
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___
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}
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print $code;
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close STDOUT or die "error closing STDOUT: $!";
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@ -40,6 +40,9 @@ IF[{- !$disabled{asm} -}]
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$MODESASM_c64xplus=ghash-c64xplus.s
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$MODESDEF_c64xplus=GHASH_ASM
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$MODESASM_riscv64=ghash-riscv64.s
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$MODESDEF_riscv64=GHASH_ASM
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# Now that we have defined all the arch specific variables, use the
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# appropriate one, and define the appropriate macros
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IF[$MODESASM_{- $target{asm_arch} -}]
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@ -84,3 +87,4 @@ INCLUDE[aes-gcm-armv8-unroll8_64.o]=..
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GENERATE[ghash-s390x.S]=asm/ghash-s390x.pl
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INCLUDE[ghash-s390x.o]=..
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GENERATE[ghash-c64xplus.S]=asm/ghash-c64xplus.pl
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GENERATE[ghash-riscv64.s]=asm/ghash-riscv64.pl
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@ -1,5 +1,5 @@
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/*
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* Copyright 2010-2021 The OpenSSL Project Authors. All Rights Reserved.
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* Copyright 2010-2022 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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@ -27,6 +27,11 @@ typedef size_t size_t_aX;
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# define PUTU32(p,v) *(u32 *)(p) = BSWAP4(v)
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#endif
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/* RISC-V uses C implementation of gmult as a fallback. */
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#if defined(__riscv)
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# define INCLUDE_C_GMULT_4BIT
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#endif
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#define PACK(s) ((size_t)(s)<<(sizeof(size_t)*8-16))
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#define REDUCE1BIT(V) do { \
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if (sizeof(size_t)==8) { \
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@ -289,7 +294,7 @@ static void gcm_init_4bit(u128 Htable[16], u64 H[2])
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# endif
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}
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# ifndef GHASH_ASM
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# if !defined(GHASH_ASM) || defined(INCLUDE_C_GMULT_4BIT)
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static const size_t rem_4bit[16] = {
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PACK(0x0000), PACK(0x1C20), PACK(0x3840), PACK(0x2460),
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PACK(0x7080), PACK(0x6CA0), PACK(0x48C0), PACK(0x54E0),
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@ -364,6 +369,9 @@ static void gcm_gmult_4bit(u64 Xi[2], const u128 Htable[16])
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}
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}
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# endif
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# if !defined(GHASH_ASM)
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# if !defined(OPENSSL_SMALL_FOOTPRINT)
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/*
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* Streamed gcm_mult_4bit, see CRYPTO_gcm128_[en|de]crypt for
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@ -689,6 +697,13 @@ void gcm_init_p8(u128 Htable[16], const u64 Xi[2]);
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void gcm_gmult_p8(u64 Xi[2], const u128 Htable[16]);
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void gcm_ghash_p8(u64 Xi[2], const u128 Htable[16], const u8 *inp,
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size_t len);
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# elif defined(OPENSSL_CPUID_OBJ) && defined(__riscv) && __riscv_xlen == 64
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# include "crypto/riscv_arch.h"
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# define GHASH_ASM_RISCV
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# define GCM_FUNCREF_4BIT
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# undef GHASH
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void gcm_init_clmul_rv64i_zbb_zbc(u128 Htable[16], const u64 Xi[2]);
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void gcm_gmult_clmul_rv64i_zbb_zbc(u64 Xi[2], const u128 Htable[16]);
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# endif
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#endif
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@ -805,6 +820,14 @@ void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block)
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ctx->gmult = gcm_gmult_4bit;
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CTX__GHASH(gcm_ghash_4bit);
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}
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# elif defined(GHASH_ASM_RISCV) && __riscv_xlen == 64
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if (RISCV_HAS_ZBB() && RISCV_HAS_ZBC()) {
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gcm_init_clmul_rv64i_zbb_zbc(ctx->Htable, ctx->H.u);
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ctx->gmult = gcm_gmult_clmul_rv64i_zbb_zbc;
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} else {
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gcm_init_4bit(ctx->Htable, ctx->H.u);
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ctx->gmult = gcm_gmult_4bit;
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}
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# else
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gcm_init_4bit(ctx->Htable, ctx->H.u);
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# endif
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