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x86cpuid.pl: sync OPENSSL_ia32_cpuid with x86_64cpuid.pl.
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@ -32,7 +32,33 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
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&or ("ebp","eax");
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&cmp ("ecx",0x6c65746e); # "ntel"
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&setne (&LB("eax"));
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&or ("ebp","eax");
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&or ("ebp","eax"); # 0 indicates Intel CPU
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&mov ("esi",1); # "number of [AMD] cores"
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&jz (&label("intel"));
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&cmp ("ebx",0x68747541); # "Auth"
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&setne (&LB("eax"));
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&mov ("esi","eax");
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&cmp ("edx",0x69746E65); # "enti"
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&setne (&LB("eax"));
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&or ("esi","eax");
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&cmp ("ecx",0x444D4163); # "cAMD"
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&setne (&LB("eax"));
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&or ("esi","eax"); # 0 indicates AMD CPU
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&jnz (&label("intel"));
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&mov ("eax",0x80000000);
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&cpuid ();
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&cmp ("eax",0x80000008);
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&mov ("esi",1); # "number of [AMD] cores"
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&jb (&label("intel"));
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&mov ("eax",0x80000008);
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&cpuid ();
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&movz ("esi",&LB("ecx")); # number of cores - 1
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&inc ("esi"); # number of cores
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&set_label("intel");
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&mov ("eax",1);
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&cpuid ();
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&cmp ("ebp",0);
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@ -45,7 +71,8 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
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&bt ("edx",28); # test hyper-threading bit
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&jnc (&label("done"));
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&shr ("ebx",16);
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&cmp (&LB("ebx"),1); # see if cache is shared(*)
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&and ("ebx",0xff);
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&cmp ("ebx","esi"); # see if cache is shared(*)
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&ja (&label("done"));
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&and ("edx",0xefffffff); # clear hyper-threading bit if not
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&set_label("done");
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