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riscv: Further optimization for single block aes-zvkned encryption.

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Interleave key loading and aes encrypt computing for single block aes.

Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>

Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
Reviewed-by: Hugo Landau <hlandau@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)
This commit is contained in:
Phoebe Chen 2023-10-04 01:42:10 -07:00 committed by Hugo Landau
parent 216424e18d
commit 42f1122848
1 changed files with 78 additions and 81 deletions
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159
crypto/aes/asm/aes-riscv64-zvkned.pl
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@ -273,42 +273,41 @@ ___
$code .= <<___;
.p2align 3
L_enc_128:
@{[vsetivli__x0_4_e32_m1_tu_mu]}
@{[vle32_v $v10, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
@{[vsetivli "zero", 4, "e32", "m1", "ta", "ma"]}
@{[vle32_v $v1, ($INP)]}
@{[vle32_v $v10, ($KEYP)]}
@{[vaesz_vs $v1, $v10]} # with round key w[ 0, 3]
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
@{[vaesem_vs $v1, $v11]} # with round key w[ 4, 7]
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
@{[vaesem_vs $v1, $v12]} # with round key w[ 8,11]
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
@{[vaesem_vs $v1, $v13]} # with round key w[12,15]
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
@{[vaesem_vs $v1, $v14]} # with round key w[16,19]
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
@{[vaesem_vs $v1, $v15]} # with round key w[20,23]
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
@{[vaesem_vs $v1, $v16]} # with round key w[24,27]
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
@{[vaesem_vs $v1, $v17]} # with round key w[28,31]
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
@{[vaesem_vs $v1, $v18]} # with round key w[32,35]
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
@{[vaesem_vs $v1, $v19]} # with round key w[36,39]
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
@{[vaesef_vs $v1, $v20]} # with round key w[40,43]
@{[vse32_v $v1, ($OUTP)]}
@ -320,48 +319,47 @@ ___
$code .= <<___;
.p2align 3
L_enc_192:
@{[vsetivli__x0_4_e32_m1_tu_mu]}
@{[vle32_v $v10, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v21, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v22, ($KEYP)]}
@{[vsetivli "zero", 4, "e32", "m1", "ta", "ma"]}
@{[vle32_v $v1, ($INP)]}
@{[vle32_v $v10, ($KEYP)]}
@{[vaesz_vs $v1, $v10]} # with round key w[ 0, 3]
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
@{[vaesem_vs $v1, $v11]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
@{[vaesem_vs $v1, $v12]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
@{[vaesem_vs $v1, $v13]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
@{[vaesem_vs $v1, $v14]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
@{[vaesem_vs $v1, $v15]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
@{[vaesem_vs $v1, $v16]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
@{[vaesem_vs $v1, $v17]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
@{[vaesem_vs $v1, $v18]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
@{[vaesem_vs $v1, $v19]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
@{[vaesem_vs $v1, $v20]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v21, ($KEYP)]}
@{[vaesem_vs $v1, $v21]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v22, ($KEYP)]}
@{[vaesef_vs $v1, $v22]}
@{[vse32_v $v1, ($OUTP)]}
@ -372,54 +370,53 @@ ___
$code .= <<___;
.p2align 3
L_enc_256:
@{[vsetivli__x0_4_e32_m1_tu_mu]}
@{[vle32_v $v10, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v21, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v22, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v23, ($KEYP)]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v24, ($KEYP)]}
@{[vsetivli "zero", 4, "e32", "m1", "ta", "ma"]}
@{[vle32_v $v1, ($INP)]}
@{[vle32_v $v10, ($KEYP)]}
@{[vaesz_vs $v1, $v10]} # with round key w[ 0, 3]
addi $KEYP, $KEYP, 16
@{[vle32_v $v11, ($KEYP)]}
@{[vaesem_vs $v1, $v11]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v12, ($KEYP)]}
@{[vaesem_vs $v1, $v12]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v13, ($KEYP)]}
@{[vaesem_vs $v1, $v13]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v14, ($KEYP)]}
@{[vaesem_vs $v1, $v14]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v15, ($KEYP)]}
@{[vaesem_vs $v1, $v15]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v16, ($KEYP)]}
@{[vaesem_vs $v1, $v16]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v17, ($KEYP)]}
@{[vaesem_vs $v1, $v17]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v18, ($KEYP)]}
@{[vaesem_vs $v1, $v18]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v19, ($KEYP)]}
@{[vaesem_vs $v1, $v19]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v20, ($KEYP)]}
@{[vaesem_vs $v1, $v20]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v21, ($KEYP)]}
@{[vaesem_vs $v1, $v21]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v22, ($KEYP)]}
@{[vaesem_vs $v1, $v22]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v23, ($KEYP)]}
@{[vaesem_vs $v1, $v23]}
addi $KEYP, $KEYP, 16
@{[vle32_v $v24, ($KEYP)]}
@{[vaesef_vs $v1, $v24]}
@{[vse32_v $v1, ($OUTP)]}