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openssl/crypto/chacha/build.info

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unified build scheme: add build.info files Now that we have the foundation for the "unified" build scheme in place, we add build.info files. They have been generated from the Makefiles in the same directories. Things that are platform specific will appear in later commits. Reviewed-by: Andy Polyakov <appro@openssl.org>
2016-01-30 06:33:10 +08:00
LIBS=../../libcrypto
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
$CHACHAASM=chacha_enc.c
IF[{- !$disabled{asm} -}]
Rename x86-32 assembly files from .s to .S. Rename x86-32 assembly files from .s to .S. While processing the .S file gcc will use the pre-processor whic will evaluate macros and ifdef. This is turn will be used to enable the endbr32 opcode based on the __CET__ define. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18353)
2022-05-20 04:09:50 +08:00
$CHACHAASM_x86=chacha-x86.S
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
$CHACHAASM_x86_64=chacha-x86_64.s
Generate the preprocessed .s files for chacha and poly 1305 on ia64 Reviewed-by: Richard Levitte <levitte@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18263)
2022-05-24 23:06:13 +08:00
$CHACHAASM_ia64=chacha-ia64.s
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
$CHACHAASM_s390x=chacha-s390x.S
$CHACHAASM_armv4=chacha-armv4.S
Acceleration of chacha20 on aarch64 by SVE This patch accelerates chacha20 on aarch64 when Scalable Vector Extension (SVE) is supported by CPU. Tested on modern micro-architecture with 256-bit SVE, it has the potential to improve performance up to 20% The solution takes a hybrid approach. SVE will handle multi-blocks that fit the SVE vector length, with Neon/Scalar to process any tail data Test result: With SVE type 1024 bytes 8192 bytes 16384 bytes ChaCha20 1596208.13k 1650010.79k 1653151.06k Without SVE (by Neon/Scalar) type 1024 bytes 8192 bytes 16384 bytes chacha20 1355487.91k 1372678.83k 1372662.44k The assembly code has been reviewed internally by ARM engineer Fangming.Fang@arm.com Signed-off-by: Daniel Hu <Daniel.Hu@arm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17916)
2022-02-07 18:17:06 +08:00
$CHACHAASM_aarch64=chacha-armv8.S chacha-armv8-sve.S
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
LoongArch64 assembly pack: add ChaCha20 modules This assembly implementation for ChaCha20 includes three code paths: scalar path, 128-bit LSX path and 256-bit LASX path. We prefer the LASX path or LSX path if the hardware and system support these extensions. There are 32 vector registers avaialable in the LSX and LASX extensions. So, we can load the 16 initial states and the 16 intermediate states of ChaCha into the 32 vector registers for calculating in the implementation. The test results on the 3A5000 and 3A6000 show that this assembly implementation significantly improves the performance of ChaCha20 on LoongArch based machines. The detailed test results are as following. Test with: $ openssl speed -evp chacha20 3A5000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 178484.53k 282789.93k 311793.70k 322234.99k 324405.93k 324659.88k assembly code 223152.28k 407863.65k 989520.55k 2049192.96k 2127248.70k 2131749.55k +25% +44% +217% +536% +556% +557% 3A6000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 214945.33k 310041.75k 340724.22k 349949.27k 352925.01k 353140.74k assembly code 299151.34k 492766.34k 2070166.02k 4300909.91k 4473978.88k 4499084.63k +39% +59% +508% +1129% +1168% +1174% Signed-off-by: Min Zhou <zhoumin@loongson.cn> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21998)
2023-09-07 11:07:53 +08:00
$CHACHAASM_loongarch64=chacha-loongarch64.S
Do not build P10-specific Chacha20 assembler on AIX Fixes #18145 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19865) (cherry picked from commit cdcc439aa0acba8a50b5e3444fb12d6e1157b991)
2022-12-09 00:26:19 +08:00
$CHACHAASM_ppc32=chacha_ppc.c chacha-ppc.s
Do not build P10-specific AES-GCM assembler on macOS Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20543)
2023-03-18 23:03:22 +08:00
IF[{- $target{sys_id} ne "AIX" && $target{sys_id} ne "MACOSX" -}]
Do not build P10-specific Chacha20 assembler on AIX Fixes #18145 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19865) (cherry picked from commit cdcc439aa0acba8a50b5e3444fb12d6e1157b991)
2022-12-09 00:26:19 +08:00
$CHACHAASM_ppc32=chacha_ppc.c chacha-ppc.s chachap10-ppc.s
ENDIF
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
$CHACHAASM_ppc64=$CHACHAASM_ppc32
$CHACHAASM_c64xplus=chacha-c64xplus.s
riscv: Provide a vector only implementation of Chacha20 cipher Although we have a Zvkb version of Chacha20, the Zvkb from the RISC-V Vector Cryptography Bit-manipulation extension was ratified in late 2023 and does not come to the RVA23 Profile. Many CPUs in 2024 currently do not support Zvkb but may have Vector and Bit-manipulation, which are already in the RVA22 Profile. This commit provides a vector-only implementation that replaced the vror with vsll+vsrl+vor and can provide enough speed for Chacha20 for new CPUs this year. Signed-off-by: Yangyu Chen <cyy@cyyself.name> Reviewed-by: Paul Dale <ppzgs1@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/24069)
2024-04-19 11:49:59 +08:00
$CHACHAASM_riscv64=chacha_riscv.c chacha_enc.c chacha-riscv64-v-zbb.s chacha-riscv64-v-zbb-zvkb.s
riscv: Provide a vector implementation of CHACHA20 cipher. Use rvv and zvbb extensions for CHACHA20 cipher. Signed-off-by: Jerry Shih <jerry.shih@sifive.com> Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21923)
2023-07-11 15:49:28 +08:00
$CHACHADEF_riscv64=INCLUDE_C_CHACHA20
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
# Now that we have defined all the arch specific variables, use the
# appropriate one
IF[$CHACHAASM_{- $target{asm_arch} -}]
$CHACHAASM=$CHACHAASM_{- $target{asm_arch} -}
riscv: Provide a vector implementation of CHACHA20 cipher. Use rvv and zvbb extensions for CHACHA20 cipher. Signed-off-by: Jerry Shih <jerry.shih@sifive.com> Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21923)
2023-07-11 15:49:28 +08:00
$CHACHADEF=$CHACHADEF_{- $target{asm_arch} -}
Move chacha_asm_src file information to build.info files Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9166)
2019-06-17 04:21:50 +08:00
ENDIF
ENDIF
SOURCE[../../libcrypto]=$CHACHAASM
riscv: Provide a vector implementation of CHACHA20 cipher. Use rvv and zvbb extensions for CHACHA20 cipher. Signed-off-by: Jerry Shih <jerry.shih@sifive.com> Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21923)
2023-07-11 15:49:28 +08:00
DEFINE[../../libcrypto]=$CHACHADEF
unified build scheme: add a "unified" template for Unix Makefile This also adds all the raw sections needed for some files. Reviewed-by: Rich Salz <rsalz@openssl.org>
2016-01-30 10:25:40 +08:00
Rename x86-32 assembly files from .s to .S. Rename x86-32 assembly files from .s to .S. While processing the .S file gcc will use the pre-processor whic will evaluate macros and ifdef. This is turn will be used to enable the endbr32 opcode based on the __CET__ define. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18353)
2022-05-20 04:09:50 +08:00
GENERATE[chacha-x86.S]=asm/chacha-x86.pl
build.info: For all assembler generators, remove all arguments Since the arguments are now generated in the build file templates, they should be removed from the build.info files. Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9884)
2019-09-13 06:05:26 +08:00
GENERATE[chacha-x86_64.s]=asm/chacha-x86_64.pl
GENERATE[chacha-ppc.s]=asm/chacha-ppc.pl
chacha20 performance optimizations for ppc64le with 8x lanes, Performance increase around 50%. Co-authored-by: Madhusudhanan Duraisamy <madurais@in.ibm.com> Co-authored-by: Nilamjyoti Goswami <nilamgoswami@in.ibm.com> Co-authored-by: Siva Sundar Anbareeswaran <srisivasundar@in.ibm.com> Reviewed-by: Danny Tsen <dtsen@us.ibm.com> Tested-by: Danny Tsen <dtsen@us.ibm.com> Signed-off-by: Danny <dtsen@us.ibm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/16637)
2021-09-20 22:45:15 +08:00
GENERATE[chachap10-ppc.s]=asm/chachap10-ppc.pl
build.info: For all assembler generators, remove all arguments Since the arguments are now generated in the build file templates, they should be removed from the build.info files. Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9884)
2019-09-13 06:05:26 +08:00
GENERATE[chacha-armv4.S]=asm/chacha-armv4.pl
crypto/*/build.info: make it work on ARM platforms. Reviewed-by: Richard Levitte <levitte@openssl.org>
2016-03-11 20:44:46 +08:00
INCLUDE[chacha-armv4.o]=..
build.info: For all assembler generators, remove all arguments Since the arguments are now generated in the build file templates, they should be removed from the build.info files. Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9884)
2019-09-13 06:05:26 +08:00
GENERATE[chacha-armv8.S]=asm/chacha-armv8.pl
Acceleration of chacha20 on aarch64 by SVE This patch accelerates chacha20 on aarch64 when Scalable Vector Extension (SVE) is supported by CPU. Tested on modern micro-architecture with 256-bit SVE, it has the potential to improve performance up to 20% The solution takes a hybrid approach. SVE will handle multi-blocks that fit the SVE vector length, with Neon/Scalar to process any tail data Test result: With SVE type 1024 bytes 8192 bytes 16384 bytes ChaCha20 1596208.13k 1650010.79k 1653151.06k Without SVE (by Neon/Scalar) type 1024 bytes 8192 bytes 16384 bytes chacha20 1355487.91k 1372678.83k 1372662.44k The assembly code has been reviewed internally by ARM engineer Fangming.Fang@arm.com Signed-off-by: Daniel Hu <Daniel.Hu@arm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17916)
2022-02-07 18:17:06 +08:00
GENERATE[chacha-armv8-sve.S]=asm/chacha-armv8-sve.pl
crypto/*/build.info: make it work on ARM platforms. Reviewed-by: Richard Levitte <levitte@openssl.org>
2016-03-11 20:44:46 +08:00
INCLUDE[chacha-armv8.o]=..
Acceleration of chacha20 on aarch64 by SVE This patch accelerates chacha20 on aarch64 when Scalable Vector Extension (SVE) is supported by CPU. Tested on modern micro-architecture with 256-bit SVE, it has the potential to improve performance up to 20% The solution takes a hybrid approach. SVE will handle multi-blocks that fit the SVE vector length, with Neon/Scalar to process any tail data Test result: With SVE type 1024 bytes 8192 bytes 16384 bytes ChaCha20 1596208.13k 1650010.79k 1653151.06k Without SVE (by Neon/Scalar) type 1024 bytes 8192 bytes 16384 bytes chacha20 1355487.91k 1372678.83k 1372662.44k The assembly code has been reviewed internally by ARM engineer Fangming.Fang@arm.com Signed-off-by: Daniel Hu <Daniel.Hu@arm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17916)
2022-02-07 18:17:06 +08:00
INCLUDE[chacha-armv8-sve.o]=..
LoongArch64 assembly pack: add ChaCha20 modules This assembly implementation for ChaCha20 includes three code paths: scalar path, 128-bit LSX path and 256-bit LASX path. We prefer the LASX path or LSX path if the hardware and system support these extensions. There are 32 vector registers avaialable in the LSX and LASX extensions. So, we can load the 16 initial states and the 16 intermediate states of ChaCha into the 32 vector registers for calculating in the implementation. The test results on the 3A5000 and 3A6000 show that this assembly implementation significantly improves the performance of ChaCha20 on LoongArch based machines. The detailed test results are as following. Test with: $ openssl speed -evp chacha20 3A5000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 178484.53k 282789.93k 311793.70k 322234.99k 324405.93k 324659.88k assembly code 223152.28k 407863.65k 989520.55k 2049192.96k 2127248.70k 2131749.55k +25% +44% +217% +536% +556% +557% 3A6000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 214945.33k 310041.75k 340724.22k 349949.27k 352925.01k 353140.74k assembly code 299151.34k 492766.34k 2070166.02k 4300909.91k 4473978.88k 4499084.63k +39% +59% +508% +1129% +1168% +1174% Signed-off-by: Min Zhou <zhoumin@loongson.cn> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21998)
2023-09-07 11:07:53 +08:00
INCLUDE[chacha-loongarch64.o]=..
crypto/chacha/asm/chacha-s390x.pl: add vx code path. Signed-off-by: Patrick Steuer <patrick.steuer@de.ibm.com> Reviewed-by: Tim Hudson <tjh@openssl.org> Reviewed-by: Richard Levitte <levitte@openssl.org> (Merged from https://github.com/openssl/openssl/pull/6919)
2018-08-04 06:10:06 +08:00
INCLUDE[chacha-s390x.o]=..
build.info: For all assembler generators, remove all arguments Since the arguments are now generated in the build file templates, they should be removed from the build.info files. Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/9884)
2019-09-13 06:05:26 +08:00
GENERATE[chacha-c64xplus.S]=asm/chacha-c64xplus.pl
GENERATE[chacha-s390x.S]=asm/chacha-s390x.pl
Revert "Use .s extension for ia64 assembler" This reverts commit 6009997abd2594d5a7c0606176f404190922b74d. The .s extension is incorrect as the assembler files contain preprocessor directives. Fixes #18259 Reviewed-by: Richard Levitte <levitte@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18263)
2022-05-06 22:48:49 +08:00
GENERATE[chacha-ia64.S]=asm/chacha-ia64.pl
Generate the preprocessed .s files for chacha and poly 1305 on ia64 Reviewed-by: Richard Levitte <levitte@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18263)
2022-05-24 23:06:13 +08:00
GENERATE[chacha-ia64.s]=chacha-ia64.S
LoongArch64 assembly pack: add ChaCha20 modules This assembly implementation for ChaCha20 includes three code paths: scalar path, 128-bit LSX path and 256-bit LASX path. We prefer the LASX path or LSX path if the hardware and system support these extensions. There are 32 vector registers avaialable in the LSX and LASX extensions. So, we can load the 16 initial states and the 16 intermediate states of ChaCha into the 32 vector registers for calculating in the implementation. The test results on the 3A5000 and 3A6000 show that this assembly implementation significantly improves the performance of ChaCha20 on LoongArch based machines. The detailed test results are as following. Test with: $ openssl speed -evp chacha20 3A5000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 178484.53k 282789.93k 311793.70k 322234.99k 324405.93k 324659.88k assembly code 223152.28k 407863.65k 989520.55k 2049192.96k 2127248.70k 2131749.55k +25% +44% +217% +536% +556% +557% 3A6000 type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes C code 214945.33k 310041.75k 340724.22k 349949.27k 352925.01k 353140.74k assembly code 299151.34k 492766.34k 2070166.02k 4300909.91k 4473978.88k 4499084.63k +39% +59% +508% +1129% +1168% +1174% Signed-off-by: Min Zhou <zhoumin@loongson.cn> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21998)
2023-09-07 11:07:53 +08:00
GENERATE[chacha-loongarch64.S]=asm/chacha-loongarch64.pl
riscv: Provide a vector only implementation of Chacha20 cipher Although we have a Zvkb version of Chacha20, the Zvkb from the RISC-V Vector Cryptography Bit-manipulation extension was ratified in late 2023 and does not come to the RVA23 Profile. Many CPUs in 2024 currently do not support Zvkb but may have Vector and Bit-manipulation, which are already in the RVA22 Profile. This commit provides a vector-only implementation that replaced the vror with vsll+vsrl+vor and can provide enough speed for Chacha20 for new CPUs this year. Signed-off-by: Yangyu Chen <cyy@cyyself.name> Reviewed-by: Paul Dale <ppzgs1@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/24069)
2024-04-19 11:49:59 +08:00
GENERATE[chacha-riscv64-v-zbb.s]=asm/chacha-riscv64-v-zbb.pl
GENERATE[chacha-riscv64-v-zbb-zvkb.s]=asm/chacha-riscv64-v-zbb.pl zvkb
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