2016-04-20 10:10:43 +08:00
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#! /usr/bin/env perl
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Fix issues in ia32 RDRAND asm leading to reduced entropy
This patch fixes two issues in the ia32 RDRAND assembly code that result in a
(possibly significant) loss of entropy.
The first, less significant, issue is that, by returning success as 0 from
OPENSSL_ia32_rdrand() and OPENSSL_ia32_rdseed(), a subtle bias was introduced.
Specifically, because the assembly routine copied the remaining number of
retries over the result when RDRAND/RDSEED returned 'successful but zero', a
bias towards values 1-8 (primarily 8) was introduced.
The second, more worrying issue was that, due to a mixup in registers, when a
buffer that was not size 0 or 1 mod 8 was passed to OPENSSL_ia32_rdrand_bytes
or OPENSSL_ia32_rdseed_bytes, the last (n mod 8) bytes were all the same value.
This issue impacts only the 64-bit variant of the assembly.
This change fixes both issues by first eliminating the only use of
OPENSSL_ia32_rdrand, replacing it with OPENSSL_ia32_rdrand_bytes, and fixes the
register mixup in OPENSSL_ia32_rdrand_bytes. It also adds a sanity test for
OPENSSL_ia32_rdrand_bytes and OPENSSL_ia32_rdseed_bytes to help catch problems
of this nature in the future.
Reviewed-by: Andy Polyakov <appro@openssl.org>
Reviewed-by: Rich Salz <rsalz@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/5342)
2018-03-08 05:01:06 +08:00
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# Copyright 2005-2018 The OpenSSL Project Authors. All Rights Reserved.
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2016-04-20 10:10:43 +08:00
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#
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2018-12-06 21:03:01 +08:00
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# Licensed under the Apache License 2.0 (the "License"). You may not use
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2016-04-20 10:10:43 +08:00
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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2004-07-27 04:18:55 +08:00
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2008-11-12 16:15:52 +08:00
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$flavour = shift;
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$output = shift;
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if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
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2004-07-27 04:18:55 +08:00
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2008-11-12 16:15:52 +08:00
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$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
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2004-11-21 18:36:25 +08:00
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2008-11-12 16:15:52 +08:00
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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2011-06-04 20:20:45 +08:00
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( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}perlasm/x86_64-xlate.pl" and -f $xlate) or
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die "can't locate x86_64-xlate.pl";
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2016-05-28 22:25:38 +08:00
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open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
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2013-01-23 05:11:31 +08:00
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*STDOUT=*OUT;
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2004-11-21 18:36:25 +08:00
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2011-04-17 20:46:00 +08:00
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($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
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("%rdi","%rsi","%rdx","%rcx"); # Unix order
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2008-11-12 16:15:52 +08:00
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print<<___;
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.extern OPENSSL_cpuid_setup
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2011-05-19 00:24:19 +08:00
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.hidden OPENSSL_cpuid_setup
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2008-11-12 16:15:52 +08:00
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.section .init
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call OPENSSL_cpuid_setup
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2007-05-14 23:57:19 +08:00
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2011-05-19 00:24:19 +08:00
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.hidden OPENSSL_ia32cap_P
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2012-11-18 03:04:15 +08:00
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.comm OPENSSL_ia32cap_P,16,4
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2011-05-19 00:24:19 +08:00
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2004-07-27 04:18:55 +08:00
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.text
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2004-11-21 18:36:25 +08:00
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.globl OPENSSL_atomic_add
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2008-11-12 16:15:52 +08:00
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.type OPENSSL_atomic_add,\@abi-omnipotent
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2004-11-21 18:36:25 +08:00
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.align 16
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OPENSSL_atomic_add:
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2008-11-12 16:15:52 +08:00
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movl ($arg1),%eax
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.Lspin: leaq ($arg2,%rax),%r8
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.byte 0xf0 # lock
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cmpxchgl %r8d,($arg1)
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2004-11-21 18:36:25 +08:00
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jne .Lspin
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2005-06-20 22:56:48 +08:00
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movl %r8d,%eax
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2008-11-12 16:15:52 +08:00
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.byte 0x48,0x98 # cltq/cdqe
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2004-11-21 18:36:25 +08:00
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ret
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.size OPENSSL_atomic_add,.-OPENSSL_atomic_add
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2007-05-14 23:57:19 +08:00
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.globl OPENSSL_rdtsc
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.type OPENSSL_rdtsc,\@abi-omnipotent
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.align 16
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OPENSSL_rdtsc:
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rdtsc
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shl \$32,%rdx
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or %rdx,%rax
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ret
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.size OPENSSL_rdtsc,.-OPENSSL_rdtsc
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2004-11-21 18:36:25 +08:00
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.globl OPENSSL_ia32_cpuid
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2012-11-18 03:04:15 +08:00
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.type OPENSSL_ia32_cpuid,\@function,1
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2004-11-21 18:36:25 +08:00
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.align 16
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OPENSSL_ia32_cpuid:
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2017-02-26 05:17:21 +08:00
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.cfi_startproc
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2011-05-17 04:35:11 +08:00
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mov %rbx,%r8 # save %rbx
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2017-02-26 05:17:21 +08:00
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.cfi_register %rbx,%r8
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2007-04-02 17:50:14 +08:00
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xor %eax,%eax
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2017-11-06 03:03:17 +08:00
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mov %rax,8(%rdi) # clear extended feature flags
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2007-04-02 17:50:14 +08:00
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cpuid
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2009-05-15 02:17:26 +08:00
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mov %eax,%r11d # max value for standard query level
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2007-04-02 17:50:14 +08:00
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xor %eax,%eax
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cmp \$0x756e6547,%ebx # "Genu"
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setne %al
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mov %eax,%r9d
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cmp \$0x49656e69,%edx # "ineI"
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setne %al
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or %eax,%r9d
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cmp \$0x6c65746e,%ecx # "ntel"
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setne %al
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2009-05-13 05:01:13 +08:00
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or %eax,%r9d # 0 indicates Intel CPU
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jz .Lintel
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cmp \$0x68747541,%ebx # "Auth"
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setne %al
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mov %eax,%r10d
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cmp \$0x69746E65,%edx # "enti"
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setne %al
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or %eax,%r10d
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cmp \$0x444D4163,%ecx # "cAMD"
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setne %al
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or %eax,%r10d # 0 indicates AMD CPU
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jnz .Lintel
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2009-05-15 02:17:26 +08:00
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# AMD specific
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2009-05-13 05:01:13 +08:00
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mov \$0x80000000,%eax
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cpuid
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2011-05-17 04:35:11 +08:00
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cmp \$0x80000001,%eax
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jb .Lintel
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mov %eax,%r10d
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mov \$0x80000001,%eax
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cpuid
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or %ecx,%r9d
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and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
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cmp \$0x80000008,%r10d
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2009-05-13 05:01:13 +08:00
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jb .Lintel
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mov \$0x80000008,%eax
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cpuid
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movzb %cl,%r10 # number of cores - 1
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inc %r10 # number of cores
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2007-04-02 17:50:14 +08:00
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2009-05-15 02:17:26 +08:00
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mov \$1,%eax
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cpuid
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bt \$28,%edx # test hyper-threading bit
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2011-05-17 04:35:11 +08:00
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jnc .Lgeneric
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2009-05-15 02:17:26 +08:00
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shr \$16,%ebx # number of logical processors
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cmp %r10b,%bl
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2011-05-17 04:35:11 +08:00
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ja .Lgeneric
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2009-05-15 02:17:26 +08:00
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and \$0xefffffff,%edx # ~(1<<28)
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2011-05-17 04:35:11 +08:00
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jmp .Lgeneric
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2009-05-15 02:17:26 +08:00
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2009-05-13 05:01:13 +08:00
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.Lintel:
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2009-05-15 02:17:26 +08:00
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cmp \$4,%r11d
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mov \$-1,%r10d
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jb .Lnocacheinfo
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mov \$4,%eax
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mov \$0,%ecx # query L1D
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cpuid
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mov %eax,%r10d
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shr \$14,%r10d
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and \$0xfff,%r10d # number of cores -1 per L1D
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.Lnocacheinfo:
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2007-05-14 23:57:19 +08:00
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mov \$1,%eax
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2004-11-21 18:36:25 +08:00
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cpuid
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2017-12-04 21:03:05 +08:00
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movd %eax,%xmm0 # put aside processor id
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2011-05-27 23:32:43 +08:00
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and \$0xbfefffff,%edx # force reserved bits to 0
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2007-05-14 23:57:19 +08:00
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cmp \$0,%r9d
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2007-04-02 17:50:14 +08:00
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jne .Lnotintel
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2011-05-27 23:32:43 +08:00
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or \$0x40000000,%edx # set reserved bit#30 on Intel CPUs
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2007-04-02 17:50:14 +08:00
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and \$15,%ah
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cmp \$15,%ah # examine Family ID
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2017-07-20 15:48:35 +08:00
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jne .LnotP4
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2011-05-27 23:32:43 +08:00
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or \$0x00100000,%edx # set reserved bit#20 to engage RC4_CHAR
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2017-07-20 15:48:35 +08:00
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.LnotP4:
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cmp \$6,%ah
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jne .Lnotintel
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2017-07-25 05:50:47 +08:00
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and \$0x0fff0ff0,%eax
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2017-07-20 15:48:35 +08:00
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cmp \$0x00050670,%eax # Knights Landing
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je .Lknights
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cmp \$0x00080650,%eax # Knights Mill (according to sde)
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jne .Lnotintel
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.Lknights:
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and \$0xfbffffff,%ecx # clear XSAVE flag to mimic Silvermont
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2007-04-02 17:50:14 +08:00
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.Lnotintel:
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2007-07-21 22:46:27 +08:00
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bt \$28,%edx # test hyper-threading bit
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2011-05-17 04:35:11 +08:00
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jnc .Lgeneric
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2009-05-15 02:17:26 +08:00
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and \$0xefffffff,%edx # ~(1<<28)
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cmp \$0,%r10d
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2011-05-17 04:35:11 +08:00
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je .Lgeneric
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2009-05-15 02:17:26 +08:00
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or \$0x10000000,%edx # 1<<28
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2007-04-02 17:50:14 +08:00
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shr \$16,%ebx
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2009-05-15 02:17:26 +08:00
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cmp \$1,%bl # see if cache is shared
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2011-05-17 04:35:11 +08:00
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ja .Lgeneric
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2007-05-14 23:57:19 +08:00
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and \$0xefffffff,%edx # ~(1<<28)
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2011-05-17 04:35:11 +08:00
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.Lgeneric:
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and \$0x00000800,%r9d # isolate AMD XOP flag
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and \$0xfffff7ff,%ecx
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2011-05-26 21:16:26 +08:00
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or %ecx,%r9d # merge AMD XOP flag
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2011-05-17 04:35:11 +08:00
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2011-05-26 21:16:26 +08:00
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mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
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2017-03-12 21:45:06 +08:00
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cmp \$7,%r11d
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jb .Lno_extended_info
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mov \$7,%eax
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xor %ecx,%ecx
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cpuid
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2017-07-20 15:48:35 +08:00
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bt \$26,%r9d # check XSAVE bit, cleared on Knights
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jc .Lnotknights
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and \$0xfff7ffff,%ebx # clear ADCX/ADOX flag
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.Lnotknights:
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2017-12-04 21:03:05 +08:00
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movd %xmm0,%eax # restore processor id
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and \$0x0fff0ff0,%eax
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cmp \$0x00050650,%eax # Skylake-X
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jne .Lnotskylakex
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and \$0xfffeffff,%ebx # ~(1<<16)
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# suppress AVX512F flag on Skylake-X
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.Lnotskylakex:
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2017-03-12 21:45:06 +08:00
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mov %ebx,8(%rdi) # save extended feature flags
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2017-11-06 03:03:17 +08:00
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mov %ecx,12(%rdi)
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2017-03-12 21:45:06 +08:00
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.Lno_extended_info:
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2011-05-26 21:16:26 +08:00
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bt \$27,%r9d # check OSXSAVE bit
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2011-05-17 04:35:11 +08:00
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jnc .Lclear_avx
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xor %ecx,%ecx # XCR0
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.byte 0x0f,0x01,0xd0 # xgetbv
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2017-01-28 02:03:37 +08:00
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and \$0xe6,%eax # isolate XMM, YMM and ZMM state support
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cmp \$0xe6,%eax
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je .Ldone
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2017-11-23 03:48:44 +08:00
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andl \$0x3fdeffff,8(%rdi) # ~(1<<31|1<<30|1<<21|1<<16)
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# clear AVX512F+BW+VL+FIMA, all of
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# them are EVEX-encoded, which requires
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# ZMM state support even if one uses
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# only XMM and YMM :-(
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2011-05-17 04:35:11 +08:00
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and \$6,%eax # isolate XMM and YMM state support
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cmp \$6,%eax
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je .Ldone
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.Lclear_avx:
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mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
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2011-05-26 21:16:26 +08:00
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and %eax,%r9d # clear AVX, FMA and AMD XOP bits
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2017-01-28 02:03:37 +08:00
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mov \$0x3fdeffdf,%eax # ~(1<<31|1<<30|1<<21|1<<16|1<<5)
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2017-07-27 00:30:27 +08:00
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and %eax,8(%rdi) # clear AVX2 and AVX512* bits
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2011-05-17 04:35:11 +08:00
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.Ldone:
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2011-05-26 21:16:26 +08:00
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shl \$32,%r9
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mov %r10d,%eax
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2011-05-17 04:35:11 +08:00
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mov %r8,%rbx # restore %rbx
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2017-02-26 05:17:21 +08:00
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.cfi_restore %rbx
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2011-05-26 21:16:26 +08:00
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or %r9,%rax
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2004-11-21 18:36:25 +08:00
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ret
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2017-02-26 05:17:21 +08:00
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.cfi_endproc
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2004-11-21 18:36:25 +08:00
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.size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid
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2007-05-15 05:35:25 +08:00
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.globl OPENSSL_cleanse
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2008-11-12 16:15:52 +08:00
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.type OPENSSL_cleanse,\@abi-omnipotent
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2007-05-15 05:35:25 +08:00
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.align 16
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OPENSSL_cleanse:
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xor %rax,%rax
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2008-11-12 16:15:52 +08:00
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cmp \$15,$arg2
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2007-05-15 05:35:25 +08:00
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jae .Lot
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2010-01-24 22:54:24 +08:00
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cmp \$0,$arg2
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je .Lret
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2007-05-15 05:35:25 +08:00
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.Little:
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2008-11-12 16:15:52 +08:00
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mov %al,($arg1)
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sub \$1,$arg2
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lea 1($arg1),$arg1
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2007-05-15 05:35:25 +08:00
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jnz .Little
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2010-04-15 03:24:48 +08:00
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.Lret:
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ret
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2007-05-15 05:35:25 +08:00
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|
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.align 16
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|
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.Lot:
|
2008-11-12 16:15:52 +08:00
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test \$7,$arg1
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2007-05-15 05:35:25 +08:00
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jz .Laligned
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2008-11-12 16:15:52 +08:00
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mov %al,($arg1)
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lea -1($arg2),$arg2
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lea 1($arg1),$arg1
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2007-05-15 05:35:25 +08:00
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jmp .Lot
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.Laligned:
|
2008-11-12 16:15:52 +08:00
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mov %rax,($arg1)
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lea -8($arg2),$arg2
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test \$-8,$arg2
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|
|
lea 8($arg1),$arg1
|
2007-05-15 05:35:25 +08:00
|
|
|
jnz .Laligned
|
2008-11-12 16:15:52 +08:00
|
|
|
cmp \$0,$arg2
|
2007-05-15 05:35:25 +08:00
|
|
|
jne .Little
|
|
|
|
ret
|
|
|
|
.size OPENSSL_cleanse,.-OPENSSL_cleanse
|
2016-05-15 23:01:15 +08:00
|
|
|
|
|
|
|
.globl CRYPTO_memcmp
|
|
|
|
.type CRYPTO_memcmp,\@abi-omnipotent
|
|
|
|
.align 16
|
|
|
|
CRYPTO_memcmp:
|
|
|
|
xor %rax,%rax
|
|
|
|
xor %r10,%r10
|
|
|
|
cmp \$0,$arg3
|
|
|
|
je .Lno_data
|
2018-05-20 18:13:16 +08:00
|
|
|
cmp \$16,$arg3
|
|
|
|
jne .Loop_cmp
|
|
|
|
mov ($arg1),%r10
|
|
|
|
mov 8($arg1),%r11
|
|
|
|
mov \$1,$arg3
|
|
|
|
xor ($arg2),%r10
|
|
|
|
xor 8($arg2),%r11
|
|
|
|
or %r11,%r10
|
|
|
|
cmovnz $arg3,%rax
|
|
|
|
ret
|
|
|
|
|
|
|
|
.align 16
|
2016-05-15 23:01:15 +08:00
|
|
|
.Loop_cmp:
|
|
|
|
mov ($arg1),%r10b
|
|
|
|
lea 1($arg1),$arg1
|
|
|
|
xor ($arg2),%r10b
|
|
|
|
lea 1($arg2),$arg2
|
|
|
|
or %r10b,%al
|
|
|
|
dec $arg3
|
|
|
|
jnz .Loop_cmp
|
|
|
|
neg %rax
|
|
|
|
shr \$63,%rax
|
|
|
|
.Lno_data:
|
|
|
|
ret
|
|
|
|
.size CRYPTO_memcmp,.-CRYPTO_memcmp
|
2004-07-27 04:18:55 +08:00
|
|
|
___
|
2008-11-12 16:15:52 +08:00
|
|
|
|
|
|
|
print<<___ if (!$win64);
|
|
|
|
.globl OPENSSL_wipe_cpu
|
|
|
|
.type OPENSSL_wipe_cpu,\@abi-omnipotent
|
|
|
|
.align 16
|
|
|
|
OPENSSL_wipe_cpu:
|
|
|
|
pxor %xmm0,%xmm0
|
|
|
|
pxor %xmm1,%xmm1
|
|
|
|
pxor %xmm2,%xmm2
|
|
|
|
pxor %xmm3,%xmm3
|
|
|
|
pxor %xmm4,%xmm4
|
|
|
|
pxor %xmm5,%xmm5
|
|
|
|
pxor %xmm6,%xmm6
|
|
|
|
pxor %xmm7,%xmm7
|
|
|
|
pxor %xmm8,%xmm8
|
|
|
|
pxor %xmm9,%xmm9
|
|
|
|
pxor %xmm10,%xmm10
|
|
|
|
pxor %xmm11,%xmm11
|
|
|
|
pxor %xmm12,%xmm12
|
|
|
|
pxor %xmm13,%xmm13
|
|
|
|
pxor %xmm14,%xmm14
|
|
|
|
pxor %xmm15,%xmm15
|
|
|
|
xorq %rcx,%rcx
|
|
|
|
xorq %rdx,%rdx
|
|
|
|
xorq %rsi,%rsi
|
|
|
|
xorq %rdi,%rdi
|
|
|
|
xorq %r8,%r8
|
|
|
|
xorq %r9,%r9
|
|
|
|
xorq %r10,%r10
|
|
|
|
xorq %r11,%r11
|
|
|
|
leaq 8(%rsp),%rax
|
|
|
|
ret
|
|
|
|
.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
|
|
|
|
___
|
|
|
|
print<<___ if ($win64);
|
|
|
|
.globl OPENSSL_wipe_cpu
|
|
|
|
.type OPENSSL_wipe_cpu,\@abi-omnipotent
|
|
|
|
.align 16
|
|
|
|
OPENSSL_wipe_cpu:
|
|
|
|
pxor %xmm0,%xmm0
|
|
|
|
pxor %xmm1,%xmm1
|
|
|
|
pxor %xmm2,%xmm2
|
|
|
|
pxor %xmm3,%xmm3
|
|
|
|
pxor %xmm4,%xmm4
|
|
|
|
pxor %xmm5,%xmm5
|
|
|
|
xorq %rcx,%rcx
|
|
|
|
xorq %rdx,%rdx
|
|
|
|
xorq %r8,%r8
|
|
|
|
xorq %r9,%r9
|
|
|
|
xorq %r10,%r10
|
|
|
|
xorq %r11,%r11
|
|
|
|
leaq 8(%rsp),%rax
|
|
|
|
ret
|
|
|
|
.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
|
|
|
|
___
|
2011-04-17 20:46:00 +08:00
|
|
|
{
|
|
|
|
my $out="%r10";
|
|
|
|
my $cnt="%rcx";
|
|
|
|
my $max="%r11";
|
|
|
|
my $lasttick="%r8d";
|
|
|
|
my $lastdiff="%r9d";
|
|
|
|
my $redzone=win64?8:-8;
|
|
|
|
|
|
|
|
print<<___;
|
|
|
|
.globl OPENSSL_instrument_bus
|
|
|
|
.type OPENSSL_instrument_bus,\@abi-omnipotent
|
|
|
|
.align 16
|
|
|
|
OPENSSL_instrument_bus:
|
|
|
|
mov $arg1,$out # tribute to Win64
|
|
|
|
mov $arg2,$cnt
|
|
|
|
mov $arg2,$max
|
|
|
|
|
|
|
|
rdtsc # collect 1st tick
|
|
|
|
mov %eax,$lasttick # lasttick = tick
|
|
|
|
mov \$0,$lastdiff # lastdiff = 0
|
|
|
|
clflush ($out)
|
2011-05-17 04:35:11 +08:00
|
|
|
.byte 0xf0 # lock
|
2011-04-17 20:46:00 +08:00
|
|
|
add $lastdiff,($out)
|
|
|
|
jmp .Loop
|
|
|
|
.align 16
|
|
|
|
.Loop: rdtsc
|
|
|
|
mov %eax,%edx
|
|
|
|
sub $lasttick,%eax
|
|
|
|
mov %edx,$lasttick
|
|
|
|
mov %eax,$lastdiff
|
|
|
|
clflush ($out)
|
2011-05-17 04:35:11 +08:00
|
|
|
.byte 0xf0 # lock
|
2011-04-17 20:46:00 +08:00
|
|
|
add %eax,($out)
|
|
|
|
lea 4($out),$out
|
|
|
|
sub \$1,$cnt
|
|
|
|
jnz .Loop
|
|
|
|
|
|
|
|
mov $max,%rax
|
|
|
|
ret
|
|
|
|
.size OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
|
|
|
|
|
|
|
|
.globl OPENSSL_instrument_bus2
|
|
|
|
.type OPENSSL_instrument_bus2,\@abi-omnipotent
|
|
|
|
.align 16
|
|
|
|
OPENSSL_instrument_bus2:
|
|
|
|
mov $arg1,$out # tribute to Win64
|
|
|
|
mov $arg2,$cnt
|
|
|
|
mov $arg3,$max
|
|
|
|
mov $cnt,$redzone(%rsp)
|
|
|
|
|
|
|
|
rdtsc # collect 1st tick
|
|
|
|
mov %eax,$lasttick # lasttick = tick
|
|
|
|
mov \$0,$lastdiff # lastdiff = 0
|
|
|
|
|
|
|
|
clflush ($out)
|
2011-05-17 04:35:11 +08:00
|
|
|
.byte 0xf0 # lock
|
2011-04-17 20:46:00 +08:00
|
|
|
add $lastdiff,($out)
|
|
|
|
|
|
|
|
rdtsc # collect 1st diff
|
|
|
|
mov %eax,%edx
|
|
|
|
sub $lasttick,%eax # diff
|
|
|
|
mov %edx,$lasttick # lasttick = tick
|
|
|
|
mov %eax,$lastdiff # lastdiff = diff
|
|
|
|
.Loop2:
|
|
|
|
clflush ($out)
|
2011-05-17 04:35:11 +08:00
|
|
|
.byte 0xf0 # lock
|
2011-04-17 20:46:00 +08:00
|
|
|
add %eax,($out) # accumulate diff
|
|
|
|
|
|
|
|
sub \$1,$max
|
|
|
|
jz .Ldone2
|
|
|
|
|
|
|
|
rdtsc
|
|
|
|
mov %eax,%edx
|
|
|
|
sub $lasttick,%eax # diff
|
|
|
|
mov %edx,$lasttick # lasttick = tick
|
|
|
|
cmp $lastdiff,%eax
|
|
|
|
mov %eax,$lastdiff # lastdiff = diff
|
|
|
|
mov \$0,%edx
|
|
|
|
setne %dl
|
|
|
|
sub %rdx,$cnt # conditional --$cnt
|
|
|
|
lea ($out,%rdx,4),$out # conditional ++$out
|
|
|
|
jnz .Loop2
|
|
|
|
|
|
|
|
.Ldone2:
|
|
|
|
mov $redzone(%rsp),%rax
|
|
|
|
sub $cnt,%rax
|
|
|
|
ret
|
|
|
|
.size OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
|
|
|
|
___
|
|
|
|
}
|
2008-11-12 16:15:52 +08:00
|
|
|
|
2016-07-10 18:05:43 +08:00
|
|
|
sub gen_random {
|
|
|
|
my $rdop = shift;
|
2011-06-04 20:20:45 +08:00
|
|
|
print<<___;
|
2016-07-10 18:05:43 +08:00
|
|
|
.globl OPENSSL_ia32_${rdop}_bytes
|
|
|
|
.type OPENSSL_ia32_${rdop}_bytes,\@abi-omnipotent
|
2014-02-15 00:24:12 +08:00
|
|
|
.align 16
|
2016-07-10 18:05:43 +08:00
|
|
|
OPENSSL_ia32_${rdop}_bytes:
|
|
|
|
xor %rax, %rax # return value
|
|
|
|
cmp \$0,$arg2
|
|
|
|
je .Ldone_${rdop}_bytes
|
|
|
|
|
|
|
|
mov \$8,%r11
|
|
|
|
.Loop_${rdop}_bytes:
|
|
|
|
${rdop} %r10
|
|
|
|
jc .Lbreak_${rdop}_bytes
|
|
|
|
dec %r11
|
|
|
|
jnz .Loop_${rdop}_bytes
|
|
|
|
jmp .Ldone_${rdop}_bytes
|
|
|
|
|
|
|
|
.align 16
|
|
|
|
.Lbreak_${rdop}_bytes:
|
|
|
|
cmp \$8,$arg2
|
|
|
|
jb .Ltail_${rdop}_bytes
|
|
|
|
mov %r10,($arg1)
|
|
|
|
lea 8($arg1),$arg1
|
|
|
|
add \$8,%rax
|
|
|
|
sub \$8,$arg2
|
|
|
|
jz .Ldone_${rdop}_bytes
|
|
|
|
mov \$8,%r11
|
|
|
|
jmp .Loop_${rdop}_bytes
|
|
|
|
|
|
|
|
.align 16
|
|
|
|
.Ltail_${rdop}_bytes:
|
|
|
|
mov %r10b,($arg1)
|
|
|
|
lea 1($arg1),$arg1
|
|
|
|
inc %rax
|
Fix issues in ia32 RDRAND asm leading to reduced entropy
This patch fixes two issues in the ia32 RDRAND assembly code that result in a
(possibly significant) loss of entropy.
The first, less significant, issue is that, by returning success as 0 from
OPENSSL_ia32_rdrand() and OPENSSL_ia32_rdseed(), a subtle bias was introduced.
Specifically, because the assembly routine copied the remaining number of
retries over the result when RDRAND/RDSEED returned 'successful but zero', a
bias towards values 1-8 (primarily 8) was introduced.
The second, more worrying issue was that, due to a mixup in registers, when a
buffer that was not size 0 or 1 mod 8 was passed to OPENSSL_ia32_rdrand_bytes
or OPENSSL_ia32_rdseed_bytes, the last (n mod 8) bytes were all the same value.
This issue impacts only the 64-bit variant of the assembly.
This change fixes both issues by first eliminating the only use of
OPENSSL_ia32_rdrand, replacing it with OPENSSL_ia32_rdrand_bytes, and fixes the
register mixup in OPENSSL_ia32_rdrand_bytes. It also adds a sanity test for
OPENSSL_ia32_rdrand_bytes and OPENSSL_ia32_rdseed_bytes to help catch problems
of this nature in the future.
Reviewed-by: Andy Polyakov <appro@openssl.org>
Reviewed-by: Rich Salz <rsalz@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/5342)
2018-03-08 05:01:06 +08:00
|
|
|
shr \$8,%r10
|
2016-07-10 18:05:43 +08:00
|
|
|
dec $arg2
|
|
|
|
jnz .Ltail_${rdop}_bytes
|
|
|
|
|
|
|
|
.Ldone_${rdop}_bytes:
|
Fix issues in ia32 RDRAND asm leading to reduced entropy
This patch fixes two issues in the ia32 RDRAND assembly code that result in a
(possibly significant) loss of entropy.
The first, less significant, issue is that, by returning success as 0 from
OPENSSL_ia32_rdrand() and OPENSSL_ia32_rdseed(), a subtle bias was introduced.
Specifically, because the assembly routine copied the remaining number of
retries over the result when RDRAND/RDSEED returned 'successful but zero', a
bias towards values 1-8 (primarily 8) was introduced.
The second, more worrying issue was that, due to a mixup in registers, when a
buffer that was not size 0 or 1 mod 8 was passed to OPENSSL_ia32_rdrand_bytes
or OPENSSL_ia32_rdseed_bytes, the last (n mod 8) bytes were all the same value.
This issue impacts only the 64-bit variant of the assembly.
This change fixes both issues by first eliminating the only use of
OPENSSL_ia32_rdrand, replacing it with OPENSSL_ia32_rdrand_bytes, and fixes the
register mixup in OPENSSL_ia32_rdrand_bytes. It also adds a sanity test for
OPENSSL_ia32_rdrand_bytes and OPENSSL_ia32_rdseed_bytes to help catch problems
of this nature in the future.
Reviewed-by: Andy Polyakov <appro@openssl.org>
Reviewed-by: Rich Salz <rsalz@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/5342)
2018-03-08 05:01:06 +08:00
|
|
|
xor %r10,%r10 # Clear sensitive data from register
|
2014-02-15 00:24:12 +08:00
|
|
|
ret
|
2016-07-10 18:05:43 +08:00
|
|
|
.size OPENSSL_ia32_${rdop}_bytes,.-OPENSSL_ia32_${rdop}_bytes
|
2011-06-04 20:20:45 +08:00
|
|
|
___
|
2016-07-10 18:05:43 +08:00
|
|
|
}
|
|
|
|
gen_random("rdrand");
|
|
|
|
gen_random("rdseed");
|
2011-06-04 20:20:45 +08:00
|
|
|
|
2007-06-21 19:39:35 +08:00
|
|
|
close STDOUT; # flush
|