Add basic RISC-V cpuid and OPENSSL_riscvcap
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to
be enabled at runtime using OPENSSL_riscvcap environment variable.
For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc
extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc"
Architecture string parsing is still very primitive, but can be
expanded in the future. Currently, only bitmanip extensions Zba, Zbb,
Zbc and Zbs are supported.
Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm,
as well as OPENSSL_cleanse. Assembly implementations are written using
perlasm.
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Henry Brausen <henry.brausen@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/17640)
2022-01-28 16:28:52 +08:00
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/*
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* Copyright 2022 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <stdint.h>
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#include <openssl/crypto.h>
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#include "internal/cryptlib.h"
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#define OPENSSL_RISCVCAP_IMPL
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#include "crypto/riscv_arch.h"
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2024-04-17 17:21:53 +08:00
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#ifdef OSSL_RISCV_HWPROBE
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# include <unistd.h>
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# include <sys/syscall.h>
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# include <asm/hwprobe.h>
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#endif
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2023-02-14 13:22:03 +08:00
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extern size_t riscv_vlen_asm(void);
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Add basic RISC-V cpuid and OPENSSL_riscvcap
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to
be enabled at runtime using OPENSSL_riscvcap environment variable.
For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc
extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc"
Architecture string parsing is still very primitive, but can be
expanded in the future. Currently, only bitmanip extensions Zba, Zbb,
Zbc and Zbs are supported.
Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm,
as well as OPENSSL_cleanse. Assembly implementations are written using
perlasm.
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Henry Brausen <henry.brausen@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/17640)
2022-01-28 16:28:52 +08:00
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static void parse_env(const char *envstr);
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static void strtoupper(char *str);
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2023-02-14 13:22:03 +08:00
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static size_t vlen = 0;
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Add basic RISC-V cpuid and OPENSSL_riscvcap
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to
be enabled at runtime using OPENSSL_riscvcap environment variable.
For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc
extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc"
Architecture string parsing is still very primitive, but can be
expanded in the future. Currently, only bitmanip extensions Zba, Zbb,
Zbc and Zbs are supported.
Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm,
as well as OPENSSL_cleanse. Assembly implementations are written using
perlasm.
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Henry Brausen <henry.brausen@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/17640)
2022-01-28 16:28:52 +08:00
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uint32_t OPENSSL_rdtsc(void)
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{
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return 0;
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}
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size_t OPENSSL_instrument_bus(unsigned int *out, size_t cnt)
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{
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return 0;
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}
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size_t OPENSSL_instrument_bus2(unsigned int *out, size_t cnt, size_t max)
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{
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return 0;
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}
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static void strtoupper(char *str)
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{
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for (char *x = str; *x; ++x)
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*x = toupper(*x);
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}
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/* parse_env() parses a RISC-V architecture string. An example of such a string
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* is "rv64gc_zba_zbb_zbc_zbs". Currently, the rv64gc part is ignored
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* and we simply search for "_[extension]" in the arch string to see if we
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* should enable a given extension.
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*/
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#define BUFLEN 256
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static void parse_env(const char *envstr)
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{
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char envstrupper[BUFLEN];
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char buf[BUFLEN];
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/* Convert env str to all uppercase */
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OPENSSL_strlcpy(envstrupper, envstr, sizeof(envstrupper));
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strtoupper(envstrupper);
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for (size_t i = 0; i < kRISCVNumCaps; ++i) {
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/* Prefix capability with underscore in preparation for search */
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BIO_snprintf(buf, BUFLEN, "_%s", RISCV_capabilities[i].name);
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if (strstr(envstrupper, buf) != NULL) {
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/* Match, set relevant bit in OPENSSL_riscvcap_P[] */
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OPENSSL_riscvcap_P[RISCV_capabilities[i].index] |=
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(1 << RISCV_capabilities[i].bit_offset);
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}
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}
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}
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2024-04-17 17:21:53 +08:00
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#ifdef OSSL_RISCV_HWPROBE
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static long riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
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size_t cpu_count, unsigned long *cpus,
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unsigned int flags)
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{
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return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus, flags);
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}
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2024-05-12 15:18:44 +08:00
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static void hwprobe_to_cap(void)
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2024-04-17 17:21:53 +08:00
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{
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long ret;
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struct riscv_hwprobe pairs[OSSL_RISCV_HWPROBE_PAIR_COUNT] = {
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OSSL_RISCV_HWPROBE_PAIR_CONTENT
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};
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ret = riscv_hwprobe(pairs, OSSL_RISCV_HWPROBE_PAIR_COUNT, 0, NULL, 0);
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/* if hwprobe syscall does not exist, ret would be -ENOSYS */
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if (ret == 0) {
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for (size_t i = 0; i < kRISCVNumCaps; ++i) {
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for (size_t j = 0; j != OSSL_RISCV_HWPROBE_PAIR_COUNT; ++j) {
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if (pairs[j].key == RISCV_capabilities[i].hwprobe_key
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&& (pairs[j].value & RISCV_capabilities[i].hwprobe_value)
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!= 0)
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/* Match, set relevant bit in OPENSSL_riscvcap_P[] */
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OPENSSL_riscvcap_P[RISCV_capabilities[i].index] |=
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(1 << RISCV_capabilities[i].bit_offset);
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}
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}
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}
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}
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#endif /* OSSL_RISCV_HWPROBE */
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2023-02-14 13:22:03 +08:00
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size_t riscv_vlen(void)
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{
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return vlen;
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}
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Add basic RISC-V cpuid and OPENSSL_riscvcap
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to
be enabled at runtime using OPENSSL_riscvcap environment variable.
For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc
extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc"
Architecture string parsing is still very primitive, but can be
expanded in the future. Currently, only bitmanip extensions Zba, Zbb,
Zbc and Zbs are supported.
Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm,
as well as OPENSSL_cleanse. Assembly implementations are written using
perlasm.
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Henry Brausen <henry.brausen@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/17640)
2022-01-28 16:28:52 +08:00
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# if defined(__GNUC__) && __GNUC__>=2
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__attribute__ ((constructor))
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# endif
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void OPENSSL_cpuid_setup(void)
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{
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char *e;
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static int trigger = 0;
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if (trigger != 0)
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return;
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trigger = 1;
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if ((e = getenv("OPENSSL_riscvcap"))) {
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parse_env(e);
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2023-02-14 13:22:03 +08:00
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}
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2024-04-17 17:21:53 +08:00
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#ifdef OSSL_RISCV_HWPROBE
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else {
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hwprobe_to_cap();
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}
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#endif
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2023-02-14 13:22:03 +08:00
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if (RISCV_HAS_V()) {
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vlen = riscv_vlen_asm();
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Add basic RISC-V cpuid and OPENSSL_riscvcap
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to
be enabled at runtime using OPENSSL_riscvcap environment variable.
For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc
extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc"
Architecture string parsing is still very primitive, but can be
expanded in the future. Currently, only bitmanip extensions Zba, Zbb,
Zbc and Zbs are supported.
Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm,
as well as OPENSSL_cleanse. Assembly implementations are written using
perlasm.
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Henry Brausen <henry.brausen@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/17640)
2022-01-28 16:28:52 +08:00
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}
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}
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