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e55c836b5a
Intel's docs diverge from AMD's docs (MASM follow AMD's docs); formally document what we're doing and include a file of macros in case someone wants to use alternate names.
68 lines
1.1 KiB
PHP
68 lines
1.1 KiB
PHP
;;
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;; altreg.inc
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;;
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;; Alternate register names for 64-bit mode
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;;
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;;
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;; Intel documents R8L-R15L instead of R8B-R15B
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;; (Warning: this may confuse people with an AT&T-style assembly
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;; background, where "r8l" means R8D, etc.)
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;;
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%idefine r8l r8b
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%idefine r9l r9b
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%idefine r10l r10b
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%idefine r11l r11b
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%idefine r12l r12b
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%idefine r13l r13b
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%idefine r14l r14b
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%idefine r15l r15b
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;;
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;; Numeric register names for the lower 8 registers
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;;
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%idefine r0 rax
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%idefine r1 rcx
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%idefine r2 rdx
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%idefine r3 rbx
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%idefine r4 rsp
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%idefine r5 rbp
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%idefine r6 rsi
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%idefine r7 rdi
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%idefine r0d eax
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%idefine r1d ecx
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%idefine r2d edx
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%idefine r3d ebx
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%idefine r4d esp
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%idefine r5d ebp
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%idefine r6d esi
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%idefine r7d edi
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%idefine r0w ax
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%idefine r1w cx
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%idefine r2w dx
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%idefine r3w bx
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%idefine r4w sp
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%idefine r5w bp
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%idefine r6w si
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%idefine r7w di
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%idefine r0b al
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%idefine r1b cl
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%idefine r2b dl
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%idefine r3b bl
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%idefine r4b spl
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%idefine r5b bpl
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%idefine r6b sil
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%idefine r7b dil
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%idefine r0l al
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%idefine r1l cl
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%idefine r2l dl
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%idefine r3l bl
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%idefine r4l spl
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%idefine r5l bpl
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%idefine r6l sil
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%idefine r7l dil
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