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c17a0eb31b
1. Allow included files in rdsrc.pl 2. New program inslist.pl to generate instruction list from insns.dat 3. Mark certain comments in insns.dat as documentation subheaders 4. Add Instruction List appendix to nasmdoc.src 5. Update build process to invoke inslist.pl
2223 lines
100 KiB
Plaintext
2223 lines
100 KiB
Plaintext
; insns.dat table of instructions for the Netwide Assembler
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;
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; The Netwide Assembler is copyright (C) 1996 Simon Tatham and
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; Julian Hall. All rights reserved. The software is
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; redistributable under the license given in the file "LICENSE"
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; distributed in the NASM archive.
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;
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; Format of file: All four fields must be present on every functional
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; line. Hence `void' for no-operand instructions, and `\0' for such
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; as EQU. If the last three fields are all `ignore', no action is
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; taken except to register the opcode as being present.
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;
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; For a detailed description of the code string (third field), please
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; see the comment at the top of assemble.c. For a detailed description
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; of the flags (fourth field), please see insns.h.
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;
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; Comments with a pound sign after the semicolon generate section
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; subheaders in the NASM documentation.
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;# Special instructions...
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DB ignore ignore ignore
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DW ignore ignore ignore
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DD ignore ignore ignore
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DQ ignore ignore ignore
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DT ignore ignore ignore
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DO ignore ignore ignore
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RESB imm \340 8086
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RESW ignore ignore ignore
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RESD ignore ignore ignore
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RESQ ignore ignore ignore
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REST ignore ignore ignore
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RESO ignore ignore ignore
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;# Conventional instructions
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AAA void \1\x37 8086,NOLONG
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AAD void \2\xD5\x0A 8086,NOLONG
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AAD imm \1\xD5\24 8086,SB,NOLONG
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AAM void \2\xD4\x0A 8086,NOLONG
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AAM imm \1\xD4\24 8086,SB,NOLONG
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AAS void \1\x3F 8086,NOLONG
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ADC mem,reg8 \1\x10\101 8086,SM
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ADC reg8,reg8 \1\x10\101 8086
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ADC mem,reg16 \320\1\x11\101 8086,SM
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ADC reg16,reg16 \320\1\x11\101 8086
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ADC mem,reg32 \321\1\x11\101 386,SM
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ADC reg32,reg32 \321\1\x11\101 386
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ADC mem,reg64 \324\1\x11\101 X64,SM
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ADC reg64,reg64 \324\1\x11\101 X64
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ADC reg8,mem \1\x12\110 8086,SM
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ADC reg8,reg8 \1\x12\110 8086
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ADC reg16,mem \320\1\x13\110 8086,SM
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ADC reg16,reg16 \320\1\x13\110 8086
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ADC reg32,mem \321\1\x13\110 386,SM
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ADC reg32,reg32 \321\1\x13\110 386
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ADC reg64,mem \324\1\x13\110 X64,SM
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ADC reg64,reg64 \324\1\x13\110 X64
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ADC rm16,imm8 \320\1\x83\202\15 8086
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ADC rm32,imm8 \321\1\x83\202\15 386
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ADC rm64,imm8 \324\1\x83\202\15 X64
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ADC reg_al,imm \1\x14\21 8086,SM
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ADC reg_ax,sbyte \320\1\x83\202\15 8086,SM,ND
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ADC reg_ax,imm \320\1\x15\31 8086,SM
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ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND
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ADC reg_eax,imm \321\1\x15\41 386,SM
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ADC reg_rax,sbyte \324\1\x83\202\15 X64,SM,ND
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ADC reg_rax,imm \324\1\x15\41 X64,SM
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ADC rm8,imm \1\x80\202\21 8086,SM
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ADC rm16,imm \320\145\x81\202\141 8086,SM
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ADC rm32,imm \321\155\x81\202\151 386,SM
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ADC rm64,imm \324\155\x81\202\151 X64,SM
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ADC mem,imm8 \1\x80\202\21 8086,SM
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ADC mem,imm16 \320\145\x81\202\141 8086,SM
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ADC mem,imm32 \321\155\x81\202\151 386,SM
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ADD mem,reg8 \170\101 8086,SM
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ADD reg8,reg8 \170\101 8086
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ADD mem,reg16 \320\1\x01\101 8086,SM
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ADD reg16,reg16 \320\1\x01\101 8086
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ADD mem,reg32 \321\1\x01\101 386,SM
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ADD reg32,reg32 \321\1\x01\101 386
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ADD mem,reg64 \324\1\x01\101 X64,SM
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ADD reg64,reg64 \324\1\x01\101 X64
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ADD reg8,mem \1\x02\110 8086,SM
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ADD reg8,reg8 \1\x02\110 8086
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ADD reg16,mem \320\1\x03\110 8086,SM
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ADD reg16,reg16 \320\1\x03\110 8086
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ADD reg32,mem \321\1\x03\110 386,SM
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ADD reg32,reg32 \321\1\x03\110 386
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ADD reg64,mem \324\1\x03\110 X64,SM
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ADD reg64,reg64 \324\1\x03\110 X64
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ADD rm16,imm8 \320\1\x83\200\15 8086
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ADD rm32,imm8 \321\1\x83\200\15 386
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ADD rm64,imm8 \324\1\x83\200\15 X64
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ADD reg_al,imm \1\x04\21 8086,SM
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ADD reg_ax,sbyte \320\1\x83\200\15 8086,SM,ND
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ADD reg_ax,imm \320\1\x05\31 8086,SM
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ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND
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ADD reg_eax,imm \321\1\x05\41 386,SM
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ADD reg_rax,sbyte \324\1\x83\200\15 X64,SM,ND
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ADD reg_rax,imm \324\1\x05\41 X64,SM
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ADD rm8,imm \1\x80\200\21 8086,SM
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ADD rm16,imm \320\145\x81\200\141 8086,SM
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ADD rm32,imm \321\155\x81\200\151 386,SM
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ADD rm64,imm \324\155\x81\200\151 X64,SM
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ADD mem,imm8 \1\x80\200\21 8086,SM
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ADD mem,imm16 \320\145\x81\200\141 8086,SM
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ADD mem,imm32 \321\155\x81\200\151 386,SM
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AND mem,reg8 \1\x20\101 8086,SM
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AND reg8,reg8 \1\x20\101 8086
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AND mem,reg16 \320\1\x21\101 8086,SM
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AND reg16,reg16 \320\1\x21\101 8086
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AND mem,reg32 \321\1\x21\101 386,SM
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AND reg32,reg32 \321\1\x21\101 386
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AND mem,reg64 \324\1\x21\101 X64,SM
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AND reg64,reg64 \324\1\x21\101 X64
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AND reg8,mem \1\x22\110 8086,SM
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AND reg8,reg8 \1\x22\110 8086
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AND reg16,mem \320\1\x23\110 8086,SM
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AND reg16,reg16 \320\1\x23\110 8086
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AND reg32,mem \321\1\x23\110 386,SM
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AND reg32,reg32 \321\1\x23\110 386
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AND reg64,mem \324\1\x23\110 X64,SM
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AND reg64,reg64 \324\1\x23\110 X64
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AND rm16,imm8 \320\1\x83\204\15 8086
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AND rm32,imm8 \321\1\x83\204\15 386
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AND rm64,imm8 \324\1\x83\204\15 X64
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AND reg_al,imm \1\x24\21 8086,SM
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AND reg_ax,sbyte \320\1\x83\204\15 8086,SM,ND
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AND reg_ax,imm \320\1\x25\31 8086,SM
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AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND
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AND reg_eax,imm \321\1\x25\41 386,SM
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AND reg_rax,sbyte \324\1\x83\204\15 X64,SM,ND
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AND reg_rax,imm \324\1\x25\41 X64,SM
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AND rm8,imm \1\x80\204\21 8086,SM
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AND rm16,imm \320\145\x81\204\141 8086,SM
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AND rm32,imm \321\155\x81\204\151 386,SM
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AND rm64,imm \324\155\x81\204\151 X64,SM
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AND mem,imm8 \1\x80\204\21 8086,SM
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AND mem,imm16 \320\145\x81\204\141 8086,SM
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AND mem,imm32 \321\155\x81\204\151 386,SM
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ARPL mem,reg16 \1\x63\101 286,PROT,SM,NOLONG
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ARPL reg16,reg16 \1\x63\101 286,PROT,NOLONG
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BB0_RESET void \2\x0F\x3A PENT,CYRIX,ND
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BB1_RESET void \2\x0F\x3B PENT,CYRIX,ND
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BOUND reg16,mem \320\1\x62\110 186,NOLONG
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BOUND reg32,mem \321\1\x62\110 386,NOLONG
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BSF reg16,mem \320\2\x0F\xBC\110 386,SM
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BSF reg16,reg16 \320\2\x0F\xBC\110 386
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BSF reg32,mem \321\2\x0F\xBC\110 386,SM
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BSF reg32,reg32 \321\2\x0F\xBC\110 386
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BSF reg64,mem \324\2\x0F\xBC\110 X64,SM
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BSF reg64,reg64 \324\2\x0F\xBC\110 X64
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BSR reg16,mem \320\2\x0F\xBD\110 386,SM
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BSR reg16,reg16 \320\2\x0F\xBD\110 386
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BSR reg32,mem \321\2\x0F\xBD\110 386,SM
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BSR reg32,reg32 \321\2\x0F\xBD\110 386
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BSR reg64,mem \324\2\x0F\xBD\110 X64,SM
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BSR reg64,reg64 \324\2\x0F\xBD\110 X64
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BSWAP reg32 \321\1\x0F\10\xC8 486
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BSWAP reg64 \324\1\x0F\10\xC8 X64
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BT mem,reg16 \320\2\x0F\xA3\101 386,SM
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BT reg16,reg16 \320\2\x0F\xA3\101 386
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BT mem,reg32 \321\2\x0F\xA3\101 386,SM
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BT reg32,reg32 \321\2\x0F\xA3\101 386
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BT mem,reg64 \324\2\x0F\xA3\101 X64,SM
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BT reg64,reg64 \324\2\x0F\xA3\101 X64
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BT rm16,imm \320\2\x0F\xBA\204\25 386,SB
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BT rm32,imm \321\2\x0F\xBA\204\25 386,SB
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BT rm64,imm \324\2\x0F\xBA\204\25 X64,SB
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BTC mem,reg16 \320\2\x0F\xBB\101 386,SM
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BTC reg16,reg16 \320\2\x0F\xBB\101 386
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BTC mem,reg32 \321\2\x0F\xBB\101 386,SM
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BTC reg32,reg32 \321\2\x0F\xBB\101 386
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BTC mem,reg64 \324\2\x0F\xBB\101 X64,SM
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BTC reg64,reg64 \324\2\x0F\xBB\101 X64
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BTC rm16,imm \320\2\x0F\xBA\207\25 386,SB
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BTC rm32,imm \321\2\x0F\xBA\207\25 386,SB
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BTC rm64,imm \324\2\x0F\xBA\207\25 X64,SB
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BTR mem,reg16 \320\2\x0F\xB3\101 386,SM
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BTR reg16,reg16 \320\2\x0F\xB3\101 386
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BTR mem,reg32 \321\2\x0F\xB3\101 386,SM
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BTR reg32,reg32 \321\2\x0F\xB3\101 386
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BTR mem,reg64 \324\2\x0F\xB3\101 X64,SM
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BTR reg64,reg64 \324\2\x0F\xB3\101 X64
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BTR rm16,imm \320\2\x0F\xBA\206\25 386,SB
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BTR rm32,imm \321\2\x0F\xBA\206\25 386,SB
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BTR rm64,imm \324\2\x0F\xBA\206\25 X64,SB
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BTS mem,reg16 \320\2\x0F\xAB\101 386,SM
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BTS reg16,reg16 \320\2\x0F\xAB\101 386
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BTS mem,reg32 \321\2\x0F\xAB\101 386,SM
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BTS reg32,reg32 \321\2\x0F\xAB\101 386
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BTS mem,reg64 \324\2\x0F\xAB\101 X64,SM
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BTS reg64,reg64 \324\2\x0F\xAB\101 X64
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BTS rm16,imm \320\2\x0F\xBA\205\25 386,SB
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BTS rm32,imm \321\2\x0F\xBA\205\25 386,SB
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BTS rm64,imm \324\2\x0F\xBA\205\25 X64,SB
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CALL imm \322\1\xE8\64 8086
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CALL imm|near \322\1\xE8\64 8086
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CALL imm|far \322\1\x9A\34\74 8086,ND,NOLONG
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CALL imm16 \320\1\xE8\64 8086
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CALL imm16|near \320\1\xE8\64 8086
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CALL imm16|far \320\1\x9A\34\74 8086,ND,NOLONG
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CALL imm32 \321\1\xE8\64 386
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CALL imm32|near \321\1\xE8\64 386
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CALL imm32|far \321\1\x9A\34\74 386,ND,NOLONG
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CALL imm:imm \322\1\x9A\35\30 8086,NOLONG
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CALL imm16:imm \320\1\x9A\31\30 8086,NOLONG
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CALL imm:imm16 \320\1\x9A\31\30 8086,NOLONG
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CALL imm32:imm \321\1\x9A\41\30 386,NOLONG
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CALL imm:imm32 \321\1\x9A\41\30 386,NOLONG
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CALL mem|far \322\1\xFF\203 8086
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CALL mem16|far \320\1\xFF\203 8086
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CALL mem32|far \321\1\xFF\203 386
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CALL mem|near \322\1\xFF\202 8086
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CALL mem16|near \320\1\xFF\202 8086
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CALL mem32|near \321\1\xFF\202 386,NOLONG
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CALL mem64|near \324\1\xFF\202 X64
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CALL reg16 \320\1\xFF\202 8086
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CALL reg32 \321\1\xFF\202 386,NOLONG
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CALL reg64 \324\1\xFF\202 X64
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CALL mem \322\1\xFF\202 8086
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CALL mem16 \320\1\xFF\202 8086
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CALL mem32 \321\1\xFF\202 386,NOLONG
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CALL mem64 \324\1\xFF\202 X64
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CBW void \320\1\x98 8086
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CDQ void \321\1\x99 386
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CDQE void \324\1\x98 X64
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CLC void \1\xF8 8086
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CLD void \1\xFC 8086
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CLFLUSH mem \2\x0F\x80\207 KATMAI
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CLGI void \3\x0F\x01\xDD X64,AMD
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CLI void \1\xFA 8086
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CLTS void \2\x0F\x06 286,PRIV
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CMC void \1\xF5 8086
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CMP mem,reg8 \1\x38\101 8086,SM
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CMP reg8,reg8 \1\x38\101 8086
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CMP mem,reg16 \320\1\x39\101 8086,SM
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CMP reg16,reg16 \320\1\x39\101 8086
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CMP mem,reg32 \321\1\x39\101 386,SM
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CMP reg32,reg32 \321\1\x39\101 386
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CMP mem,reg64 \324\1\x39\101 X64,SM
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CMP reg64,reg64 \324\1\x39\101 X64
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CMP reg8,mem \1\x3A\110 8086,SM
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CMP reg8,reg8 \1\x3A\110 8086
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CMP reg16,mem \320\1\x3B\110 8086,SM
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CMP reg16,reg16 \320\1\x3B\110 8086
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CMP reg32,mem \321\1\x3B\110 386,SM
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CMP reg32,reg32 \321\1\x3B\110 386
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CMP reg64,mem \324\1\x3B\110 X64,SM
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CMP reg64,reg64 \324\1\x3B\110 X64
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CMP rm16,imm8 \320\1\x83\207\15 8086
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CMP rm32,imm8 \321\1\x83\207\15 386
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CMP rm64,imm8 \324\1\x83\207\15 X64
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CMP reg_al,imm \1\x3C\21 8086,SM
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CMP reg_ax,sbyte \320\1\x83\207\15 8086,SM,ND
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CMP reg_ax,imm \320\1\x3D\31 8086,SM
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CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND
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CMP reg_eax,imm \321\1\x3D\41 386,SM
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CMP reg_rax,sbyte \324\1\x83\207\15 X64,SM,ND
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CMP reg_rax,imm \324\1\x3D\41 X64,SM
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CMP rm8,imm \1\x80\207\21 8086,SM
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CMP rm16,imm \320\145\x81\207\141 8086,SM
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CMP rm32,imm \321\155\x81\207\151 386,SM
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CMP rm64,imm \324\155\x81\207\151 X64,SM
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CMP mem,imm8 \1\x80\207\21 8086,SM
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CMP mem,imm16 \320\145\x81\207\141 8086,SM
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CMP mem,imm32 \321\155\x81\207\151 386,SM
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CMPSB void \335\1\xA6 8086
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CMPSD void \335\321\1\xA7 386
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CMPSQ void \335\324\1\xA7 X64
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CMPSW void \335\320\1\xA7 8086
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CMPXCHG mem,reg8 \2\x0F\xB0\101 PENT,SM
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CMPXCHG reg8,reg8 \2\x0F\xB0\101 PENT
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CMPXCHG mem,reg16 \320\2\x0F\xB1\101 PENT,SM
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CMPXCHG reg16,reg16 \320\2\x0F\xB1\101 PENT
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CMPXCHG mem,reg32 \321\2\x0F\xB1\101 PENT,SM
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CMPXCHG reg32,reg32 \321\2\x0F\xB1\101 PENT
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CMPXCHG mem,reg64 \324\2\x0F\xB1\101 X64,SM
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CMPXCHG reg64,reg64 \324\2\x0F\xB1\101 X64
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CMPXCHG486 mem,reg8 \2\x0F\xA6\101 486,SM,UNDOC,ND
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CMPXCHG486 reg8,reg8 \2\x0F\xA6\101 486,UNDOC,ND
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CMPXCHG486 mem,reg16 \320\2\x0F\xA7\101 486,SM,UNDOC,ND
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CMPXCHG486 reg16,reg16 \320\2\x0F\xA7\101 486,UNDOC,ND
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CMPXCHG486 mem,reg32 \321\2\x0F\xA7\101 486,SM,UNDOC,ND
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CMPXCHG486 reg32,reg32 \321\2\x0F\xA7\101 486,UNDOC,ND
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CMPXCHG8B mem \2\x0F\xC7\201 PENT
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CMPXCHG16B mem \324\2\x0F\xC7\201 X64
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CPUID void \2\x0F\xA2 PENT
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CPU_READ void \2\x0F\x3D PENT,CYRIX
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CPU_WRITE void \2\x0F\x3C PENT,CYRIX
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CQO void \324\1\x99 X64
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CWD void \320\1\x99 8086
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CWDE void \321\1\x98 386
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DAA void \1\x27 8086,NOLONG
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DAS void \1\x2F 8086,NOLONG
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DEC reg16 \320\10\x48 8086,NOLONG
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DEC reg32 \321\10\x48 386,NOLONG
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DEC rm8 \1\xFE\201 8086
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DEC rm16 \320\1\xFF\201 8086
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DEC rm32 \321\1\xFF\201 386
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DEC rm64 \324\1\xFF\201 X64
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DIV rm8 \1\xF6\206 8086
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DIV rm16 \320\1\xF7\206 8086
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DIV rm32 \321\1\xF7\206 386
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DIV rm64 \324\1\xF7\206 X64
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DMINT void \2\x0F\x39 P6,CYRIX
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EMMS void \2\x0F\x77 PENT,MMX
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ENTER imm,imm \1\xC8\30\25 186
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EQU imm \0 8086
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EQU imm:imm \0 8086
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F2XM1 void \2\xD9\xF0 8086,FPU
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FABS void \2\xD9\xE1 8086,FPU
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FADD mem32 \1\xD8\200 8086,FPU
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FADD mem64 \1\xDC\200 8086,FPU
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FADD fpureg|to \1\xDC\10\xC0 8086,FPU
|
|
FADD fpureg \1\xD8\10\xC0 8086,FPU
|
|
FADD fpureg,fpu0 \1\xDC\10\xC0 8086,FPU
|
|
FADD fpu0,fpureg \1\xD8\11\xC0 8086,FPU
|
|
FADD void \2\xDE\xC1 8086,FPU,ND
|
|
FADDP fpureg \1\xDE\10\xC0 8086,FPU
|
|
FADDP fpureg,fpu0 \1\xDE\10\xC0 8086,FPU
|
|
FADDP void \2\xDE\xC1 8086,FPU,ND
|
|
FBLD mem80 \1\xDF\204 8086,FPU
|
|
FBLD mem \1\xDF\204 8086,FPU
|
|
FBSTP mem80 \1\xDF\206 8086,FPU
|
|
FBSTP mem \1\xDF\206 8086,FPU
|
|
FCHS void \2\xD9\xE0 8086,FPU
|
|
FCLEX void \3\x9B\xDB\xE2 8086,FPU
|
|
FCMOVB fpureg \1\xDA\10\xC0 P6,FPU
|
|
FCMOVB fpu0,fpureg \1\xDA\11\xC0 P6,FPU
|
|
FCMOVB void \2\xDA\xC1 P6,FPU,ND
|
|
FCMOVBE fpureg \1\xDA\10\xD0 P6,FPU
|
|
FCMOVBE fpu0,fpureg \1\xDA\11\xD0 P6,FPU
|
|
FCMOVBE void \2\xDA\xD1 P6,FPU,ND
|
|
FCMOVE fpureg \1\xDA\10\xC8 P6,FPU
|
|
FCMOVE fpu0,fpureg \1\xDA\11\xC8 P6,FPU
|
|
FCMOVE void \2\xDA\xC9 P6,FPU,ND
|
|
FCMOVNB fpureg \1\xDB\10\xC0 P6,FPU
|
|
FCMOVNB fpu0,fpureg \1\xDB\11\xC0 P6,FPU
|
|
FCMOVNB void \2\xDB\xC1 P6,FPU,ND
|
|
FCMOVNBE fpureg \1\xDB\10\xD0 P6,FPU
|
|
FCMOVNBE fpu0,fpureg \1\xDB\11\xD0 P6,FPU
|
|
FCMOVNBE void \2\xDB\xD1 P6,FPU,ND
|
|
FCMOVNE fpureg \1\xDB\10\xC8 P6,FPU
|
|
FCMOVNE fpu0,fpureg \1\xDB\11\xC8 P6,FPU
|
|
FCMOVNE void \2\xDB\xC9 P6,FPU,ND
|
|
FCMOVNU fpureg \1\xDB\10\xD8 P6,FPU
|
|
FCMOVNU fpu0,fpureg \1\xDB\11\xD8 P6,FPU
|
|
FCMOVNU void \2\xDB\xD9 P6,FPU,ND
|
|
FCMOVU fpureg \1\xDA\10\xD8 P6,FPU
|
|
FCMOVU fpu0,fpureg \1\xDA\11\xD8 P6,FPU
|
|
FCMOVU void \2\xDA\xD9 P6,FPU,ND
|
|
FCOM mem32 \1\xD8\202 8086,FPU
|
|
FCOM mem64 \1\xDC\202 8086,FPU
|
|
FCOM fpureg \1\xD8\10\xD0 8086,FPU
|
|
FCOM fpu0,fpureg \1\xD8\11\xD0 8086,FPU
|
|
FCOM void \2\xD8\xD1 8086,FPU,ND
|
|
FCOMI fpureg \1\xDB\10\xF0 P6,FPU
|
|
FCOMI fpu0,fpureg \1\xDB\11\xF0 P6,FPU
|
|
FCOMI void \2\xDB\xF1 P6,FPU,ND
|
|
FCOMIP fpureg \1\xDF\10\xF0 P6,FPU
|
|
FCOMIP fpu0,fpureg \1\xDF\11\xF0 P6,FPU
|
|
FCOMIP void \2\xDF\xF1 P6,FPU,ND
|
|
FCOMP mem32 \1\xD8\203 8086,FPU
|
|
FCOMP mem64 \1\xDC\203 8086,FPU
|
|
FCOMP fpureg \1\xD8\10\xD8 8086,FPU
|
|
FCOMP fpu0,fpureg \1\xD8\11\xD8 8086,FPU
|
|
FCOMP void \2\xD8\xD9 8086,FPU,ND
|
|
FCOMPP void \2\xDE\xD9 8086,FPU
|
|
FCOS void \2\xD9\xFF 386,FPU
|
|
FDECSTP void \2\xD9\xF6 8086,FPU
|
|
FDISI void \3\x9B\xDB\xE1 8086,FPU
|
|
FDIV mem32 \1\xD8\206 8086,FPU
|
|
FDIV mem64 \1\xDC\206 8086,FPU
|
|
FDIV fpureg|to \1\xDC\10\xF8 8086,FPU
|
|
FDIV fpureg \1\xD8\10\xF0 8086,FPU
|
|
FDIV fpureg,fpu0 \1\xDC\10\xF8 8086,FPU
|
|
FDIV fpu0,fpureg \1\xD8\11\xF0 8086,FPU
|
|
FDIV void \2\xDE\xF9 8086,FPU,ND
|
|
FDIVP fpureg \1\xDE\10\xF8 8086,FPU
|
|
FDIVP fpureg,fpu0 \1\xDE\10\xF8 8086,FPU
|
|
FDIVP void \2\xDE\xF9 8086,FPU,ND
|
|
FDIVR mem32 \1\xD8\207 8086,FPU
|
|
FDIVR mem64 \1\xDC\207 8086,FPU
|
|
FDIVR fpureg|to \1\xDC\10\xF0 8086,FPU
|
|
FDIVR fpureg,fpu0 \1\xDC\10\xF0 8086,FPU
|
|
FDIVR fpureg \1\xD8\10\xF8 8086,FPU
|
|
FDIVR fpu0,fpureg \1\xD8\11\xF8 8086,FPU
|
|
FDIVR void \2\xDE\xF1 8086,FPU,ND
|
|
FDIVRP fpureg \1\xDE\10\xF0 8086,FPU
|
|
FDIVRP fpureg,fpu0 \1\xDE\10\xF0 8086,FPU
|
|
FDIVRP void \2\xDE\xF1 8086,FPU,ND
|
|
FEMMS void \2\x0F\x0E PENT,3DNOW
|
|
FENI void \3\x9B\xDB\xE0 8086,FPU
|
|
FFREE fpureg \1\xDD\10\xC0 8086,FPU
|
|
FFREE void \2\xDD\xC1 8086,FPU
|
|
FFREEP fpureg \1\xDF\10\xC0 286,FPU,UNDOC
|
|
FFREEP void \2\xDF\xC1 286,FPU,UNDOC
|
|
FIADD mem32 \1\xDA\200 8086,FPU
|
|
FIADD mem16 \1\xDE\200 8086,FPU
|
|
FICOM mem32 \1\xDA\202 8086,FPU
|
|
FICOM mem16 \1\xDE\202 8086,FPU
|
|
FICOMP mem32 \1\xDA\203 8086,FPU
|
|
FICOMP mem16 \1\xDE\203 8086,FPU
|
|
FIDIV mem32 \1\xDA\206 8086,FPU
|
|
FIDIV mem16 \1\xDE\206 8086,FPU
|
|
FIDIVR mem32 \1\xDA\207 8086,FPU
|
|
FIDIVR mem16 \1\xDE\207 8086,FPU
|
|
FILD mem32 \1\xDB\200 8086,FPU
|
|
FILD mem16 \1\xDF\200 8086,FPU
|
|
FILD mem64 \1\xDF\205 8086,FPU
|
|
FIMUL mem32 \1\xDA\201 8086,FPU
|
|
FIMUL mem16 \1\xDE\201 8086,FPU
|
|
FINCSTP void \2\xD9\xF7 8086,FPU
|
|
FINIT void \3\x9B\xDB\xE3 8086,FPU
|
|
FIST mem32 \1\xDB\202 8086,FPU
|
|
FIST mem16 \1\xDF\202 8086,FPU
|
|
FISTP mem32 \1\xDB\203 8086,FPU
|
|
FISTP mem16 \1\xDF\203 8086,FPU
|
|
FISTP mem64 \1\xDF\207 8086,FPU
|
|
FISTTP mem16 \1\xDF\201 PRESCOTT,FPU
|
|
FISTTP mem32 \1\xDB\201 PRESCOTT,FPU
|
|
FISTTP mem64 \1\xDD\201 PRESCOTT,FPU
|
|
FISUB mem32 \1\xDA\204 8086,FPU
|
|
FISUB mem16 \1\xDE\204 8086,FPU
|
|
FISUBR mem32 \1\xDA\205 8086,FPU
|
|
FISUBR mem16 \1\xDE\205 8086,FPU
|
|
FLD mem32 \1\xD9\200 8086,FPU
|
|
FLD mem64 \1\xDD\200 8086,FPU
|
|
FLD mem80 \1\xDB\205 8086,FPU
|
|
FLD fpureg \1\xD9\10\xC0 8086,FPU
|
|
FLD void \2\xD9\xC1 8086,FPU,ND
|
|
FLD1 void \2\xD9\xE8 8086,FPU
|
|
FLDCW mem \1\xD9\205 8086,FPU,SW
|
|
FLDENV mem \1\xD9\204 8086,FPU
|
|
FLDL2E void \2\xD9\xEA 8086,FPU
|
|
FLDL2T void \2\xD9\xE9 8086,FPU
|
|
FLDLG2 void \2\xD9\xEC 8086,FPU
|
|
FLDLN2 void \2\xD9\xED 8086,FPU
|
|
FLDPI void \2\xD9\xEB 8086,FPU
|
|
FLDZ void \2\xD9\xEE 8086,FPU
|
|
FMUL mem32 \1\xD8\201 8086,FPU
|
|
FMUL mem64 \1\xDC\201 8086,FPU
|
|
FMUL fpureg|to \1\xDC\10\xC8 8086,FPU
|
|
FMUL fpureg,fpu0 \1\xDC\10\xC8 8086,FPU
|
|
FMUL fpureg \1\xD8\10\xC8 8086,FPU
|
|
FMUL fpu0,fpureg \1\xD8\11\xC8 8086,FPU
|
|
FMUL void \2\xDE\xC9 8086,FPU,ND
|
|
FMULP fpureg \1\xDE\10\xC8 8086,FPU
|
|
FMULP fpureg,fpu0 \1\xDE\10\xC8 8086,FPU
|
|
FMULP void \2\xDE\xC9 8086,FPU,ND
|
|
FNCLEX void \2\xDB\xE2 8086,FPU
|
|
FNDISI void \2\xDB\xE1 8086,FPU
|
|
FNENI void \2\xDB\xE0 8086,FPU
|
|
FNINIT void \2\xDB\xE3 8086,FPU
|
|
FNOP void \2\xD9\xD0 8086,FPU
|
|
FNSAVE mem \1\xDD\206 8086,FPU
|
|
FNSTCW mem \1\xD9\207 8086,FPU,SW
|
|
FNSTENV mem \1\xD9\206 8086,FPU
|
|
FNSTSW mem \1\xDD\207 8086,FPU,SW
|
|
FNSTSW reg_ax \2\xDF\xE0 286,FPU
|
|
FPATAN void \2\xD9\xF3 8086,FPU
|
|
FPREM void \2\xD9\xF8 8086,FPU
|
|
FPREM1 void \2\xD9\xF5 386,FPU
|
|
FPTAN void \2\xD9\xF2 8086,FPU
|
|
FRNDINT void \2\xD9\xFC 8086,FPU
|
|
FRSTOR mem \1\xDD\204 8086,FPU
|
|
FSAVE mem \2\x9B\xDD\206 8086,FPU
|
|
FSCALE void \2\xD9\xFD 8086,FPU
|
|
FSETPM void \2\xDB\xE4 286,FPU
|
|
FSIN void \2\xD9\xFE 386,FPU
|
|
FSINCOS void \2\xD9\xFB 386,FPU
|
|
FSQRT void \2\xD9\xFA 8086,FPU
|
|
FST mem32 \1\xD9\202 8086,FPU
|
|
FST mem64 \1\xDD\202 8086,FPU
|
|
FST fpureg \1\xDD\10\xD0 8086,FPU
|
|
FST void \2\xDD\xD1 8086,FPU,ND
|
|
FSTCW mem \2\x9B\xD9\207 8086,FPU,SW
|
|
FSTENV mem \2\x9B\xD9\206 8086,FPU
|
|
FSTP mem32 \1\xD9\203 8086,FPU
|
|
FSTP mem64 \1\xDD\203 8086,FPU
|
|
FSTP mem80 \1\xDB\207 8086,FPU
|
|
FSTP fpureg \1\xDD\10\xD8 8086,FPU
|
|
FSTP void \2\xDD\xD9 8086,FPU,ND
|
|
FSTSW mem \2\x9B\xDD\207 8086,FPU,SW
|
|
FSTSW reg_ax \3\x9B\xDF\xE0 286,FPU
|
|
FSUB mem32 \1\xD8\204 8086,FPU
|
|
FSUB mem64 \1\xDC\204 8086,FPU
|
|
FSUB fpureg|to \1\xDC\10\xE8 8086,FPU
|
|
FSUB fpureg,fpu0 \1\xDC\10\xE8 8086,FPU
|
|
FSUB fpureg \1\xD8\10\xE0 8086,FPU
|
|
FSUB fpu0,fpureg \1\xD8\11\xE0 8086,FPU
|
|
FSUB void \2\xDE\xE9 8086,FPU,ND
|
|
FSUBP fpureg \1\xDE\10\xE8 8086,FPU
|
|
FSUBP fpureg,fpu0 \1\xDE\10\xE8 8086,FPU
|
|
FSUBP void \2\xDE\xE9 8086,FPU,ND
|
|
FSUBR mem32 \1\xD8\205 8086,FPU
|
|
FSUBR mem64 \1\xDC\205 8086,FPU
|
|
FSUBR fpureg|to \1\xDC\10\xE0 8086,FPU
|
|
FSUBR fpureg,fpu0 \1\xDC\10\xE0 8086,FPU
|
|
FSUBR fpureg \1\xD8\10\xE8 8086,FPU
|
|
FSUBR fpu0,fpureg \1\xD8\11\xE8 8086,FPU
|
|
FSUBR void \2\xDE\xE1 8086,FPU,ND
|
|
FSUBRP fpureg \1\xDE\10\xE0 8086,FPU
|
|
FSUBRP fpureg,fpu0 \1\xDE\10\xE0 8086,FPU
|
|
FSUBRP void \2\xDE\xE1 8086,FPU,ND
|
|
FTST void \2\xD9\xE4 8086,FPU
|
|
FUCOM fpureg \1\xDD\10\xE0 386,FPU
|
|
FUCOM fpu0,fpureg \1\xDD\11\xE0 386,FPU
|
|
FUCOM void \2\xDD\xE1 386,FPU,ND
|
|
FUCOMI fpureg \1\xDB\10\xE8 P6,FPU
|
|
FUCOMI fpu0,fpureg \1\xDB\11\xE8 P6,FPU
|
|
FUCOMI void \2\xDB\xE9 P6,FPU,ND
|
|
FUCOMIP fpureg \1\xDF\10\xE8 P6,FPU
|
|
FUCOMIP fpu0,fpureg \1\xDF\11\xE8 P6,FPU
|
|
FUCOMIP void \2\xDF\xE9 P6,FPU,ND
|
|
FUCOMP fpureg \1\xDD\10\xE8 386,FPU
|
|
FUCOMP fpu0,fpureg \1\xDD\11\xE8 386,FPU
|
|
FUCOMP void \2\xDD\xE9 386,FPU,ND
|
|
FUCOMPP void \2\xDA\xE9 386,FPU
|
|
FXAM void \2\xD9\xE5 8086,FPU
|
|
FXCH fpureg \1\xD9\10\xC8 8086,FPU
|
|
FXCH fpureg,fpu0 \1\xD9\10\xC8 8086,FPU
|
|
FXCH fpu0,fpureg \1\xD9\11\xC8 8086,FPU
|
|
FXCH void \2\xD9\xC9 8086,FPU,ND
|
|
FXTRACT void \2\xD9\xF4 8086,FPU
|
|
FYL2X void \2\xD9\xF1 8086,FPU
|
|
FYL2XP1 void \2\xD9\xF9 8086,FPU
|
|
HLT void \1\xF4 8086,PRIV
|
|
IBTS mem,reg16 \320\2\x0F\xA7\101 386,SW,UNDOC,ND
|
|
IBTS reg16,reg16 \320\2\x0F\xA7\101 386,UNDOC,ND
|
|
IBTS mem,reg32 \321\2\x0F\xA7\101 386,SD,UNDOC,ND
|
|
IBTS reg32,reg32 \321\2\x0F\xA7\101 386,UNDOC,ND
|
|
ICEBP void \1\xF1 386,ND
|
|
IDIV rm8 \1\xF6\207 8086
|
|
IDIV rm16 \320\1\xF7\207 8086
|
|
IDIV rm32 \321\1\xF7\207 386
|
|
IDIV rm64 \324\1\xF7\207 X64
|
|
IMUL rm8 \1\xF6\205 8086
|
|
IMUL rm16 \320\1\xF7\205 8086
|
|
IMUL rm32 \321\1\xF7\205 386
|
|
IMUL rm64 \324\1\xF7\205 X64
|
|
IMUL reg16,mem \320\2\x0F\xAF\110 386,SM
|
|
IMUL reg16,reg16 \320\2\x0F\xAF\110 386
|
|
IMUL reg32,mem \321\2\x0F\xAF\110 386,SM
|
|
IMUL reg32,reg32 \321\2\x0F\xAF\110 386
|
|
IMUL reg64,mem \324\2\x0F\xAF\110 X64,SM
|
|
IMUL reg64,reg64 \324\2\x0F\xAF\110 X64
|
|
IMUL reg16,mem,imm8 \320\1\x6B\110\16 186,SM
|
|
IMUL reg16,mem,sbyte \320\1\x6B\110\16 186,SM,ND
|
|
IMUL reg16,mem,imm16 \320\1\x69\110\32 186,SM
|
|
IMUL reg16,mem,imm \320\146\x69\110\142 186,SM,ND
|
|
IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186
|
|
IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND
|
|
IMUL reg16,reg16,imm16 \320\1\x69\110\32 186
|
|
IMUL reg16,reg16,imm \320\146\x69\110\142 186,SM,ND
|
|
IMUL reg32,mem,imm8 \321\1\x6B\110\16 386,SM
|
|
IMUL reg32,mem,sbyte \321\1\x6B\110\16 386,SM,ND
|
|
IMUL reg32,mem,imm32 \321\1\x69\110\42 386,SM
|
|
IMUL reg32,mem,imm \321\156\x69\110\152 386,SM,ND
|
|
IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386
|
|
IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND
|
|
IMUL reg32,reg32,imm32 \321\1\x69\110\42 386
|
|
IMUL reg32,reg32,imm \321\156\x69\110\152 386,SM,ND
|
|
IMUL reg64,mem,imm8 \324\1\x6B\110\16 X64,SM
|
|
IMUL reg64,mem,sbyte \324\1\x6B\110\16 X64,SM,ND
|
|
IMUL reg64,mem,imm32 \324\1\x69\110\42 X64,SM
|
|
IMUL reg64,mem,imm \324\156\x69\110\152 X64,SM,ND
|
|
IMUL reg64,reg64,imm8 \324\1\x6B\110\16 X64
|
|
IMUL reg64,reg64,sbyte \324\1\x6B\110\16 X64,SM,ND
|
|
IMUL reg64,reg64,imm32 \324\1\x69\110\42 X64
|
|
IMUL reg64,reg64,imm \324\156\x69\110\152 X64,SM,ND
|
|
IMUL reg16,imm8 \320\1\x6B\100\15 186
|
|
IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND
|
|
IMUL reg16,imm16 \320\1\x69\100\31 186
|
|
IMUL reg16,imm \320\145\x69\100\141 186,SM,ND
|
|
IMUL reg32,imm8 \321\1\x6B\100\15 386
|
|
IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND
|
|
IMUL reg32,imm32 \321\1\x69\100\41 386
|
|
IMUL reg32,imm \321\155\x69\100\151 386,SM,ND
|
|
IMUL reg64,sbyte \324\1\x6B\100\15 X64,SM,ND
|
|
IMUL reg64,imm32 \324\1\x69\100\41 X64
|
|
IMUL reg64,imm \324\155\x69\100\151 X64,SM,ND
|
|
IN reg_al,imm \1\xE4\25 8086,SB
|
|
IN reg_ax,imm \320\1\xE5\25 8086,SB
|
|
IN reg_eax,imm \321\1\xE5\25 386,SB
|
|
IN reg_al,reg_dx \1\xEC 8086
|
|
IN reg_ax,reg_dx \320\1\xED 8086
|
|
IN reg_eax,reg_dx \321\1\xED 386
|
|
INC reg16 \320\10\x40 8086,NOLONG
|
|
INC reg32 \321\10\x40 386,NOLONG
|
|
INC rm8 \1\xFE\200 8086
|
|
INC rm16 \320\1\xFF\200 8086
|
|
INC rm32 \321\1\xFF\200 386
|
|
INC rm64 \324\1\xFF\200 X64
|
|
INCBIN ignore ignore ignore
|
|
INSB void \1\x6C 186
|
|
INSD void \321\1\x6D 386
|
|
INSW void \320\1\x6D 186
|
|
INT imm \1\xCD\24 8086,SB
|
|
INT01 void \1\xF1 386,ND
|
|
INT1 void \1\xF1 386
|
|
INT03 void \1\xCC 8086,ND
|
|
INT3 void \1\xCC 8086
|
|
INTO void \1\xCE 8086,NOLONG
|
|
INVD void \2\x0F\x08 486,PRIV
|
|
INVLPG mem \2\x0F\x01\207 486,PRIV
|
|
INVLPGA reg_ax,reg_ecx \310\3\x0F\x01\xDF X86_64,AMD,NOLONG
|
|
INVLPGA reg_eax,reg_ecx \311\3\x0F\x01\xDF X86_64,AMD
|
|
INVLPGA reg_rax,reg_ecx \323\313\3\x0F\x01\xDF X64,AMD
|
|
INVLPGA void \3\x0F\x01\xDF X86_64,AMD
|
|
IRET void \322\1\xCF 8086
|
|
IRETD void \321\1\xCF 386
|
|
IRETQ void \324\1\xCF X64
|
|
IRETW void \320\1\xCF 8086
|
|
JCXZ imm \310\1\xE3\50 8086,NOLONG
|
|
JECXZ imm \311\1\xE3\50 386
|
|
JMP imm|short \1\xEB\50 8086
|
|
JMP imm \371\1\xEB\50 8086,ND
|
|
JMP imm \322\1\xE9\64 8086
|
|
JMP imm|near \322\1\xE9\64 8086,ND
|
|
JMP imm|far \322\1\xEA\34\74 8086,ND,NOLONG
|
|
JMP imm16 \320\1\xE9\64 8086
|
|
JMP imm16|near \320\1\xE9\64 8086,ND
|
|
JMP imm16|far \320\1\xEA\34\74 8086,ND,NOLONG
|
|
JMP imm32 \321\1\xE9\64 386
|
|
JMP imm32|near \321\1\xE9\64 386,ND
|
|
JMP imm32|far \321\1\xEA\34\74 386,ND,NOLONG
|
|
JMP imm:imm \322\1\xEA\35\30 8086,NOLONG
|
|
JMP imm16:imm \320\1\xEA\31\30 8086,NOLONG
|
|
JMP imm:imm16 \320\1\xEA\31\30 8086,NOLONG
|
|
JMP imm32:imm \321\1\xEA\41\30 386,NOLONG
|
|
JMP imm:imm32 \321\1\xEA\41\30 386,NOLONG
|
|
JMP mem|far \322\1\xFF\205 8086
|
|
JMP mem16|far \320\1\xFF\205 8086
|
|
JMP mem32|far \321\1\xFF\205 386
|
|
JMP mem|near \322\1\xFF\204 8086
|
|
JMP mem16|near \320\1\xFF\204 8086
|
|
JMP mem32|near \321\1\xFF\204 386,NOLONG
|
|
JMP mem64|near \324\1\xFF\204 X64
|
|
JMP reg16 \320\1\xFF\204 8086
|
|
JMP reg32 \321\1\xFF\204 386,NOLONG
|
|
JMP reg64 \324\1\xFF\204 X64
|
|
JMP mem \322\1\xFF\204 8086
|
|
JMP mem16 \320\1\xFF\204 8086
|
|
JMP mem32 \321\1\xFF\204 386,NOLONG
|
|
JMP mem64 \324\1\xFF\204 X64
|
|
JMPE imm \322\2\x0F\xB8\64 IA64
|
|
JMPE imm16 \320\2\x0F\xB8\64 IA64
|
|
JMPE imm32 \321\2\x0F\xB8\64 IA64
|
|
JMPE rm16 \320\2\x0F\x00\206 IA64
|
|
JMPE rm32 \321\2\x0F\x00\206 IA64
|
|
JRCXZ imm \1\xE3\50 X64
|
|
LAHF void \1\x9F 8086
|
|
LAR reg16,mem \320\2\x0F\x02\110 286,PROT,SW
|
|
LAR reg16,reg16 \320\2\x0F\x02\110 286,PROT
|
|
LAR reg16,reg32 \320\2\x0F\x02\110 386,PROT
|
|
LAR reg16,reg64 \320\323\2\x0F\x02\110 X64,PROT,ND
|
|
LAR reg32,mem \321\2\x0F\x02\110 386,PROT,SW
|
|
LAR reg32,reg16 \321\2\x0F\x02\110 386,PROT
|
|
LAR reg32,reg32 \321\2\x0F\x02\110 386,PROT
|
|
LAR reg32,reg64 \321\323\2\x0F\x02\110 X64,PROT,ND
|
|
LAR reg64,mem \324\2\x0F\x02\110 X64,PROT,SW
|
|
LAR reg64,reg16 \324\2\x0F\x02\110 X64,PROT
|
|
LAR reg64,reg32 \324\2\x0F\x02\110 X64,PROT
|
|
LAR reg64,reg64 \324\2\x0F\x02\110 X64,PROT
|
|
LDS reg16,mem \320\1\xC5\110 8086,NOLONG
|
|
LDS reg32,mem \321\1\xC5\110 386,NOLONG
|
|
LEA reg16,mem \320\1\x8D\110 8086
|
|
LEA reg32,mem \321\1\x8D\110 386
|
|
LEA reg64,mem \324\1\x8D\110 X64
|
|
LEAVE void \1\xC9 186
|
|
LES reg16,mem \320\1\xC4\110 8086,NOLONG
|
|
LES reg32,mem \321\1\xC4\110 386,NOLONG
|
|
LFENCE void \3\x0F\xAE\xE8 X64,AMD
|
|
LFS reg16,mem \320\2\x0F\xB4\110 386
|
|
LFS reg32,mem \321\2\x0F\xB4\110 386
|
|
LGDT mem \2\x0F\x01\202 286,PRIV
|
|
LGS reg16,mem \320\2\x0F\xB5\110 386
|
|
LGS reg32,mem \321\2\x0F\xB5\110 386
|
|
LIDT mem \2\x0F\x01\203 286,PRIV
|
|
LLDT mem \1\x0F\170\202 286,PROT,PRIV
|
|
LLDT mem16 \1\x0F\170\202 286,PROT,PRIV
|
|
LLDT reg16 \1\x0F\170\202 286,PROT,PRIV
|
|
LMSW mem \2\x0F\x01\206 286,PRIV
|
|
LMSW mem16 \2\x0F\x01\206 286,PRIV
|
|
LMSW reg16 \2\x0F\x01\206 286,PRIV
|
|
LOADALL void \2\x0F\x07 386,UNDOC
|
|
LOADALL286 void \2\x0F\x05 286,UNDOC
|
|
LODSB void \1\xAC 8086
|
|
LODSD void \321\1\xAD 386
|
|
LODSQ void \324\1\xAD X64
|
|
LODSW void \320\1\xAD 8086
|
|
LOOP imm \312\1\xE2\50 8086
|
|
LOOP imm,reg_cx \310\1\xE2\50 8086,NOLONG
|
|
LOOP imm,reg_ecx \311\1\xE2\50 386
|
|
LOOP imm,reg_rcx \313\1\xE2\50 X64
|
|
LOOPE imm \312\1\xE1\50 8086
|
|
LOOPE imm,reg_cx \310\1\xE1\50 8086,NOLONG
|
|
LOOPE imm,reg_ecx \311\1\xE1\50 386
|
|
LOOPE imm,reg_rcx \313\1\xE1\50 X64
|
|
LOOPNE imm \312\1\xE0\50 8086
|
|
LOOPNE imm,reg_cx \310\1\xE0\50 8086,NOLONG
|
|
LOOPNE imm,reg_ecx \311\1\xE0\50 386
|
|
LOOPNE imm,reg_rcx \313\1\xE0\50 X64
|
|
LOOPNZ imm \312\1\xE0\50 8086
|
|
LOOPNZ imm,reg_cx \310\1\xE0\50 8086,NOLONG
|
|
LOOPNZ imm,reg_ecx \311\1\xE0\50 386
|
|
LOOPNZ imm,reg_rcx \313\1\xE0\50 X64
|
|
LOOPZ imm \312\1\xE1\50 8086
|
|
LOOPZ imm,reg_cx \310\1\xE1\50 8086,NOLONG
|
|
LOOPZ imm,reg_ecx \311\1\xE1\50 386
|
|
LOOPZ imm,reg_rcx \313\1\xE1\50 X64
|
|
LSL reg16,mem \320\2\x0F\x03\110 286,PROT,SW
|
|
LSL reg16,reg16 \320\2\x0F\x03\110 286,PROT
|
|
LSL reg16,reg32 \320\2\x0F\x03\110 386,PROT
|
|
LSL reg16,reg64 \320\323\2\x0F\x03\110 X64,PROT,ND
|
|
LSL reg32,mem \321\2\x0F\x03\110 386,PROT,SW
|
|
LSL reg32,reg16 \321\2\x0F\x03\110 386,PROT
|
|
LSL reg32,reg32 \321\2\x0F\x03\110 386,PROT
|
|
LSL reg32,reg64 \321\323\2\x0F\x03\110 X64,PROT,ND
|
|
LSL reg64,mem \324\2\x0F\x03\110 X64,PROT,SW
|
|
LSL reg64,reg16 \324\2\x0F\x03\110 X64,PROT
|
|
LSL reg64,reg32 \324\2\x0F\x03\110 X64,PROT
|
|
LSL reg64,reg64 \324\2\x0F\x03\110 X64,PROT
|
|
LSS reg16,mem \320\2\x0F\xB2\110 386
|
|
LSS reg32,mem \321\2\x0F\xB2\110 386
|
|
LTR mem \1\x0F\170\203 286,PROT,PRIV
|
|
LTR mem16 \1\x0F\170\203 286,PROT,PRIV,NOLONG
|
|
LTR reg16 \1\x0F\170\203 286,PROT,PRIV,NOLONG
|
|
MFENCE void \3\x0F\xAE\xF0 X64,AMD
|
|
MONITOR void \3\x0F\x01\xC8 PRESCOTT
|
|
MONITOR reg_eax,reg_ecx,reg_edx \3\x0F\x01\xC8 PRESCOTT,ND
|
|
MOV mem,reg_sreg \1\x8C\101 8086,SM
|
|
MOV reg16,reg_sreg \320\1\x8C\101 8086
|
|
MOV reg32,reg_sreg \321\1\x8C\101 386
|
|
MOV reg_sreg,mem \1\x8E\110 8086,SM
|
|
MOV reg_sreg,reg16 \1\x8E\110 8086
|
|
MOV reg_sreg,reg32 \1\x8E\110 386
|
|
MOV reg_al,mem_offs \1\xA0\45 8086,SM
|
|
MOV reg_ax,mem_offs \320\1\xA1\45 8086,SM
|
|
MOV reg_eax,mem_offs \321\1\xA1\45 386,SM
|
|
MOV reg_rax,mem_offs \324\1\xA1\45 X64,SM
|
|
MOV mem_offs,reg_al \1\xA2\44 8086,SM
|
|
MOV mem_offs,reg_ax \320\1\xA3\44 8086,SM
|
|
MOV mem_offs,reg_eax \321\1\xA3\44 386,SM
|
|
MOV mem_offs,reg_rax \324\1\xA3\44 X64,SM
|
|
MOV reg32,reg_creg \334\2\x0F\x20\101 386,PRIV,NOLONG
|
|
MOV reg64,reg_creg \323\2\x0F\x20\101 X64,PRIV
|
|
MOV reg_creg,reg32 \334\2\x0F\x22\110 386,PRIV,NOLONG
|
|
MOV reg_creg,reg64 \323\2\x0F\x22\110 X64,PRIV
|
|
MOV reg32,reg_dreg \2\x0F\x21\101 386,PRIV
|
|
MOV reg64,reg_dreg \323\2\x0F\x21\101 X64,PRIV
|
|
MOV reg_dreg,reg32 \2\x0F\x23\110 386,PRIV
|
|
MOV reg_dreg,reg64 \323\2\x0F\x23\110 X64,PRIV
|
|
MOV reg32,reg_treg \2\x0F\x24\101 386,NOLONG,ND
|
|
MOV reg_treg,reg32 \2\x0F\x26\110 386,NOLONG,ND
|
|
MOV mem,reg8 \1\x88\101 8086,SM
|
|
MOV reg8,reg8 \1\x88\101 8086
|
|
MOV mem,reg16 \320\1\x89\101 8086,SM
|
|
MOV reg16,reg16 \320\1\x89\101 8086
|
|
MOV mem,reg32 \321\1\x89\101 386,SM
|
|
MOV reg32,reg32 \321\1\x89\101 386
|
|
MOV mem,reg64 \324\1\x89\101 X64,SM
|
|
MOV reg64,reg64 \324\1\x89\101 X64
|
|
MOV reg8,mem \1\x8A\110 8086,SM
|
|
MOV reg8,reg8 \1\x8A\110 8086
|
|
MOV reg16,mem \320\1\x8B\110 8086,SM
|
|
MOV reg16,reg16 \320\1\x8B\110 8086
|
|
MOV reg32,mem \321\1\x8B\110 386,SM
|
|
MOV reg32,reg32 \321\1\x8B\110 386
|
|
MOV reg64,mem \324\1\x8B\110 X64,SM
|
|
MOV reg64,reg64 \324\1\x8B\110 X64
|
|
MOV reg8,imm \10\xB0\21 8086,SM
|
|
MOV reg16,imm \320\10\xB8\31 8086,SM
|
|
MOV reg32,imm \321\10\xB8\41 386,SM
|
|
MOV reg64,imm \324\10\xB8\55 X64,SM
|
|
MOV rm8,imm \1\xC6\200\21 8086,SM
|
|
MOV rm16,imm \320\1\xC7\200\31 8086,SM
|
|
MOV rm32,imm \321\1\xC7\200\41 386,SM
|
|
MOV rm64,imm \324\1\xC7\200\41 X64,SM
|
|
MOV mem,imm8 \1\xC6\200\21 8086,SM
|
|
MOV mem,imm16 \320\1\xC7\200\31 8086,SM
|
|
MOV mem,imm32 \321\1\xC7\200\41 386,SM
|
|
MOVD mmxreg,mem \2\x0F\x6E\110 PENT,MMX,SD
|
|
MOVD mmxreg,reg32 \2\x0F\x6E\110 PENT,MMX
|
|
MOVD mem,mmxreg \2\x0F\x7E\101 PENT,MMX,SD
|
|
MOVD reg32,mmxreg \2\x0F\x7E\101 PENT,MMX
|
|
MOVD xmmreg,mem \320\2\x0F\x6E\110 X64,SD
|
|
MOVD xmmreg,reg32 \320\2\x0F\x6E\110 X64
|
|
MOVD mem,xmmreg \320\2\x0F\x7E\101 X64,SD
|
|
MOVD reg32,xmmreg \320\2\x0F\x7E\101 X64,SSE
|
|
MOVQ mmxreg,mmxrm \2\x0F\x6F\110 PENT,MMX,SQ
|
|
MOVQ mmxrm,mmxreg \2\x0F\x7F\101 PENT,MMX,SQ
|
|
MOVQ mmxreg,rm64 \2\x0F\x6E\110 X64,MMX
|
|
MOVQ rm64,mmxreg \2\x0F\x7E\101 X64,MMX
|
|
MOVSB void \1\xA4 8086
|
|
MOVSD void \321\1\xA5 386
|
|
MOVSQ void \324\1\xA5 X64
|
|
MOVSW void \320\1\xA5 8086
|
|
MOVSX reg16,mem \320\2\x0F\xBE\110 386,SB
|
|
MOVSX reg16,reg8 \320\2\x0F\xBE\110 386
|
|
MOVSX reg32,rm8 \321\2\x0F\xBE\110 386
|
|
MOVSX reg32,rm16 \321\2\x0F\xBF\110 386
|
|
MOVSX reg64,rm8 \324\2\x0F\xBE\110 X64
|
|
MOVSX reg64,rm16 \324\2\x0F\xBF\110 X64
|
|
MOVSX reg64,rm32 \324\1\x63\110 X64
|
|
MOVZX reg16,mem \320\2\x0F\xB6\110 386,SB
|
|
MOVZX reg16,reg8 \320\2\x0F\xB6\110 386
|
|
MOVZX reg32,rm8 \321\2\x0F\xB6\110 386
|
|
MOVZX reg32,rm16 \321\2\x0F\xB7\110 386
|
|
MOVZX reg64,rm8 \324\2\x0F\xB6\110 X64
|
|
MOVZX reg64,rm16 \324\2\x0F\xB7\110 X64
|
|
MUL rm8 \1\xF6\204 8086
|
|
MUL rm16 \320\1\xF7\204 8086
|
|
MUL rm32 \321\1\xF7\204 386
|
|
MUL rm64 \324\1\xF7\204 X64
|
|
MWAIT void \3\x0F\x01\xC9 PRESCOTT
|
|
MWAIT reg_eax,reg_ecx \3\x0F\x01\xC9 PRESCOTT,ND
|
|
NEG rm8 \1\xF6\203 8086
|
|
NEG rm16 \320\1\xF7\203 8086
|
|
NEG rm32 \321\1\xF7\203 386
|
|
NEG rm64 \324\1\xF7\203 X64
|
|
NOP void \314\1\x90 8086
|
|
NOP rm16 \320\2\x0F\x1F\200 P6
|
|
NOP rm32 \321\2\x0F\x1F\200 P6
|
|
NOP rm64 \324\2\x0F\x1F\200 X64
|
|
NOT rm8 \1\xF6\202 8086
|
|
NOT rm16 \320\1\xF7\202 8086
|
|
NOT rm32 \321\1\xF7\202 386
|
|
NOT rm64 \324\1\xF7\202 X64
|
|
OR mem,reg8 \1\x08\101 8086,SM
|
|
OR reg8,reg8 \1\x08\101 8086
|
|
OR mem,reg16 \320\1\x09\101 8086,SM
|
|
OR reg16,reg16 \320\1\x09\101 8086
|
|
OR mem,reg32 \321\1\x09\101 386,SM
|
|
OR reg32,reg32 \321\1\x09\101 386
|
|
OR mem,reg64 \324\1\x09\101 X64,SM
|
|
OR reg64,reg64 \324\1\x09\101 X64
|
|
OR reg8,mem \1\x0A\110 8086,SM
|
|
OR reg8,reg8 \1\x0A\110 8086
|
|
OR reg16,mem \320\1\x0B\110 8086,SM
|
|
OR reg16,reg16 \320\1\x0B\110 8086
|
|
OR reg32,mem \321\1\x0B\110 386,SM
|
|
OR reg32,reg32 \321\1\x0B\110 386
|
|
OR reg64,mem \324\1\x0B\110 X64,SM
|
|
OR reg64,reg64 \324\1\x0B\110 X64
|
|
OR rm16,imm8 \320\1\x83\201\15 8086
|
|
OR rm32,imm8 \321\1\x83\201\15 386
|
|
OR rm64,imm8 \324\1\x83\201\15 X64
|
|
OR reg_al,imm \1\x0C\21 8086,SM
|
|
OR reg_ax,sbyte \320\1\x83\201\15 8086,SM,ND
|
|
OR reg_ax,imm \320\1\x0D\31 8086,SM
|
|
OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND
|
|
OR reg_eax,imm \321\1\x0D\41 386,SM
|
|
OR reg_rax,sbyte \324\1\x83\201\15 X64,SM,ND
|
|
OR reg_rax,imm \324\1\x0D\41 X64,SM
|
|
OR rm8,imm \1\x80\201\21 8086,SM
|
|
OR rm16,imm \320\145\x81\201\141 8086,SM
|
|
OR rm32,imm \321\155\x81\201\151 386,SM
|
|
OR rm64,imm \324\155\x81\201\151 X64,SM
|
|
OR mem,imm8 \1\x80\201\21 8086,SM
|
|
OR mem,imm16 \320\145\x81\201\141 8086,SM
|
|
OR mem,imm32 \321\155\x81\201\151 386,SM
|
|
OUT imm,reg_al \1\xE6\24 8086,SB
|
|
OUT imm,reg_ax \320\1\xE7\24 8086,SB
|
|
OUT imm,reg_eax \321\1\xE7\24 386,SB
|
|
OUT reg_dx,reg_al \1\xEE 8086
|
|
OUT reg_dx,reg_ax \320\1\xEF 8086
|
|
OUT reg_dx,reg_eax \321\1\xEF 386
|
|
OUTSB void \1\x6E 186
|
|
OUTSD void \321\1\x6F 386
|
|
OUTSW void \320\1\x6F 186
|
|
PACKSSDW mmxreg,mmxrm \2\x0F\x6B\110 PENT,MMX,SQ
|
|
PACKSSWB mmxreg,mmxrm \2\x0F\x63\110 PENT,MMX,SQ
|
|
PACKUSWB mmxreg,mmxrm \2\x0F\x67\110 PENT,MMX,SQ
|
|
PADDB mmxreg,mmxrm \2\x0F\xFC\110 PENT,MMX,SQ
|
|
PADDD mmxreg,mmxrm \2\x0F\xFE\110 PENT,MMX,SQ
|
|
PADDSB mmxreg,mmxrm \2\x0F\xEC\110 PENT,MMX,SQ
|
|
PADDSIW mmxreg,mmxrm \2\x0F\x51\110 PENT,MMX,SQ,CYRIX
|
|
PADDSW mmxreg,mmxrm \2\x0F\xED\110 PENT,MMX,SQ
|
|
PADDUSB mmxreg,mmxrm \2\x0F\xDC\110 PENT,MMX,SQ
|
|
PADDUSW mmxreg,mmxrm \2\x0F\xDD\110 PENT,MMX,SQ
|
|
PADDW mmxreg,mmxrm \2\x0F\xFD\110 PENT,MMX,SQ
|
|
PAND mmxreg,mmxrm \2\x0F\xDB\110 PENT,MMX,SQ
|
|
PANDN mmxreg,mmxrm \2\x0F\xDF\110 PENT,MMX,SQ
|
|
PAUSE void \314\333\1\x90 8086
|
|
PAVEB mmxreg,mmxrm \2\x0F\x50\110 PENT,MMX,SQ,CYRIX
|
|
PAVGUSB mmxreg,mmxrm \2\x0F\x0F\110\01\xBF PENT,3DNOW,SQ
|
|
PCMPEQB mmxreg,mmxrm \2\x0F\x74\110 PENT,MMX,SQ
|
|
PCMPEQD mmxreg,mmxrm \2\x0F\x76\110 PENT,MMX,SQ
|
|
PCMPEQW mmxreg,mmxrm \2\x0F\x75\110 PENT,MMX,SQ
|
|
PCMPGTB mmxreg,mmxrm \2\x0F\x64\110 PENT,MMX,SQ
|
|
PCMPGTD mmxreg,mmxrm \2\x0F\x66\110 PENT,MMX,SQ
|
|
PCMPGTW mmxreg,mmxrm \2\x0F\x65\110 PENT,MMX,SQ
|
|
PDISTIB mmxreg,mem \2\x0F\x54\110 PENT,MMX,SM,CYRIX
|
|
PF2ID mmxreg,mmxrm \2\x0F\x0F\110\01\x1D PENT,3DNOW,SQ
|
|
PFACC mmxreg,mmxrm \2\x0F\x0F\110\01\xAE PENT,3DNOW,SQ
|
|
PFADD mmxreg,mmxrm \2\x0F\x0F\110\01\x9E PENT,3DNOW,SQ
|
|
PFCMPEQ mmxreg,mmxrm \2\x0F\x0F\110\01\xB0 PENT,3DNOW,SQ
|
|
PFCMPGE mmxreg,mmxrm \2\x0F\x0F\110\01\x90 PENT,3DNOW,SQ
|
|
PFCMPGT mmxreg,mmxrm \2\x0F\x0F\110\01\xA0 PENT,3DNOW,SQ
|
|
PFMAX mmxreg,mmxrm \2\x0F\x0F\110\01\xA4 PENT,3DNOW,SQ
|
|
PFMIN mmxreg,mmxrm \2\x0F\x0F\110\01\x94 PENT,3DNOW,SQ
|
|
PFMUL mmxreg,mmxrm \2\x0F\x0F\110\01\xB4 PENT,3DNOW,SQ
|
|
PFRCP mmxreg,mmxrm \2\x0F\x0F\110\01\x96 PENT,3DNOW,SQ
|
|
PFRCPIT1 mmxreg,mmxrm \2\x0F\x0F\110\01\xA6 PENT,3DNOW,SQ
|
|
PFRCPIT2 mmxreg,mmxrm \2\x0F\x0F\110\01\xB6 PENT,3DNOW,SQ
|
|
PFRSQIT1 mmxreg,mmxrm \2\x0F\x0F\110\01\xA7 PENT,3DNOW,SQ
|
|
PFRSQRT mmxreg,mmxrm \2\x0F\x0F\110\01\x97 PENT,3DNOW,SQ
|
|
PFSUB mmxreg,mmxrm \2\x0F\x0F\110\01\x9A PENT,3DNOW,SQ
|
|
PFSUBR mmxreg,mmxrm \2\x0F\x0F\110\01\xAA PENT,3DNOW,SQ
|
|
PI2FD mmxreg,mmxrm \2\x0F\x0F\110\01\x0D PENT,3DNOW,SQ
|
|
PMACHRIW mmxreg,mem \2\x0F\x5E\110 PENT,MMX,SM,CYRIX
|
|
PMADDWD mmxreg,mmxrm \2\x0F\xF5\110 PENT,MMX,SQ
|
|
PMAGW mmxreg,mmxrm \2\x0F\x52\110 PENT,MMX,SQ,CYRIX
|
|
PMULHRIW mmxreg,mmxrm \2\x0F\x5D\110 PENT,MMX,SQ,CYRIX
|
|
PMULHRWA mmxreg,mmxrm \2\x0F\x0F\110\1\xB7 PENT,3DNOW,SQ
|
|
PMULHRWC mmxreg,mmxrm \2\x0F\x59\110 PENT,MMX,SQ,CYRIX
|
|
PMULHW mmxreg,mmxrm \2\x0F\xE5\110 PENT,MMX,SQ
|
|
PMULLW mmxreg,mmxrm \2\x0F\xD5\110 PENT,MMX,SQ
|
|
PMVGEZB mmxreg,mem \2\x0F\x5C\110 PENT,MMX,SM,CYRIX
|
|
PMVLZB mmxreg,mem \2\x0F\x5B\110 PENT,MMX,SM,CYRIX
|
|
PMVNZB mmxreg,mem \2\x0F\x5A\110 PENT,MMX,SM,CYRIX
|
|
PMVZB mmxreg,mem \2\x0F\x58\110 PENT,MMX,SM,CYRIX
|
|
POP reg16 \320\10\x58 8086
|
|
POP reg32 \321\10\x58 386,NOLONG
|
|
POP reg64 \323\10\x58 X64
|
|
POP rm16 \320\1\x8F\200 8086
|
|
POP rm32 \321\1\x8F\200 386,NOLONG
|
|
POP rm64 \323\1\x8F\200 X64
|
|
POP reg_cs \1\x0F 8086,UNDOC,ND
|
|
POP reg_dess \4 8086,NOLONG
|
|
POP reg_fsgs \1\x0F\5 386
|
|
POPA void \322\1\x61 186,NOLONG
|
|
POPAD void \321\1\x61 386,NOLONG
|
|
POPAW void \320\1\x61 186,NOLONG
|
|
POPF void \322\1\x9D 8086
|
|
POPFD void \321\1\x9D 386,NOLONG
|
|
POPFQ void \321\1\x9D X64
|
|
POPFW void \320\1\x9D 8086
|
|
POR mmxreg,mmxrm \2\x0F\xEB\110 PENT,MMX,SQ
|
|
PREFETCH mem \2\x0F\x0D\200 PENT,3DNOW,SM
|
|
PREFETCHW mem \2\x0F\x0D\201 PENT,3DNOW,SM
|
|
PSLLD mmxreg,mmxrm \2\x0F\xF2\110 PENT,MMX,SQ
|
|
PSLLD mmxreg,imm \2\x0F\x72\206\25 PENT,MMX
|
|
PSLLQ mmxreg,mmxrm \2\x0F\xF3\110 PENT,MMX,SQ
|
|
PSLLQ mmxreg,imm \2\x0F\x73\206\25 PENT,MMX
|
|
PSLLW mmxreg,mmxrm \2\x0F\xF1\110 PENT,MMX,SQ
|
|
PSLLW mmxreg,imm \2\x0F\x71\206\25 PENT,MMX
|
|
PSRAD mmxreg,mmxrm \2\x0F\xE2\110 PENT,MMX,SQ
|
|
PSRAD mmxreg,imm \2\x0F\x72\204\25 PENT,MMX
|
|
PSRAW mmxreg,mmxrm \2\x0F\xE1\110 PENT,MMX,SQ
|
|
PSRAW mmxreg,imm \2\x0F\x71\204\25 PENT,MMX
|
|
PSRLD mmxreg,mmxrm \2\x0F\xD2\110 PENT,MMX,SQ
|
|
PSRLD mmxreg,imm \2\x0F\x72\202\25 PENT,MMX
|
|
PSRLQ mmxreg,mmxrm \2\x0F\xD3\110 PENT,MMX,SQ
|
|
PSRLQ mmxreg,imm \2\x0F\x73\202\25 PENT,MMX
|
|
PSRLW mmxreg,mmxrm \2\x0F\xD1\110 PENT,MMX,SQ
|
|
PSRLW mmxreg,imm \2\x0F\x71\202\25 PENT,MMX
|
|
PSUBB mmxreg,mmxrm \2\x0F\xF8\110 PENT,MMX,SQ
|
|
PSUBD mmxreg,mmxrm \2\x0F\xFA\110 PENT,MMX,SQ
|
|
PSUBSB mmxreg,mmxrm \2\x0F\xE8\110 PENT,MMX,SQ
|
|
PSUBSIW mmxreg,mmxrm \2\x0F\x55\110 PENT,MMX,SQ,CYRIX
|
|
PSUBSW mmxreg,mmxrm \2\x0F\xE9\110 PENT,MMX,SQ
|
|
PSUBUSB mmxreg,mmxrm \2\x0F\xD8\110 PENT,MMX,SQ
|
|
PSUBUSW mmxreg,mmxrm \2\x0F\xD9\110 PENT,MMX,SQ
|
|
PSUBW mmxreg,mmxrm \2\x0F\xF9\110 PENT,MMX,SQ
|
|
PUNPCKHBW mmxreg,mmxrm \2\x0F\x68\110 PENT,MMX,SQ
|
|
PUNPCKHDQ mmxreg,mmxrm \2\x0F\x6A\110 PENT,MMX,SQ
|
|
PUNPCKHWD mmxreg,mmxrm \2\x0F\x69\110 PENT,MMX,SQ
|
|
PUNPCKLBW mmxreg,mmxrm \2\x0F\x60\110 PENT,MMX,SQ
|
|
PUNPCKLDQ mmxreg,mmxrm \2\x0F\x62\110 PENT,MMX,SQ
|
|
PUNPCKLWD mmxreg,mmxrm \2\x0F\x61\110 PENT,MMX,SQ
|
|
PUSH reg16 \320\10\x50 8086
|
|
PUSH reg32 \321\10\x50 386,NOLONG
|
|
PUSH reg64 \323\10\x50 X64
|
|
PUSH rm16 \320\1\xFF\206 8086
|
|
PUSH rm32 \321\1\xFF\206 386,NOLONG
|
|
PUSH rm64 \323\1\xFF\206 X64
|
|
PUSH reg_cs \6 8086,NOLONG
|
|
PUSH reg_dess \6 8086,NOLONG
|
|
PUSH reg_fsgs \1\x0F\7 386
|
|
PUSH imm8 \1\x6A\14 186
|
|
PUSH sbyte \1\x6A\14 186,ND
|
|
PUSH imm16 \320\144\x68\140 186
|
|
PUSH imm32 \321\154\x68\150 386,NOLONG
|
|
PUSH imm64 \321\154\x68\150 X64
|
|
PUSH imm \1\x68\34 186
|
|
PUSHA void \322\1\x60 186,NOLONG
|
|
PUSHAD void \321\1\x60 386,NOLONG
|
|
PUSHAW void \320\1\x60 186,NOLONG
|
|
PUSHF void \322\1\x9C 8086
|
|
PUSHFD void \321\1\x9C 386,NOLONG
|
|
PUSHFQ void \321\1\x9C X64
|
|
PUSHFW void \320\1\x9C 8086
|
|
PXOR mmxreg,mmxrm \2\x0F\xEF\110 PENT,MMX,SQ
|
|
RCL rm8,unity \1\xD0\202 8086
|
|
RCL rm8,reg_cl \1\xD2\202 8086
|
|
RCL rm8,imm \1\xC0\202\25 186,SB
|
|
RCL rm16,unity \320\1\xD1\202 8086
|
|
RCL rm16,reg_cl \320\1\xD3\202 8086
|
|
RCL rm16,imm \320\1\xC1\202\25 186,SB
|
|
RCL rm32,unity \321\1\xD1\202 386
|
|
RCL rm32,reg_cl \321\1\xD3\202 386
|
|
RCL rm32,imm \321\1\xC1\202\25 386,SB
|
|
RCL rm64,unity \324\1\xD1\202 X64
|
|
RCL rm64,reg_cl \324\1\xD3\202 X64
|
|
RCL rm64,imm \324\1\xC1\202\25 X64,SB
|
|
RCR rm8,unity \1\xD0\203 8086
|
|
RCR rm8,reg_cl \1\xD2\203 8086
|
|
RCR rm8,imm \1\xC0\203\25 186,SB
|
|
RCR rm16,unity \320\1\xD1\203 8086
|
|
RCR rm16,reg_cl \320\1\xD3\203 8086
|
|
RCR rm16,imm \320\1\xC1\203\25 186,SB
|
|
RCR rm32,unity \321\1\xD1\203 386
|
|
RCR rm32,reg_cl \321\1\xD3\203 386
|
|
RCR rm32,imm \321\1\xC1\203\25 386,SB
|
|
RCR rm64,unity \324\1\xD1\203 X64
|
|
RCR rm64,reg_cl \324\1\xD3\203 X64
|
|
RCR rm64,imm \324\1\xC1\203\25 X64,SB
|
|
RDSHR rm32 \321\2\x0F\x36\200 P6,CYRIX,SMM
|
|
RDMSR void \2\x0F\x32 PENT,PRIV
|
|
RDPMC void \2\x0F\x33 P6
|
|
RDTSC void \2\x0F\x31 PENT
|
|
RDTSCP void \3\x0F\x01\xF9 X86_64
|
|
RET void \1\xC3 8086
|
|
RET imm \1\xC2\30 8086,SW
|
|
RETF void \1\xCB 8086
|
|
RETF imm \1\xCA\30 8086,SW
|
|
RETN void \1\xC3 8086
|
|
RETN imm \1\xC2\30 8086,SW
|
|
ROL rm8,unity \1\xD0\200 8086
|
|
ROL rm8,reg_cl \1\xD2\200 8086
|
|
ROL rm8,imm \1\xC0\200\25 186,SB
|
|
ROL rm16,unity \320\1\xD1\200 8086
|
|
ROL rm16,reg_cl \320\1\xD3\200 8086
|
|
ROL rm16,imm \320\1\xC1\200\25 186,SB
|
|
ROL rm32,unity \321\1\xD1\200 386
|
|
ROL rm32,reg_cl \321\1\xD3\200 386
|
|
ROL rm32,imm \321\1\xC1\200\25 386,SB
|
|
ROL rm64,unity \324\1\xD1\200 X64
|
|
ROL rm64,reg_cl \324\1\xD3\200 X64
|
|
ROL rm64,imm \324\1\xC1\200\25 X64,SB
|
|
ROR rm8,unity \1\xD0\201 8086
|
|
ROR rm8,reg_cl \1\xD2\201 8086
|
|
ROR rm8,imm \1\xC0\201\25 186,SB
|
|
ROR rm16,unity \320\1\xD1\201 8086
|
|
ROR rm16,reg_cl \320\1\xD3\201 8086
|
|
ROR rm16,imm \320\1\xC1\201\25 186,SB
|
|
ROR rm32,unity \321\1\xD1\201 386
|
|
ROR rm32,reg_cl \321\1\xD3\201 386
|
|
ROR rm32,imm \321\1\xC1\201\25 386,SB
|
|
ROR rm64,unity \324\1\xD1\201 X64
|
|
ROR rm64,reg_cl \324\1\xD3\201 X64
|
|
ROR rm64,imm \324\1\xC1\201\25 X64,SB
|
|
RDM void \2\x0F\x3A P6,CYRIX,ND
|
|
RSDC reg_sreg,mem80 \2\x0F\x79\110 486,CYRIX,SMM
|
|
RSLDT mem80 \2\x0F\x7B\200 486,CYRIX,SMM
|
|
RSM void \2\x0F\xAA PENT,SMM
|
|
RSTS mem80 \2\x0F\x7D\200 486,CYRIX,SMM
|
|
SAHF void \1\x9E 8086
|
|
SAL rm8,unity \1\xD0\204 8086,ND
|
|
SAL rm8,reg_cl \1\xD2\204 8086,ND
|
|
SAL rm8,imm \1\xC0\204\25 186,ND,SB
|
|
SAL rm16,unity \320\1\xD1\204 8086,ND
|
|
SAL rm16,reg_cl \320\1\xD3\204 8086,ND
|
|
SAL rm16,imm \320\1\xC1\204\25 186,ND,SB
|
|
SAL rm32,unity \321\1\xD1\204 386,ND
|
|
SAL rm32,reg_cl \321\1\xD3\204 386,ND
|
|
SAL rm32,imm \321\1\xC1\204\25 386,ND,SB
|
|
SAL rm64,unity \324\1\xD1\204 X64,ND
|
|
SAL rm64,reg_cl \324\1\xD3\204 X64,ND
|
|
SAL rm64,imm \324\1\xC1\204\25 X64,ND,SB
|
|
SALC void \1\xD6 8086,UNDOC
|
|
SAR rm8,unity \1\xD0\207 8086
|
|
SAR rm8,reg_cl \1\xD2\207 8086
|
|
SAR rm8,imm \1\xC0\207\25 186,SB
|
|
SAR rm16,unity \320\1\xD1\207 8086
|
|
SAR rm16,reg_cl \320\1\xD3\207 8086
|
|
SAR rm16,imm \320\1\xC1\207\25 186,SB
|
|
SAR rm32,unity \321\1\xD1\207 386
|
|
SAR rm32,reg_cl \321\1\xD3\207 386
|
|
SAR rm32,imm \321\1\xC1\207\25 386,SB
|
|
SAR rm64,unity \324\1\xD1\207 X64
|
|
SAR rm64,reg_cl \324\1\xD3\207 X64
|
|
SAR rm64,imm \324\1\xC1\207\25 X64,SB
|
|
SBB mem,reg8 \1\x18\101 8086,SM
|
|
SBB reg8,reg8 \1\x18\101 8086
|
|
SBB mem,reg16 \320\1\x19\101 8086,SM
|
|
SBB reg16,reg16 \320\1\x19\101 8086
|
|
SBB mem,reg32 \321\1\x19\101 386,SM
|
|
SBB reg32,reg32 \321\1\x19\101 386
|
|
SBB mem,reg64 \324\1\x19\101 X64,SM
|
|
SBB reg64,reg64 \324\1\x19\101 X64
|
|
SBB reg8,mem \1\x1A\110 8086,SM
|
|
SBB reg8,reg8 \1\x1A\110 8086
|
|
SBB reg16,mem \320\1\x1B\110 8086,SM
|
|
SBB reg16,reg16 \320\1\x1B\110 8086
|
|
SBB reg32,mem \321\1\x1B\110 386,SM
|
|
SBB reg32,reg32 \321\1\x1B\110 386
|
|
SBB reg64,mem \324\1\x1B\110 X64,SM
|
|
SBB reg64,reg64 \324\1\x1B\110 X64
|
|
SBB rm16,imm8 \320\1\x83\203\15 8086
|
|
SBB rm32,imm8 \321\1\x83\203\15 386
|
|
SBB rm64,imm8 \324\1\x83\203\15 X64
|
|
SBB reg_al,imm \1\x1C\21 8086,SM
|
|
SBB reg_ax,sbyte \320\1\x83\203\15 8086,SM,ND
|
|
SBB reg_ax,imm \320\1\x1D\31 8086,SM
|
|
SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND
|
|
SBB reg_eax,imm \321\1\x1D\41 386,SM
|
|
SBB reg_rax,sbyte \324\1\x83\203\15 X64,SM,ND
|
|
SBB reg_rax,imm \324\1\x1D\41 X64,SM
|
|
SBB rm8,imm \1\x80\203\21 8086,SM
|
|
SBB rm16,imm \320\145\x81\203\141 8086,SM
|
|
SBB rm32,imm \321\155\x81\203\151 386,SM
|
|
SBB rm64,imm \324\155\x81\203\151 X64,SM
|
|
SBB mem,imm8 \1\x80\203\21 8086,SM
|
|
SBB mem,imm16 \320\145\x81\203\141 8086,SM
|
|
SBB mem,imm32 \321\155\x81\203\151 386,SM
|
|
SCASB void \335\1\xAE 8086
|
|
SCASD void \335\321\1\xAF 386
|
|
SCASQ void \335\324\1\xAF X64
|
|
SCASW void \335\320\1\xAF 8086
|
|
SFENCE void \3\x0F\xAE\xF8 X64,AMD
|
|
SGDT mem \2\x0F\x01\200 286
|
|
SHL rm8,unity \1\xD0\204 8086
|
|
SHL rm8,reg_cl \1\xD2\204 8086
|
|
SHL rm8,imm \1\xC0\204\25 186,SB
|
|
SHL rm16,unity \320\1\xD1\204 8086
|
|
SHL rm16,reg_cl \320\1\xD3\204 8086
|
|
SHL rm16,imm \320\1\xC1\204\25 186,SB
|
|
SHL rm32,unity \321\1\xD1\204 386
|
|
SHL rm32,reg_cl \321\1\xD3\204 386
|
|
SHL rm32,imm \321\1\xC1\204\25 386,SB
|
|
SHL rm64,unity \324\1\xD1\204 X64
|
|
SHL rm64,reg_cl \324\1\xD3\204 X64
|
|
SHL rm64,imm \324\1\xC1\204\25 X64,SB
|
|
SHLD mem,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
|
SHLD reg16,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
|
SHLD mem,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
|
SHLD reg32,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
|
|
SHLD mem,reg64,imm \324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
|
|
SHLD reg64,reg64,imm \324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
|
|
SHLD mem,reg16,reg_cl \320\2\x0F\xA5\101 386,SM
|
|
SHLD reg16,reg16,reg_cl \320\2\x0F\xA5\101 386
|
|
SHLD mem,reg32,reg_cl \321\2\x0F\xA5\101 386,SM
|
|
SHLD reg32,reg32,reg_cl \321\2\x0F\xA5\101 386
|
|
SHLD mem,reg64,reg_cl \324\2\x0F\xA5\101 X64,SM
|
|
SHLD reg64,reg64,reg_cl \324\2\x0F\xA5\101 X64
|
|
SHR rm8,unity \1\xD0\205 8086
|
|
SHR rm8,reg_cl \1\xD2\205 8086
|
|
SHR rm8,imm \1\xC0\205\25 186,SB
|
|
SHR rm16,unity \320\1\xD1\205 8086
|
|
SHR rm16,reg_cl \320\1\xD3\205 8086
|
|
SHR rm16,imm \320\1\xC1\205\25 186,SB
|
|
SHR rm32,unity \321\1\xD1\205 386
|
|
SHR rm32,reg_cl \321\1\xD3\205 386
|
|
SHR rm32,imm \321\1\xC1\205\25 386,SB
|
|
SHR rm64,unity \324\1\xD1\205 X64
|
|
SHR rm64,reg_cl \324\1\xD3\205 X64
|
|
SHR rm64,imm \324\1\xC1\205\25 X64,SB
|
|
SHRD mem,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
|
SHRD reg16,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
|
SHRD mem,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
|
SHRD reg32,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
|
|
SHRD mem,reg64,imm \324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
|
|
SHRD reg64,reg64,imm \324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
|
|
SHRD mem,reg16,reg_cl \320\2\x0F\xAD\101 386,SM
|
|
SHRD reg16,reg16,reg_cl \320\2\x0F\xAD\101 386
|
|
SHRD mem,reg32,reg_cl \321\2\x0F\xAD\101 386,SM
|
|
SHRD reg32,reg32,reg_cl \321\2\x0F\xAD\101 386
|
|
SHRD mem,reg64,reg_cl \324\2\x0F\xAD\101 X64,SM
|
|
SHRD reg64,reg64,reg_cl \324\2\x0F\xAD\101 X64
|
|
SIDT mem \2\x0F\x01\201 286
|
|
SLDT mem \1\x0F\170\200 286
|
|
SLDT mem16 \1\x0F\170\200 286
|
|
SLDT reg16 \320\1\x0F\170\200 286
|
|
SLDT reg32 \321\1\x0F\170\200 386
|
|
SKINIT void \3\x0F\x01\xDE X64
|
|
SMI void \1\xF1 386,UNDOC
|
|
SMINT void \2\x0F\x38 P6,CYRIX,ND
|
|
; Older Cyrix chips had this; they had to move due to conflict with MMX
|
|
SMINTOLD void \2\x0F\x7E 486,CYRIX,ND
|
|
SMSW mem \2\x0F\x01\204 286
|
|
SMSW mem16 \2\x0F\x01\204 286
|
|
SMSW reg16 \320\2\x0F\x01\204 286
|
|
SMSW reg32 \321\2\x0F\x01\204 386
|
|
STC void \1\xF9 8086
|
|
STD void \1\xFD 8086
|
|
STGI void \3\x0F\x01\xDC X64
|
|
STI void \1\xFB 8086
|
|
STOSB void \1\xAA 8086
|
|
STOSD void \321\1\xAB 386
|
|
STOSQ void \324\1\xAB X64
|
|
STOSW void \320\1\xAB 8086
|
|
STR mem \1\x0F\170\201 286,PROT
|
|
STR mem16 \1\x0F\170\201 286,PROT
|
|
STR reg16 \320\1\x0F\170\201 286,PROT
|
|
STR reg32 \321\1\x0F\170\201 386,PROT
|
|
STR reg64 \324\1\x0F\170\201 X64
|
|
SUB mem,reg8 \1\x28\101 8086,SM
|
|
SUB reg8,reg8 \1\x28\101 8086
|
|
SUB mem,reg16 \320\1\x29\101 8086,SM
|
|
SUB reg16,reg16 \320\1\x29\101 8086
|
|
SUB mem,reg32 \321\1\x29\101 386,SM
|
|
SUB reg32,reg32 \321\1\x29\101 386
|
|
SUB mem,reg64 \324\1\x29\101 X64,SM
|
|
SUB reg64,reg64 \324\1\x29\101 X64
|
|
SUB reg8,mem \1\x2A\110 8086,SM
|
|
SUB reg8,reg8 \1\x2A\110 8086
|
|
SUB reg16,mem \320\1\x2B\110 8086,SM
|
|
SUB reg16,reg16 \320\1\x2B\110 8086
|
|
SUB reg32,mem \321\1\x2B\110 386,SM
|
|
SUB reg32,reg32 \321\1\x2B\110 386
|
|
SUB reg64,mem \324\1\x2B\110 X64,SM
|
|
SUB reg64,reg64 \324\1\x2B\110 X64
|
|
SUB rm16,imm8 \320\1\x83\205\15 8086
|
|
SUB rm32,imm8 \321\1\x83\205\15 386
|
|
SUB rm64,imm8 \324\1\x83\205\15 X64
|
|
SUB reg_al,imm \1\x2C\21 8086,SM
|
|
SUB reg_ax,sbyte \320\1\x83\205\15 8086,SM,ND
|
|
SUB reg_ax,imm \320\1\x2D\31 8086,SM
|
|
SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND
|
|
SUB reg_eax,imm \321\1\x2D\41 386,SM
|
|
SUB reg_rax,sbyte \324\1\x83\205\15 X64,SM,ND
|
|
SUB reg_rax,imm \324\1\x2D\41 X64,SM
|
|
SUB rm8,imm \1\x80\205\21 8086,SM
|
|
SUB rm16,imm \320\145\x81\205\141 8086,SM
|
|
SUB rm32,imm \321\155\x81\205\151 386,SM
|
|
SUB rm64,imm \324\155\x81\205\151 X64,SM
|
|
SUB mem,imm8 \1\x80\205\21 8086,SM
|
|
SUB mem,imm16 \320\145\x81\205\141 8086,SM
|
|
SUB mem,imm32 \321\155\x81\205\151 386,SM
|
|
SVDC mem80,reg_sreg \2\x0F\x78\101 486,CYRIX,SMM
|
|
SVLDT mem80 \2\x0F\x7A\200 486,CYRIX,SMM,ND
|
|
SVTS mem80 \2\x0F\x7C\200 486,CYRIX,SMM
|
|
SWAPGS void \3\x0F\x01\xF8 X64
|
|
SYSCALL void \2\x0F\x05 P6,AMD
|
|
SYSENTER void \2\x0F\x34 P6
|
|
SYSEXIT void \2\x0F\x35 P6,PRIV
|
|
SYSRET void \2\x0F\x07 P6,PRIV,AMD
|
|
TEST mem,reg8 \1\x84\101 8086,SM
|
|
TEST reg8,reg8 \1\x84\101 8086
|
|
TEST mem,reg16 \320\1\x85\101 8086,SM
|
|
TEST reg16,reg16 \320\1\x85\101 8086
|
|
TEST mem,reg32 \321\1\x85\101 386,SM
|
|
TEST reg32,reg32 \321\1\x85\101 386
|
|
TEST mem,reg64 \324\1\x85\101 X64,SM
|
|
TEST reg64,reg64 \324\1\x85\101 X64
|
|
TEST reg8,mem \1\x84\110 8086,SM
|
|
TEST reg16,mem \320\1\x85\110 8086,SM
|
|
TEST reg32,mem \321\1\x85\110 386,SM
|
|
TEST reg64,mem \324\1\x85\110 X64,SM
|
|
TEST reg_al,imm \1\xA8\21 8086,SM
|
|
TEST reg_ax,imm \320\1\xA9\31 8086,SM
|
|
TEST reg_eax,imm \321\1\xA9\41 386,SM
|
|
TEST reg_rax,imm \324\1\xA9\41 X64,SM
|
|
TEST rm8,imm \1\xF6\200\21 8086,SM
|
|
TEST rm16,imm \320\1\xF7\200\31 8086,SM
|
|
TEST rm32,imm \321\1\xF7\200\41 386,SM
|
|
TEST rm64,imm \324\1\xF7\200\41 X64,SM
|
|
TEST mem,imm8 \1\xF6\200\21 8086,SM
|
|
TEST mem,imm16 \320\1\xF7\200\31 8086,SM
|
|
TEST mem,imm32 \321\1\xF7\200\41 386,SM
|
|
UD0 void \2\x0F\xFF 286,UNDOC
|
|
UD1 void \2\x0F\xB9 286,UNDOC
|
|
UD2 void \2\x0F\x0B 286
|
|
UMOV mem,reg8 \2\x0F\x10\101 386,UNDOC,SM,ND
|
|
UMOV reg8,reg8 \2\x0F\x10\101 386,UNDOC,ND
|
|
UMOV mem,reg16 \320\2\x0F\x11\101 386,UNDOC,SM,ND
|
|
UMOV reg16,reg16 \320\2\x0F\x11\101 386,UNDOC,ND
|
|
UMOV mem,reg32 \321\2\x0F\x11\101 386,UNDOC,SM,ND
|
|
UMOV reg32,reg32 \321\2\x0F\x11\101 386,UNDOC,ND
|
|
UMOV reg8,mem \2\x0F\x12\110 386,UNDOC,SM,ND
|
|
UMOV reg8,reg8 \2\x0F\x12\110 386,UNDOC,ND
|
|
UMOV reg16,mem \320\2\x0F\x13\110 386,UNDOC,SM,ND
|
|
UMOV reg16,reg16 \320\2\x0F\x13\110 386,UNDOC,ND
|
|
UMOV reg32,mem \321\2\x0F\x13\110 386,UNDOC,SM,ND
|
|
UMOV reg32,reg32 \321\2\x0F\x13\110 386,UNDOC,ND
|
|
VERR mem \1\x0F\170\204 286,PROT
|
|
VERR mem16 \1\x0F\170\204 286,PROT
|
|
VERR reg16 \1\x0F\170\204 286,PROT
|
|
VERW mem \1\x0F\170\205 286,PROT
|
|
VERW mem16 \1\x0F\170\205 286,PROT
|
|
VERW reg16 \1\x0F\170\205 286,PROT
|
|
WAIT void \1\x9B 8086
|
|
FWAIT void \1\x9B 8086
|
|
WBINVD void \2\x0F\x09 486,PRIV
|
|
WRSHR rm32 \321\2\x0F\x37\200 P6,CYRIX,SMM
|
|
WRMSR void \2\x0F\x30 PENT,PRIV
|
|
XADD mem,reg8 \2\x0F\xC0\101 486,SM
|
|
XADD reg8,reg8 \2\x0F\xC0\101 486
|
|
XADD mem,reg16 \320\2\x0F\xC1\101 486,SM
|
|
XADD reg16,reg16 \320\2\x0F\xC1\101 486
|
|
XADD mem,reg32 \321\2\x0F\xC1\101 486,SM
|
|
XADD reg32,reg32 \321\2\x0F\xC1\101 486
|
|
XADD mem,reg64 \324\2\x0F\xC1\101 X64,SM
|
|
XADD reg64,reg64 \324\2\x0F\xC1\101 X64
|
|
XBTS reg16,mem \320\2\x0F\xA6\110 386,SW,UNDOC,ND
|
|
XBTS reg16,reg16 \320\2\x0F\xA6\110 386,UNDOC,ND
|
|
XBTS reg32,mem \321\2\x0F\xA6\110 386,SD,UNDOC,ND
|
|
XBTS reg32,reg32 \321\2\x0F\xA6\110 386,UNDOC,ND
|
|
XCHG reg_ax,reg16 \320\11\x90 8086
|
|
XCHG reg_eax,reg32na \321\11\x90 386
|
|
XCHG reg_rax,reg64 \324\11\x90 X64
|
|
XCHG reg16,reg_ax \320\10\x90 8086
|
|
XCHG reg32na,reg_eax \321\10\x90 386
|
|
XCHG reg64,reg_rax \324\10\x90 X64
|
|
; This must be NOLONG since opcode 90 is NOP, and in 64-bit mode
|
|
; "xchg eax,eax" is *not* a NOP.
|
|
XCHG reg_eax,reg_eax \321\1\x90 386,NOLONG
|
|
XCHG reg8,mem \1\x86\110 8086,SM
|
|
XCHG reg8,reg8 \1\x86\110 8086
|
|
XCHG reg16,mem \320\1\x87\110 8086,SM
|
|
XCHG reg16,reg16 \320\1\x87\110 8086
|
|
XCHG reg32,mem \321\1\x87\110 386,SM
|
|
XCHG reg32,reg32 \321\1\x87\110 386
|
|
XCHG reg64,mem \324\1\x87\110 X64,SM
|
|
XCHG reg64,reg64 \324\1\x87\110 X64
|
|
XCHG mem,reg8 \1\x86\101 8086,SM
|
|
XCHG reg8,reg8 \1\x86\101 8086
|
|
XCHG mem,reg16 \320\1\x87\101 8086,SM
|
|
XCHG reg16,reg16 \320\1\x87\101 8086
|
|
XCHG mem,reg32 \321\1\x87\101 386,SM
|
|
XCHG reg32,reg32 \321\1\x87\101 386
|
|
XCHG mem,reg64 \324\1\x87\101 X64,SM
|
|
XCHG reg64,reg64 \324\1\x87\101 X64
|
|
XLATB void \1\xD7 8086
|
|
XLAT void \1\xD7 8086
|
|
XOR mem,reg8 \1\x30\101 8086,SM
|
|
XOR reg8,reg8 \1\x30\101 8086
|
|
XOR mem,reg16 \320\1\x31\101 8086,SM
|
|
XOR reg16,reg16 \320\1\x31\101 8086
|
|
XOR mem,reg32 \321\1\x31\101 386,SM
|
|
XOR reg32,reg32 \321\1\x31\101 386
|
|
XOR mem,reg64 \324\1\x31\101 X64,SM
|
|
XOR reg64,reg64 \324\1\x31\101 X64
|
|
XOR reg8,mem \1\x32\110 8086,SM
|
|
XOR reg8,reg8 \1\x32\110 8086
|
|
XOR reg16,mem \320\1\x33\110 8086,SM
|
|
XOR reg16,reg16 \320\1\x33\110 8086
|
|
XOR reg32,mem \321\1\x33\110 386,SM
|
|
XOR reg32,reg32 \321\1\x33\110 386
|
|
XOR reg64,mem \324\1\x33\110 X64,SM
|
|
XOR reg64,reg64 \324\1\x33\110 X64
|
|
XOR rm16,imm8 \320\1\x83\206\15 8086
|
|
XOR rm32,imm8 \321\1\x83\206\15 386
|
|
XOR rm64,imm8 \324\1\x83\206\15 X64
|
|
XOR reg_al,imm \1\x34\21 8086,SM
|
|
XOR reg_ax,sbyte \320\1\x83\206\15 8086,SM,ND
|
|
XOR reg_ax,imm \320\1\x35\31 8086,SM
|
|
XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND
|
|
XOR reg_eax,imm \321\1\x35\41 386,SM
|
|
XOR reg_rax,sbyte \324\1\x83\206\15 X64,SM,ND
|
|
XOR reg_rax,imm \324\1\x35\41 X64,SM
|
|
XOR rm8,imm \1\x80\206\21 8086,SM
|
|
XOR rm16,imm \320\145\x81\206\141 8086,SM
|
|
XOR rm32,imm \321\155\x81\206\151 386,SM
|
|
XOR rm64,imm \324\155\x81\206\151 X64,SM
|
|
XOR mem,imm8 \1\x80\206\21 8086,SM
|
|
XOR mem,imm16 \320\145\x81\206\141 8086,SM
|
|
XOR mem,imm32 \321\155\x81\206\151 386,SM
|
|
CMOVcc reg16,mem \320\1\x0F\330\x40\110 P6,SM
|
|
CMOVcc reg16,reg16 \320\1\x0F\330\x40\110 P6
|
|
CMOVcc reg32,mem \321\1\x0F\330\x40\110 P6,SM
|
|
CMOVcc reg32,reg32 \321\1\x0F\330\x40\110 P6
|
|
CMOVcc reg64,mem \324\1\x0F\330\x40\110 X64,SM
|
|
CMOVcc reg64,reg64 \324\1\x0F\330\x40\110 X64
|
|
Jcc imm|near \322\1\x0F\330\x80\64 386
|
|
Jcc imm16|near \320\1\x0F\330\x80\64 386
|
|
Jcc imm32|near \321\1\x0F\330\x80\64 386
|
|
Jcc imm|short \330\x70\50 8086,ND
|
|
Jcc imm \370\330\x70\50 8086,ND
|
|
Jcc imm \1\x0F\330\x80\64 386,ND
|
|
Jcc imm \330\x71\373\1\xE9\64 8086,ND
|
|
Jcc imm \330\x70\50 8086
|
|
SETcc mem \1\x0F\330\x90\200 386,SB
|
|
SETcc reg8 \1\x0F\330\x90\200 386
|
|
|
|
;# Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
|
|
ADDPS xmmreg,xmmrm \331\2\x0F\x58\110 KATMAI,SSE
|
|
ADDSS xmmreg,xmmrm \333\2\x0F\x58\110 KATMAI,SSE
|
|
ANDNPS xmmreg,xmmrm \2\x0F\x55\110 KATMAI,SSE
|
|
ANDPS xmmreg,xmmrm \2\x0F\x54\110 KATMAI,SSE
|
|
CMPEQPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x00 KATMAI,SSE
|
|
CMPEQSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x00 KATMAI,SSE
|
|
CMPLEPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x02 KATMAI,SSE
|
|
CMPLESS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x02 KATMAI,SSE
|
|
CMPLTPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x01 KATMAI,SSE
|
|
CMPLTSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x01 KATMAI,SSE
|
|
CMPNEQPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x04 KATMAI,SSE
|
|
CMPNEQSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x04 KATMAI,SSE
|
|
CMPNLEPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x06 KATMAI,SSE
|
|
CMPNLESS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x06 KATMAI,SSE
|
|
CMPNLTPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x05 KATMAI,SSE
|
|
CMPNLTSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x05 KATMAI,SSE
|
|
CMPORDPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x07 KATMAI,SSE
|
|
CMPORDSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x07 KATMAI,SSE
|
|
CMPUNORDPS xmmreg,xmmrm \331\2\x0F\xC2\110\1\x03 KATMAI,SSE
|
|
CMPUNORDSS xmmreg,xmmrm \333\2\x0F\xC2\110\1\x03 KATMAI,SSE
|
|
; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
|
|
; specific ops first and only disassemble illegal ones as cmpps/cmpss.
|
|
CMPPS xmmreg,mem,imm \331\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
|
|
CMPPS xmmreg,xmmreg,imm \331\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
|
|
CMPSS xmmreg,mem,imm \333\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
|
|
CMPSS xmmreg,xmmreg,imm \333\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
|
|
COMISS xmmreg,xmmrm \2\x0F\x2F\110 KATMAI,SSE
|
|
CVTPI2PS xmmreg,mmxrm \331\2\x0F\x2A\110 KATMAI,SSE,MMX
|
|
CVTPS2PI mmxreg,xmmrm \331\2\x0F\x2D\110 KATMAI,SSE,MMX
|
|
CVTSI2SS xmmreg,mem \333\2\x0F\x2A\110 KATMAI,SSE,SD,AR1
|
|
CVTSI2SS xmmreg,reg32 \333\2\x0F\x2A\110 KATMAI,SSE
|
|
CVTSS2SI reg32,xmmrm \333\2\x0F\x2D\110 KATMAI,SSE
|
|
CVTTPS2PI mmxreg,xmmrm \331\2\x0F\x2C\110 KATMAI,SSE,MMX
|
|
CVTTSS2SI reg32,xmmrm \333\2\x0F\x2C\110 KATMAI,SSE
|
|
DIVPS xmmreg,xmmrm \331\2\x0F\x5E\110 KATMAI,SSE
|
|
DIVSS xmmreg,xmmrm \333\2\x0F\x5E\110 KATMAI,SSE
|
|
LDMXCSR mem \2\x0F\xAE\202 KATMAI,SSE,SD
|
|
MAXPS xmmreg,xmmrm \331\2\x0F\x5F\110 KATMAI,SSE
|
|
MAXSS xmmreg,xmmrm \333\2\x0F\x5F\110 KATMAI,SSE
|
|
MINPS xmmreg,xmmrm \331\2\x0F\x5D\110 KATMAI,SSE
|
|
MINSS xmmreg,xmmrm \333\2\x0F\x5D\110 KATMAI,SSE
|
|
MOVAPS xmmreg,mem \2\x0F\x28\110 KATMAI,SSE
|
|
MOVAPS mem,xmmreg \2\x0F\x29\101 KATMAI,SSE
|
|
MOVAPS xmmreg,xmmreg \2\x0F\x28\110 KATMAI,SSE
|
|
MOVAPS xmmreg,xmmreg \2\x0F\x29\101 KATMAI,SSE
|
|
MOVHPS xmmreg,mem \2\x0F\x16\110 KATMAI,SSE
|
|
MOVHPS mem,xmmreg \2\x0F\x17\101 KATMAI,SSE
|
|
MOVLHPS xmmreg,xmmreg \2\x0F\x16\110 KATMAI,SSE
|
|
MOVLPS xmmreg,mem \2\x0F\x12\110 KATMAI,SSE
|
|
MOVLPS mem,xmmreg \2\x0F\x13\101 KATMAI,SSE
|
|
MOVHLPS xmmreg,xmmreg \2\x0F\x12\110 KATMAI,SSE
|
|
MOVMSKPS reg32,xmmreg \364\2\x0F\x50\110 KATMAI,SSE
|
|
MOVMSKPS reg64,xmmreg \364\324\2\x0F\x50\110 X64,SSE
|
|
MOVNTPS mem,xmmreg \2\x0F\x2B\101 KATMAI,SSE
|
|
MOVSS xmmreg,mem \333\2\x0F\x10\110 KATMAI,SSE
|
|
MOVSS mem,xmmreg \333\2\x0F\x11\101 KATMAI,SSE
|
|
MOVSS xmmreg,xmmreg \333\2\x0F\x10\110 KATMAI,SSE
|
|
MOVSS xmmreg,xmmreg \333\2\x0F\x11\101 KATMAI,SSE
|
|
MOVUPS xmmreg,mem \331\2\x0F\x10\110 KATMAI,SSE
|
|
MOVUPS mem,xmmreg \331\2\x0F\x11\101 KATMAI,SSE
|
|
MOVUPS xmmreg,xmmreg \331\2\x0F\x10\110 KATMAI,SSE
|
|
MOVUPS xmmreg,xmmreg \331\2\x0F\x11\101 KATMAI,SSE
|
|
MULPS xmmreg,xmmrm \2\x0F\x59\110 KATMAI,SSE
|
|
MULSS xmmreg,xmmrm \333\2\x0F\x59\110 KATMAI,SSE
|
|
ORPS xmmreg,xmmrm \2\x0F\x56\110 KATMAI,SSE
|
|
RCPPS xmmreg,xmmrm \331\2\x0F\x53\110 KATMAI,SSE
|
|
RCPSS xmmreg,xmmrm \333\2\x0F\x53\110 KATMAI,SSE
|
|
RSQRTPS xmmreg,xmmrm \331\2\x0F\x52\110 KATMAI,SSE
|
|
RSQRTSS xmmreg,xmmrm \333\2\x0F\x52\110 KATMAI,SSE
|
|
SHUFPS xmmreg,mem,imm \2\x0F\xC6\110\26 KATMAI,SSE,SB,AR2
|
|
SHUFPS xmmreg,xmmreg,imm \2\x0F\xC6\110\26 KATMAI,SSE,SB,AR2
|
|
SQRTPS xmmreg,xmmrm \331\2\x0F\x51\110 KATMAI,SSE
|
|
SQRTSS xmmreg,xmmrm \333\2\x0F\x51\110 KATMAI,SSE
|
|
STMXCSR mem \2\x0F\xAE\203 KATMAI,SSE,SD
|
|
SUBPS xmmreg,xmmrm \331\2\x0F\x5C\110 KATMAI,SSE
|
|
SUBSS xmmreg,xmmrm \333\2\x0F\x5C\110 KATMAI,SSE
|
|
UCOMISS xmmreg,xmmrm \2\x0F\x2E\110 KATMAI,SSE
|
|
UNPCKHPS xmmreg,xmmrm \2\x0F\x15\110 KATMAI,SSE
|
|
UNPCKLPS xmmreg,xmmrm \2\x0F\x14\110 KATMAI,SSE
|
|
XORPS xmmreg,xmmrm \2\x0F\x57\110 KATMAI,SSE
|
|
|
|
;# Introduced in Deschutes but necessary for SSE support
|
|
FXRSTOR mem \2\x0F\xAE\201 P6,SSE,FPU
|
|
FXSAVE mem \2\x0F\xAE\200 P6,SSE,FPU
|
|
|
|
; These instructions are not SSE-specific; they are
|
|
;# Generic memory operations
|
|
; and work even if CR4.OSFXFR == 0
|
|
PREFETCHNTA mem \2\x0F\x18\200 KATMAI
|
|
PREFETCHT0 mem \2\x0F\x18\201 KATMAI
|
|
PREFETCHT1 mem \2\x0F\x18\202 KATMAI
|
|
PREFETCHT2 mem \2\x0F\x18\203 KATMAI
|
|
SFENCE void \3\x0F\xAE\xF8 KATMAI
|
|
|
|
;# New MMX instructions introduced in Katmai
|
|
MASKMOVQ mmxreg,mmxreg \2\x0F\xF7\110 KATMAI,MMX
|
|
MOVNTQ mem,mmxreg \2\x0F\xE7\101 KATMAI,MMX,SM
|
|
PAVGB mmxreg,mmxrm \2\x0F\xE0\110 KATMAI,MMX,SM
|
|
PAVGW mmxreg,mmxrm \2\x0F\xE3\110 KATMAI,MMX,SM
|
|
PEXTRW reg32,mmxreg,imm \2\x0F\xC5\110\26 KATMAI,MMX,SB,AR2
|
|
; PINSRW is documented as using a reg32, but it's really using only 16 bit
|
|
; -- accept either, but be truthful in disassembly
|
|
PINSRW mmxreg,reg16,imm \2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
|
|
PINSRW mmxreg,reg32,imm \2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2,ND
|
|
PINSRW mmxreg,mem,imm \2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
|
|
PINSRW mmxreg,mem16,imm \2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2,ND
|
|
PMAXSW mmxreg,mmxrm \2\x0F\xEE\110 KATMAI,MMX,SQ
|
|
PMAXUB mmxreg,mmxrm \2\x0F\xDE\110 KATMAI,MMX,SQ
|
|
PMINSW mmxreg,mmxrm \2\x0F\xEA\110 KATMAI,MMX,SQ
|
|
PMINUB mmxreg,mmxrm \2\x0F\xDA\110 KATMAI,MMX,SQ
|
|
PMOVMSKB reg32,mmxreg \2\x0F\xD7\110 KATMAI,MMX
|
|
PMULHUW mmxreg,mmxrm \2\x0F\xE4\110 KATMAI,MMX,SQ
|
|
PSADBW mmxreg,mmxrm \2\x0F\xF6\110 KATMAI,MMX,SQ
|
|
PSHUFW mmxreg,mmxrm,imm \2\x0F\x70\110\22 KATMAI,MMX,SM2,SB,AR2
|
|
|
|
;# AMD Enhanced 3DNow! (Athlon) instructions
|
|
PF2IW mmxreg,mmxrm \2\x0F\x0F\110\01\x1C PENT,3DNOW,SQ
|
|
PFNACC mmxreg,mmxrm \2\x0F\x0F\110\01\x8A PENT,3DNOW,SQ
|
|
PFPNACC mmxreg,mmxrm \2\x0F\x0F\110\01\x8E PENT,3DNOW,SQ
|
|
PI2FW mmxreg,mmxrm \2\x0F\x0F\110\01\x0C PENT,3DNOW,SQ
|
|
PSWAPD mmxreg,mmxrm \2\x0F\x0F\110\01\xBB PENT,3DNOW,SQ
|
|
|
|
;# Willamette SSE2 Cacheability Instructions
|
|
MASKMOVDQU xmmreg,xmmreg \366\2\x0F\xF7\110 WILLAMETTE,SSE2
|
|
; CLFLUSH needs its own feature flag implemented one day
|
|
CLFLUSH mem \2\x0F\xAE\207 WILLAMETTE,SSE2
|
|
MOVNTDQ mem,xmmreg \366\2\x0F\xE7\101 WILLAMETTE,SSE2,SM
|
|
MOVNTI mem,reg32 \2\x0F\xC3\101 WILLAMETTE,SSE2,SM
|
|
MOVNTPD mem,xmmreg \366\2\x0F\x2B\101 WILLAMETTE,SSE2,SM
|
|
PAUSE void \333\1\x90 WILLAMETTE,SSE2
|
|
LFENCE void \3\x0F\xAE\xE8 WILLAMETTE,SSE2
|
|
MFENCE void \3\x0F\xAE\xF0 WILLAMETTE,SSE2
|
|
|
|
;# Willamette MMX instructions (SSE2 SIMD Integer Instructions)
|
|
MOVD xmmreg,reg32 \366\2\x0F\x6E\110 WILLAMETTE,SSE2
|
|
MOVD reg32,xmmreg \366\2\x0F\x7E\101 WILLAMETTE,SSE2
|
|
MOVD mem,xmmreg \366\2\x0F\x7E\101 WILLAMETTE,SSE2,SD
|
|
MOVD xmmreg,mem \366\2\x0F\x6E\110 WILLAMETTE,SSE2,SD
|
|
MOVDQA xmmreg,xmmreg \366\2\x0F\x6F\110 WILLAMETTE,SSE2
|
|
MOVDQA mem,xmmreg \366\2\x0F\x7F\101 WILLAMETTE,SSE2,SM
|
|
MOVDQA xmmreg,mem \366\2\x0F\x6F\110 WILLAMETTE,SSE2,SM
|
|
MOVDQA xmmreg,xmmreg \366\2\x0F\x7F\110 WILLAMETTE,SSE2
|
|
MOVDQU xmmreg,xmmreg \333\2\x0F\x6F\110 WILLAMETTE,SSE2
|
|
MOVDQU mem,xmmreg \333\2\x0F\x7F\101 WILLAMETTE,SSE2,SM
|
|
MOVDQU xmmreg,mem \333\2\x0F\x6F\110 WILLAMETTE,SSE2,SM
|
|
MOVDQU xmmreg,xmmreg \333\2\x0F\x7F\110 WILLAMETTE,SSE2
|
|
MOVDQ2Q mmxreg,xmmreg \332\2\x0F\xD6\110 WILLAMETTE,SSE2
|
|
MOVQ xmmreg,xmmreg \333\2\x0F\x7E\110 WILLAMETTE,SSE2
|
|
MOVQ xmmreg,xmmreg \366\2\x0F\xD6\110 WILLAMETTE,SSE2
|
|
MOVQ mem,xmmreg \366\2\x0F\xD6\101 WILLAMETTE,SSE2,SQ
|
|
MOVQ xmmreg,mem \333\2\x0F\x7E\110 WILLAMETTE,SSE2,SQ
|
|
MOVQ xmmreg,rm64 \366\324\2\x0F\x6E\110 X64,SSE2
|
|
MOVQ rm64,xmmreg \366\324\2\x0F\x7E\101 X64,SSE2
|
|
MOVQ2DQ xmmreg,mmxreg \333\2\x0F\xD6\110 WILLAMETTE,SSE2
|
|
PACKSSWB xmmreg,xmmrm \366\2\x0F\x63\110 WILLAMETTE,SSE2,SM
|
|
PACKSSDW xmmreg,xmmrm \366\2\x0F\x6B\110 WILLAMETTE,SSE2,SM
|
|
PACKUSWB xmmreg,xmmrm \366\2\x0F\x67\110 WILLAMETTE,SSE2,SM
|
|
PADDB xmmreg,xmmrm \366\2\x0F\xFC\110 WILLAMETTE,SSE2,SM
|
|
PADDW xmmreg,xmmrm \366\2\x0F\xFD\110 WILLAMETTE,SSE2,SM
|
|
PADDD xmmreg,xmmrm \366\2\x0F\xFE\110 WILLAMETTE,SSE2,SM
|
|
PADDQ mmxreg,mmxrm \2\x0F\xD4\110 WILLAMETTE,SSE2,SM
|
|
PADDQ xmmreg,xmmrm \366\2\x0F\xD4\110 WILLAMETTE,SSE2,SM
|
|
PADDSB xmmreg,xmmrm \366\2\x0F\xEC\110 WILLAMETTE,SSE2,SM
|
|
PADDSW xmmreg,xmmrm \366\2\x0F\xED\110 WILLAMETTE,SSE2,SM
|
|
PADDUSB xmmreg,xmmrm \366\2\x0F\xDC\110 WILLAMETTE,SSE2,SM
|
|
PADDUSW xmmreg,xmmrm \366\2\x0F\xDD\110 WILLAMETTE,SSE2,SM
|
|
PAND xmmreg,xmmrm \366\2\x0F\xDB\110 WILLAMETTE,SSE2,SM
|
|
PANDN xmmreg,xmmrm \366\2\x0F\xDF\110 WILLAMETTE,SSE2,SM
|
|
PAVGB xmmreg,xmmrm \366\2\x0F\xE0\110 WILLAMETTE,SSE2,SM
|
|
PAVGW xmmreg,xmmrm \366\2\x0F\xE3\110 WILLAMETTE,SSE2,SM
|
|
PCMPEQB xmmreg,xmmrm \366\2\x0F\x74\110 WILLAMETTE,SSE2,SM
|
|
PCMPEQW xmmreg,xmmrm \366\2\x0F\x75\110 WILLAMETTE,SSE2,SM
|
|
PCMPEQD xmmreg,xmmrm \366\2\x0F\x76\110 WILLAMETTE,SSE2,SM
|
|
PCMPGTB xmmreg,xmmrm \366\2\x0F\x64\110 WILLAMETTE,SSE2,SM
|
|
PCMPGTW xmmreg,xmmrm \366\2\x0F\x65\110 WILLAMETTE,SSE2,SM
|
|
PCMPGTD xmmreg,xmmrm \366\2\x0F\x66\110 WILLAMETTE,SSE2,SM
|
|
PEXTRW reg32,xmmreg,imm \366\2\x0F\xC5\110\26 WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,reg16,imm \366\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,reg32,imm \366\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2,ND
|
|
PINSRW xmmreg,mem,imm \366\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,mem16,imm \366\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2,ND
|
|
PMADDWD xmmreg,xmmrm \366\2\x0F\xF5\110 WILLAMETTE,SSE2,SM
|
|
PMAXSW xmmreg,xmmrm \366\2\x0F\xEE\110 WILLAMETTE,SSE2,SM
|
|
PMAXUB xmmreg,xmmrm \366\2\x0F\xDE\110 WILLAMETTE,SSE2,SM
|
|
PMINSW xmmreg,xmmrm \366\2\x0F\xEA\110 WILLAMETTE,SSE2,SM
|
|
PMINUB xmmreg,xmmrm \366\2\x0F\xDA\110 WILLAMETTE,SSE2,SM
|
|
PMOVMSKB reg32,xmmreg \366\2\x0F\xD7\110 WILLAMETTE,SSE2
|
|
PMULHUW xmmreg,xmmrm \366\2\x0F\xE4\110 WILLAMETTE,SSE2,SM
|
|
PMULHW xmmreg,xmmrm \366\2\x0F\xE5\110 WILLAMETTE,SSE2,SM
|
|
PMULLW xmmreg,xmmrm \366\2\x0F\xD5\110 WILLAMETTE,SSE2,SM
|
|
PMULUDQ mmxreg,mmxrm \2\x0F\xF4\110 WILLAMETTE,SSE2,SM
|
|
PMULUDQ xmmreg,xmmrm \366\2\x0F\xF4\110 WILLAMETTE,SSE2,SM
|
|
POR xmmreg,xmmrm \366\2\x0F\xEB\110 WILLAMETTE,SSE2,SM
|
|
PSADBW xmmreg,xmmrm \366\2\x0F\xF6\110 WILLAMETTE,SSE2,SM
|
|
PSHUFD xmmreg,xmmreg,imm \366\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFD xmmreg,mem,imm \366\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSHUFHW xmmreg,xmmreg,imm \333\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFHW xmmreg,mem,imm \333\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSHUFLW xmmreg,xmmreg,imm \332\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFLW xmmreg,mem,imm \332\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSLLDQ xmmreg,imm \366\2\x0F\x73\207\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSLLW xmmreg,xmmrm \366\2\x0F\xF1\110 WILLAMETTE,SSE2,SM
|
|
PSLLW xmmreg,imm \366\2\x0F\x71\206\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSLLD xmmreg,xmmrm \366\2\x0F\xF2\110 WILLAMETTE,SSE2,SM
|
|
PSLLD xmmreg,imm \366\2\x0F\x72\206\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSLLQ xmmreg,xmmrm \366\2\x0F\xF3\110 WILLAMETTE,SSE2,SM
|
|
PSLLQ xmmreg,imm \366\2\x0F\x73\206\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRAW xmmreg,xmmrm \366\2\x0F\xE1\110 WILLAMETTE,SSE2,SM
|
|
PSRAW xmmreg,imm \366\2\x0F\x71\204\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRAD xmmreg,xmmrm \366\2\x0F\xE2\110 WILLAMETTE,SSE2,SM
|
|
PSRAD xmmreg,imm \366\2\x0F\x72\204\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRLDQ xmmreg,imm \366\2\x0F\x73\203\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRLW xmmreg,xmmrm \366\2\x0F\xD1\110 WILLAMETTE,SSE2,SM
|
|
PSRLW xmmreg,imm \366\2\x0F\x71\202\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRLD xmmreg,xmmrm \366\2\x0F\xD2\110 WILLAMETTE,SSE2,SM
|
|
PSRLD xmmreg,imm \366\2\x0F\x72\202\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSRLQ xmmreg,xmmrm \366\2\x0F\xD3\110 WILLAMETTE,SSE2,SM
|
|
PSRLQ xmmreg,imm \366\2\x0F\x73\202\25 WILLAMETTE,SSE2,SB,AR1
|
|
PSUBB xmmreg,xmmrm \366\2\x0F\xF8\110 WILLAMETTE,SSE2,SM
|
|
PSUBW xmmreg,xmmrm \366\2\x0F\xF9\110 WILLAMETTE,SSE2,SM
|
|
PSUBD xmmreg,xmmrm \366\2\x0F\xFA\110 WILLAMETTE,SSE2,SM
|
|
PSUBQ mmxreg,mmxrm \2\x0F\xFB\110 WILLAMETTE,SSE2,SM
|
|
PSUBQ xmmreg,xmmrm \366\2\x0F\xFB\110 WILLAMETTE,SSE2,SM
|
|
PSUBSB xmmreg,xmmrm \366\2\x0F\xE8\110 WILLAMETTE,SSE2,SM
|
|
PSUBSW xmmreg,xmmrm \366\2\x0F\xE9\110 WILLAMETTE,SSE2,SM
|
|
PSUBUSB xmmreg,xmmrm \366\2\x0F\xD8\110 WILLAMETTE,SSE2,SM
|
|
PSUBUSW xmmreg,xmmrm \366\2\x0F\xD9\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKHBW xmmreg,xmmrm \366\2\x0F\x68\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKHWD xmmreg,xmmrm \366\2\x0F\x69\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKHDQ xmmreg,xmmrm \366\2\x0F\x6A\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKHQDQ xmmreg,xmmrm \366\2\x0F\x6D\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKLBW xmmreg,xmmrm \366\2\x0F\x60\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKLWD xmmreg,xmmrm \366\2\x0F\x61\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKLDQ xmmreg,xmmrm \366\2\x0F\x62\110 WILLAMETTE,SSE2,SM
|
|
PUNPCKLQDQ xmmreg,xmmrm \366\2\x0F\x6C\110 WILLAMETTE,SSE2,SM
|
|
PXOR xmmreg,xmmrm \366\2\x0F\xEF\110 WILLAMETTE,SSE2,SM
|
|
|
|
;# Willamette Streaming SIMD instructions (SSE2)
|
|
ADDPD xmmreg,xmmrm \331\366\2\x0F\x58\110 WILLAMETTE,SSE2,SM
|
|
ADDSD xmmreg,xmmrm \331\332\2\x0F\x58\110 WILLAMETTE,SSE2
|
|
ANDNPD xmmreg,xmmrm \331\366\2\x0F\x55\110 WILLAMETTE,SSE2,SM
|
|
ANDPD xmmreg,xmmrm \331\366\2\x0F\x54\110 WILLAMETTE,SSE2,SM
|
|
CMPEQPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x00 WILLAMETTE,SSE2,SM
|
|
CMPEQSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x00 WILLAMETTE,SSE2
|
|
CMPLEPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x02 WILLAMETTE,SSE2,SM
|
|
CMPLESD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x02 WILLAMETTE,SSE2
|
|
CMPLTPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x01 WILLAMETTE,SSE2,SM
|
|
CMPLTSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x01 WILLAMETTE,SSE2
|
|
CMPNEQPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x04 WILLAMETTE,SSE2,SM
|
|
CMPNEQSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x04 WILLAMETTE,SSE2
|
|
CMPNLEPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x06 WILLAMETTE,SSE2,SM
|
|
CMPNLESD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x06 WILLAMETTE,SSE2
|
|
CMPNLTPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x05 WILLAMETTE,SSE2,SM
|
|
CMPNLTSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x05 WILLAMETTE,SSE2
|
|
CMPORDPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x07 WILLAMETTE,SSE2,SM
|
|
CMPORDSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x07 WILLAMETTE,SSE2
|
|
CMPUNORDPD xmmreg,xmmrm \331\366\2\x0F\xC2\110\1\x03 WILLAMETTE,SSE2,SM
|
|
CMPUNORDSD xmmreg,xmmrm \331\332\2\x0F\xC2\110\1\x03 WILLAMETTE,SSE2
|
|
; CMPPD/CMPSD must come after the specific ops; that way the disassembler will find the
|
|
; specific ops first and only disassemble illegal ones as cmppd/cmpsd.
|
|
CMPPD xmmreg,xmmrm,imm \331\366\2\x0F\xC2\110\26 WILLAMETTE,SSE2,SM2,SB,AR2
|
|
CMPSD xmmreg,xmmrm,imm \331\332\2\x0F\xC2\110\26 WILLAMETTE,SSE2,SB,AR2
|
|
COMISD xmmreg,xmmrm \331\366\2\x0F\x2F\110 WILLAMETTE,SSE2
|
|
CVTDQ2PD xmmreg,xmmrm \333\2\x0F\xE6\110 WILLAMETTE,SSE2
|
|
CVTDQ2PS xmmreg,xmmrm \2\x0F\x5B\110 WILLAMETTE,SSE2,SM
|
|
CVTPD2DQ xmmreg,xmmrm \332\2\x0F\xE6\110 WILLAMETTE,SSE2,SM
|
|
CVTPD2PI mmxreg,xmmrm \366\2\x0F\x2D\110 WILLAMETTE,SSE2
|
|
CVTPD2PS xmmreg,xmmrm \366\2\x0F\x5A\110 WILLAMETTE,SSE2,SM
|
|
CVTPI2PD xmmreg,mmxrm \366\2\x0F\x2A\110 WILLAMETTE,SSE2
|
|
CVTPS2DQ xmmreg,xmmrm \366\2\x0F\x5B\110 WILLAMETTE,SSE2,SM
|
|
CVTPS2PD xmmreg,xmmrm \2\x0F\x5A\110 WILLAMETTE,SSE2
|
|
CVTSD2SI reg32,xmmrm \332\2\x0F\x2D\110 WILLAMETTE,SSE2
|
|
CVTSD2SS xmmreg,xmmrm \332\2\x0F\x5A\110 WILLAMETTE,SSE2
|
|
CVTSI2SD xmmreg,reg32 \332\2\x0F\x2A\110 WILLAMETTE,SSE2
|
|
CVTSI2SD xmmreg,mem \332\2\x0F\x2A\110 WILLAMETTE,SSE2
|
|
CVTSS2SD xmmreg,xmmrm \333\2\x0F\x5A\110 WILLAMETTE,SSE2
|
|
CVTTPD2PI mmxreg,xmmrm \366\2\x0F\x2C\110 WILLAMETTE,SSE2
|
|
CVTTPD2DQ xmmreg,xmmrm \366\2\x0F\xE6\110 WILLAMETTE,SSE2,SM
|
|
CVTTPS2DQ xmmreg,xmmrm \333\2\x0F\x5B\110 WILLAMETTE,SSE2,SM
|
|
CVTTSD2SI reg32,xmmrm \332\2\x0F\x2C\110 WILLAMETTE,SSE2
|
|
DIVPD xmmreg,xmmrm \366\2\x0F\x5E\110 WILLAMETTE,SSE2,SM
|
|
DIVSD xmmreg,xmmrm \332\2\x0F\x5E\110 WILLAMETTE,SSE2
|
|
MAXPD xmmreg,xmmrm \366\2\x0F\x5F\110 WILLAMETTE,SSE2,SM
|
|
MAXSD xmmreg,xmmrm \332\2\x0F\x5F\110 WILLAMETTE,SSE2
|
|
MINPD xmmreg,xmmrm \366\2\x0F\x5D\110 WILLAMETTE,SSE2,SM
|
|
MINSD xmmreg,xmmrm \332\2\x0F\x5D\110 WILLAMETTE,SSE2
|
|
MOVAPD xmmreg,xmmreg \366\2\x0F\x28\110 WILLAMETTE,SSE2
|
|
MOVAPD xmmreg,xmmreg \366\2\x0F\x29\110 WILLAMETTE,SSE2
|
|
MOVAPD mem,xmmreg \366\2\x0F\x29\101 WILLAMETTE,SSE2,SM
|
|
MOVAPD xmmreg,mem \366\2\x0F\x28\110 WILLAMETTE,SSE2,SM
|
|
MOVHPD mem,xmmreg \366\2\x0F\x17\101 WILLAMETTE,SSE2
|
|
MOVHPD xmmreg,mem \366\2\x0F\x16\110 WILLAMETTE,SSE2
|
|
MOVLPD mem,xmmreg \366\2\x0F\x13\101 WILLAMETTE,SSE2
|
|
MOVLPD xmmreg,mem \366\2\x0F\x12\110 WILLAMETTE,SSE2
|
|
MOVMSKPD reg32,xmmreg \366\2\x0F\x50\110 WILLAMETTE,SSE2
|
|
MOVMSKPD reg64,xmmreg \366\324\2\x0F\x50\110 X64,SSE2
|
|
MOVSD xmmreg,xmmreg \332\2\x0F\x10\110 WILLAMETTE,SSE2
|
|
MOVSD xmmreg,xmmreg \332\2\x0F\x11\110 WILLAMETTE,SSE2
|
|
MOVSD mem,xmmreg \332\2\x0F\x11\101 WILLAMETTE,SSE2
|
|
MOVSD xmmreg,mem \332\2\x0F\x10\110 WILLAMETTE,SSE2
|
|
MOVUPD xmmreg,xmmreg \366\2\x0F\x10\110 WILLAMETTE,SSE2
|
|
MOVUPD xmmreg,xmmreg \366\2\x0F\x11\110 WILLAMETTE,SSE2
|
|
MOVUPD mem,xmmreg \366\2\x0F\x11\101 WILLAMETTE,SSE2,SM
|
|
MOVUPD xmmreg,mem \366\2\x0F\x10\110 WILLAMETTE,SSE2,SM
|
|
MULPD xmmreg,xmmrm \366\2\x0F\x59\110 WILLAMETTE,SSE2,SM
|
|
MULSD xmmreg,xmmrm \332\2\x0F\x59\110 WILLAMETTE,SSE2
|
|
ORPD xmmreg,xmmrm \366\2\x0F\x56\110 WILLAMETTE,SSE2,SM
|
|
SHUFPD xmmreg,xmmreg,imm \366\2\x0F\xC6\110\26 WILLAMETTE,SSE2,SB,AR2
|
|
SHUFPD xmmreg,mem,imm \366\2\x0F\xC6\110\26 WILLAMETTE,SSE2,SM,SB,AR2
|
|
SQRTPD xmmreg,xmmrm \366\2\x0F\x51\110 WILLAMETTE,SSE2,SM
|
|
SQRTSD xmmreg,xmmrm \332\2\x0F\x51\110 WILLAMETTE,SSE2
|
|
SUBPD xmmreg,xmmrm \366\2\x0F\x5C\110 WILLAMETTE,SSE2,SM
|
|
SUBSD xmmreg,xmmrm \332\2\x0F\x5C\110 WILLAMETTE,SSE2
|
|
UCOMISD xmmreg,xmmrm \366\2\x0F\x2E\110 WILLAMETTE,SSE2
|
|
UNPCKHPD xmmreg,xmmrm \366\2\x0F\x15\110 WILLAMETTE,SSE2,SM
|
|
UNPCKLPD xmmreg,xmmrm \366\2\x0F\x14\110 WILLAMETTE,SSE2,SM
|
|
XORPD xmmreg,xmmrm \366\2\x0F\x57\110 WILLAMETTE,SSE2,SM
|
|
|
|
;# Prescott New Instructions (SSE3)
|
|
ADDSUBPD xmmreg,xmmrm \366\2\x0F\xD0\110 PRESCOTT,SSE3,SM
|
|
ADDSUBPS xmmreg,xmmrm \332\2\x0F\xD0\110 PRESCOTT,SSE3,SM
|
|
HADDPD xmmreg,xmmrm \366\2\x0F\x7C\110 PRESCOTT,SSE3,SM
|
|
HADDPS xmmreg,xmmrm \332\2\x0F\x7C\110 PRESCOTT,SSE3,SM
|
|
HSUBPD xmmreg,xmmrm \366\2\x0F\x7D\110 PRESCOTT,SSE3,SM
|
|
HSUBPS xmmreg,xmmrm \332\2\x0F\x7D\110 PRESCOTT,SSE3,SM
|
|
LDDQU xmmreg,mem \332\2\x0F\xF0\110 PRESCOTT,SSE3,SM
|
|
MOVDDUP xmmreg,xmmrm \332\2\x0F\x12\110 PRESCOTT,SSE3
|
|
MOVSHDUP xmmreg,xmmrm \333\2\x0F\x16\110 PRESCOTT,SSE3
|
|
MOVSLDUP xmmreg,xmmrm \333\2\x0F\x12\110 PRESCOTT,SSE3
|
|
|
|
;# VMX Instructions
|
|
VMCALL void \3\x0F\x01\xC1 VMX
|
|
VMCLEAR mem \366\2\x0F\xC7\206 VMX
|
|
VMLAUNCH void \3\x0F\x01\xC2 VMX
|
|
VMLOAD void \3\x0F\x01\xDA X64,VMX
|
|
VMMCALL void \3\x0F\x01\xD9 X64,VMX
|
|
VMPTRLD mem \2\x0F\xC7\206 VMX
|
|
VMPTRST mem \2\x0F\xC7\207 VMX
|
|
VMREAD rm32,reg32 \2\x0F\x78\101 VMX
|
|
VMRESUME void \3\x0F\x01\xC3 VMX
|
|
VMRUN void \3\x0F\x01\xD8 X64,VMX
|
|
VMSAVE void \3\x0F\x01\xDB X64,VMX
|
|
VMWRITE reg32,rm32 \2\x0F\x79\110 VMX
|
|
VMXOFF void \3\x0F\x01\xC4 VMX
|
|
VMXON mem \333\2\x0F\xC7\206 VMX
|
|
|
|
;# Tejas New Instructions (SSSE3)
|
|
PABSB mmxreg,mmxrm \364\3\x0F\x38\x1C\110 SSSE3,MMX,SQ
|
|
PABSB xmmreg,xmmrm \366\3\x0F\x38\x1C\110 SSSE3
|
|
PABSW mmxreg,mmxrm \364\3\x0F\x38\x1D\110 SSSE3,MMX,SQ
|
|
PABSW xmmreg,xmmrm \366\3\x0F\x38\x1D\110 SSSE3
|
|
PABSD mmxreg,mmxrm \364\3\x0F\x38\x1E\110 SSSE3,MMX,SQ
|
|
PABSD xmmreg,xmmrm \366\3\x0F\x38\x1E\110 SSSE3
|
|
PALIGNR mmxreg,mmxrm,imm \364\3\x0F\x3A\x0F\110\26 SSSE3,MMX,SQ
|
|
PALIGNR xmmreg,xmmrm,imm \366\3\x0F\x3A\x0F\110\26 SSSE3
|
|
PHADDW mmxreg,mmxrm \364\3\x0F\x38\x01\110 SSSE3,MMX,SQ
|
|
PHADDW xmmreg,xmmrm \366\3\x0F\x38\x01\110 SSSE3
|
|
PHADDD mmxreg,mmxrm \364\3\x0F\x38\x02\110 SSSE3,MMX,SQ
|
|
PHADDD xmmreg,xmmrm \366\3\x0F\x38\x02\110 SSSE3
|
|
PHADDSW mmxreg,mmxrm \364\3\x0F\x38\x03\110 SSSE3,MMX,SQ
|
|
PHADDSW xmmreg,xmmrm \366\3\x0F\x38\x03\110 SSSE3
|
|
PHSUBW mmxreg,mmxrm \364\3\x0F\x38\x05\110 SSSE3,MMX,SQ
|
|
PHSUBW xmmreg,xmmrm \366\3\x0F\x38\x05\110 SSSE3
|
|
PHSUBD mmxreg,mmxrm \364\3\x0F\x38\x06\110 SSSE3,MMX,SQ
|
|
PHSUBD xmmreg,xmmrm \366\3\x0F\x38\x06\110 SSSE3
|
|
PHSUBSW mmxreg,mmxrm \364\3\x0F\x38\x07\110 SSSE3,MMX,SQ
|
|
PHSUBSW xmmreg,xmmrm \366\3\x0F\x38\x07\110 SSSE3
|
|
PMADDUBSW mmxreg,mmxrm \364\3\x0F\x38\x04\110 SSSE3,MMX,SQ
|
|
PMADDUBSW xmmreg,xmmrm \366\3\x0F\x38\x04\110 SSSE3
|
|
PMULHRSW mmxreg,mmxrm \364\3\x0F\x38\x0B\110 SSSE3,MMX,SQ
|
|
PMULHRSW xmmreg,xmmrm \366\3\x0F\x38\x0B\110 SSSE3
|
|
PSHUFB mmxreg,mmxrm \364\3\x0F\x38\x00\110 SSSE3,MMX,SQ
|
|
PSHUFB xmmreg,xmmrm \366\3\x0F\x38\x00\110 SSSE3
|
|
PSIGNB mmxreg,mmxrm \364\3\x0F\x38\x08\110 SSSE3,MMX,SQ
|
|
PSIGNB xmmreg,xmmrm \366\3\x0F\x38\x08\110 SSSE3
|
|
PSIGNW mmxreg,mmxrm \364\3\x0F\x38\x09\110 SSSE3,MMX,SQ
|
|
PSIGNW xmmreg,xmmrm \366\3\x0F\x38\x09\110 SSSE3
|
|
PSIGND mmxreg,mmxrm \364\3\x0F\x38\x0A\110 SSSE3,MMX,SQ
|
|
PSIGND xmmreg,xmmrm \366\3\x0F\x38\x0A\110 SSSE3
|
|
|
|
;# AMD SSE4A
|
|
EXTRQ xmmreg,imm,imm \366\2\x0F\x78\200\25\26 SSE4A,AMD
|
|
EXTRQ xmmreg,xmmreg \366\2\x0F\x79\110 SSE4A,AMD
|
|
INSERTQ xmmreg,xmmreg,imm,imm \332\2\x0F\x78\110\26\27 SSE4A,AMD
|
|
INSERTQ xmmreg,xmmreg \332\2\x0F\x79\110 SSE4A,AMD
|
|
MOVNTSD mem,xmmreg \332\2\x0F\x2B\101 SSE4A,AMD,SQ
|
|
MOVNTSS mem,xmmreg \333\2\x0F\x2B\101 SSE4A,AMD,SD
|
|
|
|
;# New instructions in Barcelona
|
|
LZCNT reg16,rm16 \320\333\2\x0F\xBD\110 P6,AMD
|
|
LZCNT reg32,rm32 \321\333\2\x0F\xBD\110 P6,AMD
|
|
LZCNT reg64,rm64 \324\333\2\x0F\xBD\110 P6,AMD
|
|
|
|
;# Penryn New Instructions (SSE4.1)
|
|
BLENDPD xmmreg,xmmrm,imm \366\3\x0F\x3A\x0D\110\26 SSE41
|
|
BLENDPS xmmreg,xmmrm,imm \366\3\x0F\x3A\x0C\110\26 SSE41
|
|
BLENDVPD xmmreg,xmmrm,xmm0 \366\3\x0F\x38\x15\110 SSE41
|
|
BLENDVPS xmmreg,xmmrm,xmm0 \366\3\x0F\x38\x14\110 SSE41
|
|
DPPD xmmreg,xmmrm,imm \366\3\x0F\x3A\x41\110\26 SSE41
|
|
DPPS xmmreg,xmmrm,imm \366\3\x0F\x3A\x40\110\26 SSE41
|
|
EXTRACTPS rm32,xmmreg,imm \366\3\x0F\x3A\x17\101\26 SSE41
|
|
EXTRACTPS reg64,xmmreg,imm \324\366\3\x0F\x3A\x17\101\26 SSE41,X64
|
|
INSERTPS xmmreg,xmmrm,imm \366\3\x0F\x3A\x21\110\26 SSE41,SD
|
|
MOVNTDQA xmmreg,mem \366\3\x0F\x38\x2A\110 SSE41
|
|
MPSADBW xmmreg,xmmrm,imm \366\3\x0F\x3A\x42\110\26 SSE41
|
|
PACKUSDW xmmreg,xmmrm \366\3\x0F\x38\x2B\110 SSE41
|
|
PBLENDVB xmmreg,xmmrm,xmm0 \366\3\x0F\x38\x10\110 SSE41
|
|
PBLENDW xmmreg,xmmrm,imm \366\3\x0F\x3A\x0E\110\26 SSE41
|
|
PCMPEQQ xmmreg,xmmrm \366\3\x0F\x38\x29\110 SSE41
|
|
PEXTRB reg32,xmmreg,imm \366\3\x0F\x3A\x14\101\26 SSE41
|
|
PEXTRB mem8,xmmreg,imm \366\3\x0F\x3A\x14\101\26 SSE41
|
|
PEXTRB reg64,xmmreg,imm \324\366\3\x0F\x3A\x14\101\26 SSE41,X64
|
|
PEXTRD rm32,xmmreg,imm \366\3\x0F\x3A\x16\101\26 SSE41
|
|
PEXTRQ rm64,xmmreg,imm \366\3\x0F\x3A\x16\101\26 SSE41,X64
|
|
PEXTRW reg32,xmmreg,imm \366\3\x0F\x3A\x15\101\26 SSE41
|
|
PEXTRW mem16,xmmreg,imm \366\3\x0F\x3A\x15\101\26 SSE41
|
|
PEXTRW reg64,xmmreg,imm \324\366\3\x0F\x3A\x15\101\26 SSE41,X64
|
|
PHMINPOSUW xmmreg,xmmrm \366\3\x0F\x38\x41\110 SSE41
|
|
PINSRB xmmreg,reg32,imm \366\3\x0F\x3A\x20\110\26 SSE41
|
|
PINSRB xmmreg,mem8,imm \366\3\x0F\x3A\x20\110\26 SSE41
|
|
PINSRD xmmreg,rm32,imm \366\3\x0F\x3A\x22\110\26 SSE41
|
|
PINSRQ xmmreg,rm64,imm \324\366\3\x0F\x3A\x22\110\26 SSE41,X64
|
|
PMAXSB xmmreg,xmmrm \366\3\x0F\x38\x3C\110 SSE41
|
|
PMAXSD xmmreg,xmmrm \366\3\x0F\x38\x3D\110 SSE41
|
|
PMAXUD xmmreg,xmmrm \366\3\x0F\x38\x3F\110 SSE41
|
|
PMAXUW xmmreg,xmmrm \366\3\x0F\x38\x3E\110 SSE41
|
|
PMINSB xmmreg,xmmrm \366\3\x0F\x38\x38\110 SSE41
|
|
PMINSD xmmreg,xmmrm \366\3\x0F\x38\x39\110 SSE41
|
|
PMINUD xmmreg,xmmrm \366\3\x0F\x38\x3B\110 SSE41
|
|
PMINUW xmmreg,xmmrm \366\3\x0F\x38\x3A\110 SSE41
|
|
PMOVSXBW xmmreg,xmmrm \366\3\x0F\x38\x20\110 SSE41,SQ
|
|
PMOVSXBD xmmreg,xmmrm \366\3\x0F\x38\x21\110 SSE41,SD
|
|
PMOVSXBQ xmmreg,xmmrm \366\3\x0F\x38\x22\110 SSE41,SW
|
|
PMOVSXWD xmmreg,xmmrm \366\3\x0F\x38\x23\110 SSE41,SQ
|
|
PMOVSXWQ xmmreg,xmmrm \366\3\x0F\x38\x24\110 SSE41,SD
|
|
PMOVSXDQ xmmreg,xmmrm \366\3\x0F\x38\x25\110 SSE41,SQ
|
|
PMOVZXBW xmmreg,xmmrm \366\3\x0F\x38\x30\110 SSE41,SQ
|
|
PMOVZXBD xmmreg,xmmrm \366\3\x0F\x38\x31\110 SSE41,SD
|
|
PMOVZXBQ xmmreg,xmmrm \366\3\x0F\x38\x32\110 SSE41,SW
|
|
PMOVZXWD xmmreg,xmmrm \366\3\x0F\x38\x33\110 SSE41,SQ
|
|
PMOVZXWQ xmmreg,xmmrm \366\3\x0F\x38\x34\110 SSE41,SD
|
|
PMOVZXDQ xmmreg,xmmrm \366\3\x0F\x38\x35\110 SSE41,SQ
|
|
PMULDQ xmmreg,xmmrm \366\3\x0F\x38\x28\110 SSE41
|
|
PMULLD xmmreg,xmmrm \366\3\x0F\x38\x40\110 SSE41
|
|
PTEST xmmreg,xmmrm \366\3\x0F\x38\x17\110 SSE41
|
|
ROUNDPD xmmreg,xmmrm,imm \366\3\x0F\x3A\x09\110\26 SSE41
|
|
ROUNDPS xmmreg,xmmrm,imm \366\3\x0F\x3A\x08\110\26 SSE41
|
|
ROUNDSD xmmreg,xmmrm,imm \366\3\x0F\x3A\x0B\110\26 SSE41
|
|
ROUNDSS xmmreg,xmmrm,imm \366\3\x0F\x3A\x0A\110\26 SSE41
|
|
|
|
;# Nehalem New Instructions (SSE4.2)
|
|
CRC32 reg32,rm8 \332\3\x0F\x38\1\xF0\110 SSE42
|
|
CRC32 reg32,rm16 \332\3\x0F\x38\1\xF1\110 SSE42
|
|
CRC32 reg32,rm32 \332\3\x0F\x38\1\xF1\110 SSE42
|
|
CRC32 reg64,rm8 \324\332\3\x0F\x38\1\xF0\110 SSE42,X64
|
|
CRC32 reg64,rm64 \324\332\3\x0F\x38\1\xF1\110 SSE42,X64
|
|
PCMPESTRI xmmreg,xmmrm,imm \366\3\x0F\x3A\x61\110\26 SSE42
|
|
PCMPESTRM xmmreg,xmmrm,imm \366\3\x0F\x3A\x60\110\26 SSE42
|
|
PCMPISTRI xmmreg,xmmrm,imm \366\3\x0F\x3A\x63\110\26 SSE42
|
|
PCMPISTRM xmmreg,xmmrm,imm \366\3\x0F\x3A\x62\110\26 SSE42
|
|
PCMPGTQ xmmreg,xmmrm \366\3\x0F\x38\x37\110 SSE42
|
|
POPCNT reg16,rm16 \320\333\2\x0F\xB8\110 NEHALEM
|
|
POPCNT reg32,rm32 \321\333\2\x0F\xB8\110 NEHALEM
|
|
POPCNT reg64,rm32 \324\333\2\x0F\xB8\110 NEHALEM,X64
|
|
|
|
;# AMD SSE5 instructions
|
|
|
|
; Four operands with DREX
|
|
FMADDPS xmmreg,=0,xmmreg,xmmrm \160\2\x0F\x24\170\132 SSE5,AMD
|
|
FMADDPS xmmreg,=0,xmmrm,xmmreg \164\2\x0F\x24\170\123 SSE5,AMD
|
|
FMADDPS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x04\121 SSE5,AMD
|
|
FMADDPS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x04\112 SSE5,AMD
|
|
FMADDPD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x01\132 SSE5,AMD
|
|
FMADDPD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x01\123 SSE5,AMD
|
|
FMADDPD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x05\121 SSE5,AMD
|
|
FMADDPD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x05\112 SSE5,AMD
|
|
FMADDSS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x02\132 SSE5,AMD
|
|
FMADDSS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x02\123 SSE5,AMD
|
|
FMADDSS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x06\121 SSE5,AMD
|
|
FMADDSS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x06\112 SSE5,AMD
|
|
FMADDSD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x03\132 SSE5,AMD
|
|
FMADDSD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x03\123 SSE5,AMD
|
|
FMADDSD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x07\121 SSE5,AMD
|
|
FMADDSD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x07\112 SSE5,AMD
|
|
FMSUBPS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x08\132 SSE5,AMD
|
|
FMSUBPS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x08\123 SSE5,AMD
|
|
FMSUBPS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x0C\121 SSE5,AMD
|
|
FMSUBPS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x0C\112 SSE5,AMD
|
|
FMSUBPD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x09\132 SSE5,AMD
|
|
FMSUBPD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x09\123 SSE5,AMD
|
|
FMSUBPD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x0D\121 SSE5,AMD
|
|
FMSUBPD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x0D\112 SSE5,AMD
|
|
FMSUBSS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x0A\132 SSE5,AMD
|
|
FMSUBSS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x0A\123 SSE5,AMD
|
|
FMSUBSS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x0E\121 SSE5,AMD
|
|
FMSUBSS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x0E\112 SSE5,AMD
|
|
FMSUBSD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x0B\132 SSE5,AMD
|
|
FMSUBSD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x0B\123 SSE5,AMD
|
|
FMSUBSD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x0F\121 SSE5,AMD
|
|
FMSUBSD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x0F\112 SSE5,AMD
|
|
FMNADDPS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x10\132 SSE5,AMD
|
|
FMNADDPS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x10\123 SSE5,AMD
|
|
FMNADDPS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x14\121 SSE5,AMD
|
|
FMNADDPS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x14\112 SSE5,AMD
|
|
FMNADDPD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x11\132 SSE5,AMD
|
|
FMNADDPD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x11\123 SSE5,AMD
|
|
FMNADDPD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x15\121 SSE5,AMD
|
|
FMNADDPD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x15\112 SSE5,AMD
|
|
FMNADDSS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x12\132 SSE5,AMD
|
|
FMNADDSS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x12\123 SSE5,AMD
|
|
FMNADDSS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x16\121 SSE5,AMD
|
|
FMNADDSS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x16\112 SSE5,AMD
|
|
FMNADDSD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x13\132 SSE5,AMD
|
|
FMNADDSD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x13\123 SSE5,AMD
|
|
FMNADDSD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x17\121 SSE5,AMD
|
|
FMNADDSD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x17\112 SSE5,AMD
|
|
FMNSUBPS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x18\132 SSE5,AMD
|
|
FMNSUBPS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x18\123 SSE5,AMD
|
|
FMNSUBPS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x1C\121 SSE5,AMD
|
|
FMNSUBPS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x1C\112 SSE5,AMD
|
|
FMNSUBPD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x19\132 SSE5,AMD
|
|
FMNSUBPD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x19\123 SSE5,AMD
|
|
FMNSUBPD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x1D\121 SSE5,AMD
|
|
FMNSUBPD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x1D\112 SSE5,AMD
|
|
FMNSUBSS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x1A\132 SSE5,AMD
|
|
FMNSUBSS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x1A\123 SSE5,AMD
|
|
FMNSUBSS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x1E\121 SSE5,AMD
|
|
FMNSUBSS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x1E\112 SSE5,AMD
|
|
FMNSUBSD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x1B\132 SSE5,AMD
|
|
FMNSUBSD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x1B\123 SSE5,AMD
|
|
FMNSUBSD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x1F\121 SSE5,AMD
|
|
FMNSUBSD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x1F\112 SSE5,AMD
|
|
COMPS xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x2C\121\27 SSE5,AMD
|
|
COMPD xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x2D\121\27 SSE5,AMD
|
|
COMSS xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x2E\121\27 SSE5,AMD
|
|
COMSD xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x2F\121\27 SSE5,AMD
|
|
PCOMB xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x4C\121\27 SSE5,AMD
|
|
PCOMW xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x4D\121\27 SSE5,AMD
|
|
PCOMD xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x4E\121\27 SSE5,AMD
|
|
PCOMQ xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x4F\121\27 SSE5,AMD
|
|
PCOMUB xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x6C\121\27 SSE5,AMD
|
|
PCOMUW xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x6D\121\27 SSE5,AMD
|
|
PCOMUD xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x6E\121\27 SSE5,AMD
|
|
PCOMUQ xmmreg,xmmreg,xmmrm,imm \160\3\x0F\x25\x6F\121\27 SSE5,AMD
|
|
PERMPS xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x20\132 SSE5,AMD
|
|
PERMPS xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x20\123 SSE5,AMD
|
|
PERMPS xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x24\121 SSE5,AMD
|
|
PERMPS xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x24\112 SSE5,AMD
|
|
PERMPD xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x21\132 SSE5,AMD
|
|
PERMPD xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x21\123 SSE5,AMD
|
|
PERMPD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x25\121 SSE5,AMD
|
|
PERMPD xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x25\112 SSE5,AMD
|
|
PCMOV xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x22\132 SSE5,AMD
|
|
PCMOV xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x22\123 SSE5,AMD
|
|
PCMOV xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x26\121 SSE5,AMD
|
|
PCMOV xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x26\112 SSE5,AMD
|
|
PPERM xmmreg,=0,xmmreg,xmmrm \160\3\x0F\x24\x23\132 SSE5,AMD
|
|
PPERM xmmreg,=0,xmmrm,xmmreg \164\3\x0F\x24\x23\123 SSE5,AMD
|
|
PPERM xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x27\121 SSE5,AMD
|
|
PPERM xmmreg,xmmrm,xmmreg,=0 \164\3\x0F\x24\x27\112 SSE5,AMD
|
|
PMACSSWW xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x85\121 SSE5,AMD
|
|
PMACSWW xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x95\121 SSE5,AMD
|
|
PMACSSWD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x86\121 SSE5,AMD
|
|
PMACSWD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x96\121 SSE5,AMD
|
|
PMACSSDD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x8E\121 SSE5,AMD
|
|
PMACSDD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x9E\121 SSE5,AMD
|
|
PMACSSDQL xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x87\121 SSE5,AMD
|
|
PMACSDQL xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x97\121 SSE5,AMD
|
|
PMACSSDQH xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x8F\121 SSE5,AMD
|
|
PMACSDQH xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\x9F\121 SSE5,AMD
|
|
PMADCSSWD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\xA6\121 SSE5,AMD
|
|
PMADCSWD xmmreg,xmmreg,xmmrm,=0 \160\3\x0F\x24\xB6\121 SSE5,AMD
|
|
|
|
; Three operands with DREX
|
|
PROTB xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x40\121 SSE5,AMD
|
|
PROTB xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x40\112 SSE5,AMD
|
|
PROTW xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x41\121 SSE5,AMD
|
|
PROTW xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x41\112 SSE5,AMD
|
|
PROTD xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x42\121 SSE5,AMD
|
|
PROTD xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x42\112 SSE5,AMD
|
|
PROTQ xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x43\121 SSE5,AMD
|
|
PROTQ xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x43\112 SSE5,AMD
|
|
PSHLB xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x44\121 SSE5,AMD
|
|
PSHLB xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x44\112 SSE5,AMD
|
|
PSHLW xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x45\121 SSE5,AMD
|
|
PSHLW xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x45\112 SSE5,AMD
|
|
PSHLD xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x46\121 SSE5,AMD
|
|
PSHLD xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x46\112 SSE5,AMD
|
|
PSHLQ xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x47\121 SSE5,AMD
|
|
PSHLQ xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x47\112 SSE5,AMD
|
|
PSHAB xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x48\121 SSE5,AMD
|
|
PSHAB xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x48\112 SSE5,AMD
|
|
PSHAW xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x49\121 SSE5,AMD
|
|
PSHAW xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x49\112 SSE5,AMD
|
|
PSHAD xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x4A\121 SSE5,AMD
|
|
PSHAD xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x4A\112 SSE5,AMD
|
|
PSHAQ xmmreg,xmmreg,xmmrm \160\3\x0F\x24\x4B\121 SSE5,AMD
|
|
PSHAQ xmmreg,xmmrm,xmmreg \164\3\x0F\x24\x4B\112 SSE5,AMD
|
|
|
|
; Non-DREX
|
|
FRCZPS xmmreg,xmmrm \3\x0F\x7A\x10\110 SSE5,AMD
|
|
FRCZPD xmmreg,xmmrm \3\x0F\x7A\x11\110 SSE5,AMD
|
|
FRCZSS xmmreg,xmmrm \3\x0F\x7A\x12\110 SSE5,AMD
|
|
FRCZSD xmmreg,xmmrm \3\x0F\x7A\x13\110 SSE5,AMD
|
|
CVTPH2PS xmmreg,xmmrm \3\x0F\x7A\x30\110 SSE5,AMD,SQ
|
|
CVTPS2PH xmmrm,xmmreg \3\x0F\x7A\x31\101 SSE5,AMD,SQ
|
|
PHADDBW xmmreg,xmmrm \3\x0F\x7A\x41\110 SSE5,AMD
|
|
PHADDBD xmmreg,xmmrm \3\x0F\x7A\x42\110 SSE5,AMD
|
|
PHADDBQ xmmreg,xmmrm \3\x0F\x7A\x43\110 SSE5,AMD
|
|
PHADDWD xmmreg,xmmrm \3\x0F\x7A\x46\110 SSE5,AMD
|
|
PHADDWQ xmmreg,xmmrm \3\x0F\x7A\x47\110 SSE5,AMD
|
|
PHADDDQ xmmreg,xmmrm \3\x0F\x7A\x4B\110 SSE5,AMD
|
|
PHADDUBW xmmreg,xmmrm \3\x0F\x7A\x51\110 SSE5,AMD
|
|
PHADDUBD xmmreg,xmmrm \3\x0F\x7A\x52\110 SSE5,AMD
|
|
PHADDUBQ xmmreg,xmmrm \3\x0F\x7A\x53\110 SSE5,AMD
|
|
PHADDUWD xmmreg,xmmrm \3\x0F\x7A\x56\110 SSE5,AMD
|
|
PHADDUWQ xmmreg,xmmrm \3\x0F\x7A\x57\110 SSE5,AMD
|
|
PHADDUDQ xmmreg,xmmrm \3\x0F\x7A\x5B\110 SSE5,AMD
|
|
PHSUBBW xmmreg,xmmrm \3\x0F\x7A\x61\110 SSE5,AMD
|
|
PHSUBWD xmmreg,xmmrm \3\x0F\x7A\x62\110 SSE5,AMD
|
|
PHSUBDQ xmmreg,xmmrm \3\x0F\x7A\x63\110 SSE5,AMD
|
|
PROTB xmmreg,xmmrm,imm \3\x0F\x7B\x40\110\26 SSE5,AMD
|
|
PROTW xmmreg,xmmrm,imm \3\x0F\x7B\x41\110\26 SSE5,AMD
|
|
PROTD xmmreg,xmmrm,imm \3\x0F\x7B\x42\110\26 SSE5,AMD
|
|
PROTQ xmmreg,xmmrm,imm \3\x0F\x7B\x43\110\26 SSE5,AMD
|
|
PTEST xmmreg,xmmrm \366\3\x0F\x38\x17\110 SSE5,AMD
|
|
ROUNDPS xmmreg,xmmrm,imm \366\3\x0F\x3A\x08\110\26 SSE5,AMD
|
|
ROUNDPD xmmreg,xmmrm,imm \366\3\x0F\x3A\x08\110\26 SSE5,AMD
|
|
ROUNDSS xmmreg,xmmrm,imm \366\3\x0F\x3A\x08\110\26 SSE5,AMD
|
|
ROUNDSD xmmreg,xmmrm,imm \366\3\x0F\x3A\x08\110\26 SSE5,AMD
|
|
|
|
;# Intel SMX
|
|
GETSEC void \2\x0F\x37 KATMAI
|
|
|
|
;# Geode (Cyrix) 3DNow! additions
|
|
PFRCP mmxreg,mmxrm \2\x0F\x0F\110\1\x86 PENT,3DNOW,SM,CYRIX
|
|
PFRSQRT mmxreg,mmxrm \2\x0F\x0F\110\1\x87 PENT,3DNOW,SM,CYRIX
|
|
|
|
;# VIA (Centaur) security instructions
|
|
XSTORE void \3\x0F\xA7\xC0 PENT,CYRIX
|
|
XCRYPTECB void \333\3\x0F\xA7\xC8 PENT,CYRIX
|
|
XCRYPTCBC void \333\3\x0F\xA7\xD0 PENT,CYRIX
|
|
XCRYPTCFB void \333\3\x0F\xA7\xE0 PENT,CYRIX
|
|
XCRYPTOFB void \333\3\x0F\xA7\xE8 PENT,CYRIX
|
|
MONTMUL void \333\3\x0F\xA6\xC0 PENT,CYRIX
|
|
XSHA1 void \333\3\x0F\xA6\xC8 PENT,CYRIX
|
|
XSHA256 void \333\3\x0F\xA6\xD0 PENT,CYRIX
|
|
|
|
;# Systematic names for the hinting nop instructions
|
|
HINT_NOP0 rm16 \320\2\x0F\x18\200 P6,UNDOC
|
|
HINT_NOP0 rm32 \321\2\x0F\x18\200 P6,UNDOC
|
|
HINT_NOP0 rm64 \324\2\x0F\x18\200 X64,UNDOC
|
|
HINT_NOP1 rm16 \320\2\x0F\x18\201 P6,UNDOC
|
|
HINT_NOP1 rm32 \321\2\x0F\x18\201 P6,UNDOC
|
|
HINT_NOP1 rm64 \324\2\x0F\x18\201 X64,UNDOC
|
|
HINT_NOP2 rm16 \320\2\x0F\x18\202 P6,UNDOC
|
|
HINT_NOP2 rm32 \321\2\x0F\x18\202 P6,UNDOC
|
|
HINT_NOP2 rm64 \324\2\x0F\x18\202 X64,UNDOC
|
|
HINT_NOP3 rm16 \320\2\x0F\x18\203 P6,UNDOC
|
|
HINT_NOP3 rm32 \321\2\x0F\x18\203 P6,UNDOC
|
|
HINT_NOP3 rm64 \324\2\x0F\x18\203 X64,UNDOC
|
|
HINT_NOP4 rm16 \320\2\x0F\x18\204 P6,UNDOC
|
|
HINT_NOP4 rm32 \321\2\x0F\x18\204 P6,UNDOC
|
|
HINT_NOP4 rm64 \324\2\x0F\x18\204 X64,UNDOC
|
|
HINT_NOP5 rm16 \320\2\x0F\x18\205 P6,UNDOC
|
|
HINT_NOP5 rm32 \321\2\x0F\x18\205 P6,UNDOC
|
|
HINT_NOP5 rm64 \324\2\x0F\x18\205 X64,UNDOC
|
|
HINT_NOP6 rm16 \320\2\x0F\x18\206 P6,UNDOC
|
|
HINT_NOP6 rm32 \321\2\x0F\x18\206 P6,UNDOC
|
|
HINT_NOP6 rm64 \324\2\x0F\x18\206 X64,UNDOC
|
|
HINT_NOP7 rm16 \320\2\x0F\x18\207 P6,UNDOC
|
|
HINT_NOP7 rm32 \321\2\x0F\x18\207 P6,UNDOC
|
|
HINT_NOP7 rm64 \324\2\x0F\x18\207 X64,UNDOC
|
|
HINT_NOP8 rm16 \320\2\x0F\x19\200 P6,UNDOC
|
|
HINT_NOP8 rm32 \321\2\x0F\x19\200 P6,UNDOC
|
|
HINT_NOP8 rm64 \324\2\x0F\x19\200 X64,UNDOC
|
|
HINT_NOP9 rm16 \320\2\x0F\x19\201 P6,UNDOC
|
|
HINT_NOP9 rm32 \321\2\x0F\x19\201 P6,UNDOC
|
|
HINT_NOP9 rm64 \324\2\x0F\x19\201 X64,UNDOC
|
|
HINT_NOP10 rm16 \320\2\x0F\x19\202 P6,UNDOC
|
|
HINT_NOP10 rm32 \321\2\x0F\x19\202 P6,UNDOC
|
|
HINT_NOP10 rm64 \324\2\x0F\x19\202 X64,UNDOC
|
|
HINT_NOP11 rm16 \320\2\x0F\x19\203 P6,UNDOC
|
|
HINT_NOP11 rm32 \321\2\x0F\x19\203 P6,UNDOC
|
|
HINT_NOP11 rm64 \324\2\x0F\x19\203 X64,UNDOC
|
|
HINT_NOP12 rm16 \320\2\x0F\x19\204 P6,UNDOC
|
|
HINT_NOP12 rm32 \321\2\x0F\x19\204 P6,UNDOC
|
|
HINT_NOP12 rm64 \324\2\x0F\x19\204 X64,UNDOC
|
|
HINT_NOP13 rm16 \320\2\x0F\x19\205 P6,UNDOC
|
|
HINT_NOP13 rm32 \321\2\x0F\x19\205 P6,UNDOC
|
|
HINT_NOP13 rm64 \324\2\x0F\x19\205 X64,UNDOC
|
|
HINT_NOP14 rm16 \320\2\x0F\x19\206 P6,UNDOC
|
|
HINT_NOP14 rm32 \321\2\x0F\x19\206 P6,UNDOC
|
|
HINT_NOP14 rm64 \324\2\x0F\x19\206 X64,UNDOC
|
|
HINT_NOP15 rm16 \320\2\x0F\x19\207 P6,UNDOC
|
|
HINT_NOP15 rm32 \321\2\x0F\x19\207 P6,UNDOC
|
|
HINT_NOP15 rm64 \324\2\x0F\x19\207 X64,UNDOC
|
|
HINT_NOP16 rm16 \320\2\x0F\x1A\200 P6,UNDOC
|
|
HINT_NOP16 rm32 \321\2\x0F\x1A\200 P6,UNDOC
|
|
HINT_NOP16 rm64 \324\2\x0F\x1A\200 X64,UNDOC
|
|
HINT_NOP17 rm16 \320\2\x0F\x1A\201 P6,UNDOC
|
|
HINT_NOP17 rm32 \321\2\x0F\x1A\201 P6,UNDOC
|
|
HINT_NOP17 rm64 \324\2\x0F\x1A\201 X64,UNDOC
|
|
HINT_NOP18 rm16 \320\2\x0F\x1A\202 P6,UNDOC
|
|
HINT_NOP18 rm32 \321\2\x0F\x1A\202 P6,UNDOC
|
|
HINT_NOP18 rm64 \324\2\x0F\x1A\202 X64,UNDOC
|
|
HINT_NOP19 rm16 \320\2\x0F\x1A\203 P6,UNDOC
|
|
HINT_NOP19 rm32 \321\2\x0F\x1A\203 P6,UNDOC
|
|
HINT_NOP19 rm64 \324\2\x0F\x1A\203 X64,UNDOC
|
|
HINT_NOP20 rm16 \320\2\x0F\x1A\204 P6,UNDOC
|
|
HINT_NOP20 rm32 \321\2\x0F\x1A\204 P6,UNDOC
|
|
HINT_NOP20 rm64 \324\2\x0F\x1A\204 X64,UNDOC
|
|
HINT_NOP21 rm16 \320\2\x0F\x1A\205 P6,UNDOC
|
|
HINT_NOP21 rm32 \321\2\x0F\x1A\205 P6,UNDOC
|
|
HINT_NOP21 rm64 \324\2\x0F\x1A\205 X64,UNDOC
|
|
HINT_NOP22 rm16 \320\2\x0F\x1A\206 P6,UNDOC
|
|
HINT_NOP22 rm32 \321\2\x0F\x1A\206 P6,UNDOC
|
|
HINT_NOP22 rm64 \324\2\x0F\x1A\206 X64,UNDOC
|
|
HINT_NOP23 rm16 \320\2\x0F\x1A\207 P6,UNDOC
|
|
HINT_NOP23 rm32 \321\2\x0F\x1A\207 P6,UNDOC
|
|
HINT_NOP23 rm64 \324\2\x0F\x1A\207 X64,UNDOC
|
|
HINT_NOP24 rm16 \320\2\x0F\x1B\200 P6,UNDOC
|
|
HINT_NOP24 rm32 \321\2\x0F\x1B\200 P6,UNDOC
|
|
HINT_NOP24 rm64 \324\2\x0F\x1B\200 X64,UNDOC
|
|
HINT_NOP25 rm16 \320\2\x0F\x1B\201 P6,UNDOC
|
|
HINT_NOP25 rm32 \321\2\x0F\x1B\201 P6,UNDOC
|
|
HINT_NOP25 rm64 \324\2\x0F\x1B\201 X64,UNDOC
|
|
HINT_NOP26 rm16 \320\2\x0F\x1B\202 P6,UNDOC
|
|
HINT_NOP26 rm32 \321\2\x0F\x1B\202 P6,UNDOC
|
|
HINT_NOP26 rm64 \324\2\x0F\x1B\202 X64,UNDOC
|
|
HINT_NOP27 rm16 \320\2\x0F\x1B\203 P6,UNDOC
|
|
HINT_NOP27 rm32 \321\2\x0F\x1B\203 P6,UNDOC
|
|
HINT_NOP27 rm64 \324\2\x0F\x1B\203 X64,UNDOC
|
|
HINT_NOP28 rm16 \320\2\x0F\x1B\204 P6,UNDOC
|
|
HINT_NOP28 rm32 \321\2\x0F\x1B\204 P6,UNDOC
|
|
HINT_NOP28 rm64 \324\2\x0F\x1B\204 X64,UNDOC
|
|
HINT_NOP29 rm16 \320\2\x0F\x1B\205 P6,UNDOC
|
|
HINT_NOP29 rm32 \321\2\x0F\x1B\205 P6,UNDOC
|
|
HINT_NOP29 rm64 \324\2\x0F\x1B\205 X64,UNDOC
|
|
HINT_NOP30 rm16 \320\2\x0F\x1B\206 P6,UNDOC
|
|
HINT_NOP30 rm32 \321\2\x0F\x1B\206 P6,UNDOC
|
|
HINT_NOP30 rm64 \324\2\x0F\x1B\206 X64,UNDOC
|
|
HINT_NOP31 rm16 \320\2\x0F\x1B\207 P6,UNDOC
|
|
HINT_NOP31 rm32 \321\2\x0F\x1B\207 P6,UNDOC
|
|
HINT_NOP31 rm64 \324\2\x0F\x1B\207 X64,UNDOC
|
|
HINT_NOP32 rm16 \320\2\x0F\x1C\200 P6,UNDOC
|
|
HINT_NOP32 rm32 \321\2\x0F\x1C\200 P6,UNDOC
|
|
HINT_NOP32 rm64 \324\2\x0F\x1C\200 X64,UNDOC
|
|
HINT_NOP33 rm16 \320\2\x0F\x1C\201 P6,UNDOC
|
|
HINT_NOP33 rm32 \321\2\x0F\x1C\201 P6,UNDOC
|
|
HINT_NOP33 rm64 \324\2\x0F\x1C\201 X64,UNDOC
|
|
HINT_NOP34 rm16 \320\2\x0F\x1C\202 P6,UNDOC
|
|
HINT_NOP34 rm32 \321\2\x0F\x1C\202 P6,UNDOC
|
|
HINT_NOP34 rm64 \324\2\x0F\x1C\202 X64,UNDOC
|
|
HINT_NOP35 rm16 \320\2\x0F\x1C\203 P6,UNDOC
|
|
HINT_NOP35 rm32 \321\2\x0F\x1C\203 P6,UNDOC
|
|
HINT_NOP35 rm64 \324\2\x0F\x1C\203 X64,UNDOC
|
|
HINT_NOP36 rm16 \320\2\x0F\x1C\204 P6,UNDOC
|
|
HINT_NOP36 rm32 \321\2\x0F\x1C\204 P6,UNDOC
|
|
HINT_NOP36 rm64 \324\2\x0F\x1C\204 X64,UNDOC
|
|
HINT_NOP37 rm16 \320\2\x0F\x1C\205 P6,UNDOC
|
|
HINT_NOP37 rm32 \321\2\x0F\x1C\205 P6,UNDOC
|
|
HINT_NOP37 rm64 \324\2\x0F\x1C\205 X64,UNDOC
|
|
HINT_NOP38 rm16 \320\2\x0F\x1C\206 P6,UNDOC
|
|
HINT_NOP38 rm32 \321\2\x0F\x1C\206 P6,UNDOC
|
|
HINT_NOP38 rm64 \324\2\x0F\x1C\206 X64,UNDOC
|
|
HINT_NOP39 rm16 \320\2\x0F\x1C\207 P6,UNDOC
|
|
HINT_NOP39 rm32 \321\2\x0F\x1C\207 P6,UNDOC
|
|
HINT_NOP39 rm64 \324\2\x0F\x1C\207 X64,UNDOC
|
|
HINT_NOP40 rm16 \320\2\x0F\x1D\200 P6,UNDOC
|
|
HINT_NOP40 rm32 \321\2\x0F\x1D\200 P6,UNDOC
|
|
HINT_NOP40 rm64 \324\2\x0F\x1D\200 X64,UNDOC
|
|
HINT_NOP41 rm16 \320\2\x0F\x1D\201 P6,UNDOC
|
|
HINT_NOP41 rm32 \321\2\x0F\x1D\201 P6,UNDOC
|
|
HINT_NOP41 rm64 \324\2\x0F\x1D\201 X64,UNDOC
|
|
HINT_NOP42 rm16 \320\2\x0F\x1D\202 P6,UNDOC
|
|
HINT_NOP42 rm32 \321\2\x0F\x1D\202 P6,UNDOC
|
|
HINT_NOP42 rm64 \324\2\x0F\x1D\202 X64,UNDOC
|
|
HINT_NOP43 rm16 \320\2\x0F\x1D\203 P6,UNDOC
|
|
HINT_NOP43 rm32 \321\2\x0F\x1D\203 P6,UNDOC
|
|
HINT_NOP43 rm64 \324\2\x0F\x1D\203 X64,UNDOC
|
|
HINT_NOP44 rm16 \320\2\x0F\x1D\204 P6,UNDOC
|
|
HINT_NOP44 rm32 \321\2\x0F\x1D\204 P6,UNDOC
|
|
HINT_NOP44 rm64 \324\2\x0F\x1D\204 X64,UNDOC
|
|
HINT_NOP45 rm16 \320\2\x0F\x1D\205 P6,UNDOC
|
|
HINT_NOP45 rm32 \321\2\x0F\x1D\205 P6,UNDOC
|
|
HINT_NOP45 rm64 \324\2\x0F\x1D\205 X64,UNDOC
|
|
HINT_NOP46 rm16 \320\2\x0F\x1D\206 P6,UNDOC
|
|
HINT_NOP46 rm32 \321\2\x0F\x1D\206 P6,UNDOC
|
|
HINT_NOP46 rm64 \324\2\x0F\x1D\206 X64,UNDOC
|
|
HINT_NOP47 rm16 \320\2\x0F\x1D\207 P6,UNDOC
|
|
HINT_NOP47 rm32 \321\2\x0F\x1D\207 P6,UNDOC
|
|
HINT_NOP47 rm64 \324\2\x0F\x1D\207 X64,UNDOC
|
|
HINT_NOP48 rm16 \320\2\x0F\x1E\200 P6,UNDOC
|
|
HINT_NOP48 rm32 \321\2\x0F\x1E\200 P6,UNDOC
|
|
HINT_NOP48 rm64 \324\2\x0F\x1E\200 X64,UNDOC
|
|
HINT_NOP49 rm16 \320\2\x0F\x1E\201 P6,UNDOC
|
|
HINT_NOP49 rm32 \321\2\x0F\x1E\201 P6,UNDOC
|
|
HINT_NOP49 rm64 \324\2\x0F\x1E\201 X64,UNDOC
|
|
HINT_NOP50 rm16 \320\2\x0F\x1E\202 P6,UNDOC
|
|
HINT_NOP50 rm32 \321\2\x0F\x1E\202 P6,UNDOC
|
|
HINT_NOP50 rm64 \324\2\x0F\x1E\202 X64,UNDOC
|
|
HINT_NOP51 rm16 \320\2\x0F\x1E\203 P6,UNDOC
|
|
HINT_NOP51 rm32 \321\2\x0F\x1E\203 P6,UNDOC
|
|
HINT_NOP51 rm64 \324\2\x0F\x1E\203 X64,UNDOC
|
|
HINT_NOP52 rm16 \320\2\x0F\x1E\204 P6,UNDOC
|
|
HINT_NOP52 rm32 \321\2\x0F\x1E\204 P6,UNDOC
|
|
HINT_NOP52 rm64 \324\2\x0F\x1E\204 X64,UNDOC
|
|
HINT_NOP53 rm16 \320\2\x0F\x1E\205 P6,UNDOC
|
|
HINT_NOP53 rm32 \321\2\x0F\x1E\205 P6,UNDOC
|
|
HINT_NOP53 rm64 \324\2\x0F\x1E\205 X64,UNDOC
|
|
HINT_NOP54 rm16 \320\2\x0F\x1E\206 P6,UNDOC
|
|
HINT_NOP54 rm32 \321\2\x0F\x1E\206 P6,UNDOC
|
|
HINT_NOP54 rm64 \324\2\x0F\x1E\206 X64,UNDOC
|
|
HINT_NOP55 rm16 \320\2\x0F\x1E\207 P6,UNDOC
|
|
HINT_NOP55 rm32 \321\2\x0F\x1E\207 P6,UNDOC
|
|
HINT_NOP55 rm64 \324\2\x0F\x1E\207 X64,UNDOC
|
|
HINT_NOP56 rm16 \320\2\x0F\x1F\200 P6,UNDOC
|
|
HINT_NOP56 rm32 \321\2\x0F\x1F\200 P6,UNDOC
|
|
HINT_NOP56 rm64 \324\2\x0F\x1F\200 X64,UNDOC
|
|
HINT_NOP57 rm16 \320\2\x0F\x1F\201 P6,UNDOC
|
|
HINT_NOP57 rm32 \321\2\x0F\x1F\201 P6,UNDOC
|
|
HINT_NOP57 rm64 \324\2\x0F\x1F\201 X64,UNDOC
|
|
HINT_NOP58 rm16 \320\2\x0F\x1F\202 P6,UNDOC
|
|
HINT_NOP58 rm32 \321\2\x0F\x1F\202 P6,UNDOC
|
|
HINT_NOP58 rm64 \324\2\x0F\x1F\202 X64,UNDOC
|
|
HINT_NOP59 rm16 \320\2\x0F\x1F\203 P6,UNDOC
|
|
HINT_NOP59 rm32 \321\2\x0F\x1F\203 P6,UNDOC
|
|
HINT_NOP59 rm64 \324\2\x0F\x1F\203 X64,UNDOC
|
|
HINT_NOP60 rm16 \320\2\x0F\x1F\204 P6,UNDOC
|
|
HINT_NOP60 rm32 \321\2\x0F\x1F\204 P6,UNDOC
|
|
HINT_NOP60 rm64 \324\2\x0F\x1F\204 X64,UNDOC
|
|
HINT_NOP61 rm16 \320\2\x0F\x1F\205 P6,UNDOC
|
|
HINT_NOP61 rm32 \321\2\x0F\x1F\205 P6,UNDOC
|
|
HINT_NOP61 rm64 \324\2\x0F\x1F\205 X64,UNDOC
|
|
HINT_NOP62 rm16 \320\2\x0F\x1F\206 P6,UNDOC
|
|
HINT_NOP62 rm32 \321\2\x0F\x1F\206 P6,UNDOC
|
|
HINT_NOP62 rm64 \324\2\x0F\x1F\206 X64,UNDOC
|
|
HINT_NOP63 rm16 \320\2\x0F\x1F\207 P6,UNDOC
|
|
HINT_NOP63 rm32 \321\2\x0F\x1F\207 P6,UNDOC
|
|
HINT_NOP63 rm64 \324\2\x0F\x1F\207 X64,UNDOC
|