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3560 lines
206 KiB
Plaintext
3560 lines
206 KiB
Plaintext
;; --------------------------------------------------------------------------
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;;
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;; Copyright 1996-2012 The NASM Authors - All Rights Reserved
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;; See the file AUTHORS included with the NASM distribution for
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;; the specific copyright holders.
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;;
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;; Redistribution and use in source and binary forms, with or without
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;; modification, are permitted provided that the following
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;; conditions are met:
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;;
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;; * Redistributions of source code must retain the above copyright
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;; notice, this list of conditions and the following disclaimer.
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;; * Redistributions in binary form must reproduce the above
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;; copyright notice, this list of conditions and the following
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;; disclaimer in the documentation and/or other materials provided
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;; with the distribution.
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;;
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;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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;; CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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;; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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;; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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;; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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;; NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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;; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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;; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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;; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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;; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;
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;; --------------------------------------------------------------------------
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;
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; insns.dat table of instructions for the Netwide Assembler
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;
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; Format of file: All four fields must be present on every functional
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; line. Hence `void' for no-operand instructions, and `\0' for such
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; as EQU. If the last three fields are all `ignore', no action is
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; taken except to register the opcode as being present.
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;
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; For a detailed description of the code string (third field), please
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; see insns.pl and the comment at the top of assemble.c. For a detailed
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; description of the flags (fourth field), please see insns.h.
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;
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; Comments with a pound sign after the semicolon generate section
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; subheaders in the NASM documentation.
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;
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;# Special instructions...
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DB ignore ignore ignore
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DW ignore ignore ignore
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DD ignore ignore ignore
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DQ ignore ignore ignore
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DT ignore ignore ignore
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DO ignore ignore ignore
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DY ignore ignore ignore
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RESB imm [ resb] 8086
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RESW ignore ignore ignore
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RESD ignore ignore ignore
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RESQ ignore ignore ignore
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REST ignore ignore ignore
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RESO ignore ignore ignore
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RESY ignore ignore ignore
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;# Conventional instructions
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AAA void [ 37] 8086,NOLONG
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AAD void [ d5 0a] 8086,NOLONG
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AAD imm [i: d5 ib,u] 8086,SB,NOLONG
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AAM void [ d4 0a] 8086,NOLONG
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AAM imm [i: d4 ib,u] 8086,SB,NOLONG
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AAS void [ 3f] 8086,NOLONG
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ADC mem,reg8 [mr: hle 10 /r] 8086,SM,LOCK
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ADC reg8,reg8 [mr: 10 /r] 8086
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ADC mem,reg16 [mr: hle o16 11 /r] 8086,SM,LOCK
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ADC reg16,reg16 [mr: o16 11 /r] 8086
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ADC mem,reg32 [mr: hle o32 11 /r] 386,SM,LOCK
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ADC reg32,reg32 [mr: o32 11 /r] 386
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ADC mem,reg64 [mr: hle o64 11 /r] X64,SM,LOCK
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ADC reg64,reg64 [mr: o64 11 /r] X64
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ADC reg8,mem [rm: 12 /r] 8086,SM
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ADC reg8,reg8 [rm: 12 /r] 8086
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ADC reg16,mem [rm: o16 13 /r] 8086,SM
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ADC reg16,reg16 [rm: o16 13 /r] 8086
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ADC reg32,mem [rm: o32 13 /r] 386,SM
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ADC reg32,reg32 [rm: o32 13 /r] 386
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ADC reg64,mem [rm: o64 13 /r] X64,SM
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ADC reg64,reg64 [rm: o64 13 /r] X64
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ADC rm16,imm8 [mi: hle o16 83 /2 ibx] 8086,LOCK
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ADC rm32,imm8 [mi: hle o32 83 /2 ibx] 386,LOCK
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ADC rm64,imm8 [mi: hle o64 83 /2 ibx] X64,LOCK
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ADC reg_al,imm [-i: 14 ib] 8086,SM
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ADC reg_ax,sbyte16 [mi: o16 83 /2 ibx] 8086,SM
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ADC reg_ax,imm [-i: o16 15 iw] 8086,SM
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ADC reg_eax,sbyte32 [mi: o32 83 /2 ibx] 386,SM
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ADC reg_eax,imm [-i: o32 15 id] 386,SM
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ADC reg_rax,sbyte64 [mi: o64 83 /2 ibx] X64,SM
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ADC reg_rax,imm [-i: o64 15 idx] X64,SM
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ADC rm8,imm [mi: hle 80 /2 ib] 8086,SM,LOCK
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ADC rm16,imm [mi: hle o16 81+s /2 ibw] 8086,SM,LOCK
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ADC rm32,imm [mi: hle o32 81+s /2 ibd] 386,SM,LOCK
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ADC rm64,imm [mi: hle o64 81+s /2 ibd,s] X64,SM,LOCK
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ADC mem,imm8 [mi: hle 80 /2 ib] 8086,SM,LOCK
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ADC mem,imm16 [mi: hle o16 81+s /2 ibw] 8086,SM,LOCK
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ADC mem,imm32 [mi: hle o32 81+s /2 ibd] 386,SM,LOCK
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ADD mem,reg8 [mr: hle 00 /r] 8086,SM,LOCK
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ADD reg8,reg8 [mr: 00 /r] 8086
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ADD mem,reg16 [mr: hle o16 01 /r] 8086,SM,LOCK
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ADD reg16,reg16 [mr: o16 01 /r] 8086
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ADD mem,reg32 [mr: hle o32 01 /r] 386,SM,LOCK
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ADD reg32,reg32 [mr: o32 01 /r] 386
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ADD mem,reg64 [mr: hle o64 01 /r] X64,SM,LOCK
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ADD reg64,reg64 [mr: o64 01 /r] X64
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ADD reg8,mem [rm: 02 /r] 8086,SM
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ADD reg8,reg8 [rm: 02 /r] 8086
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ADD reg16,mem [rm: o16 03 /r] 8086,SM
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ADD reg16,reg16 [rm: o16 03 /r] 8086
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ADD reg32,mem [rm: o32 03 /r] 386,SM
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ADD reg32,reg32 [rm: o32 03 /r] 386
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ADD reg64,mem [rm: o64 03 /r] X64,SM
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ADD reg64,reg64 [rm: o64 03 /r] X64
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ADD rm16,imm8 [mi: hle o16 83 /0 ibx] 8086,LOCK
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ADD rm32,imm8 [mi: hle o32 83 /0 ibx] 386,LOCK
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ADD rm64,imm8 [mi: hle o64 83 /0 ibx] X64,LOCK
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ADD reg_al,imm [-i: 04 ib] 8086,SM
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ADD reg_ax,sbyte16 [mi: o16 83 /0 ibx] 8086,SM
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ADD reg_ax,imm [-i: o16 05 iw] 8086,SM
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ADD reg_eax,sbyte32 [mi: o32 83 /0 ibx] 386,SM
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ADD reg_eax,imm [-i: o32 05 id] 386,SM
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ADD reg_rax,sbyte64 [mi: o64 83 /0 ibx] X64,SM
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ADD reg_rax,imm [-i: o64 05 idx] X64,SM
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ADD rm8,imm [mi: hle 80 /0 ib] 8086,SM,LOCK
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ADD rm16,imm [mi: hle o16 81+s /0 ibw] 8086,SM,LOCK
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ADD rm32,imm [mi: hle o32 81+s /0 ibd] 386,SM,LOCK
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ADD rm64,imm [mi: hle o64 81+s /0 ibd,s] X64,SM,LOCK
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ADD mem,imm8 [mi: hle 80 /0 ib] 8086,SM,LOCK
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ADD mem,imm16 [mi: hle o16 81+s /0 ibw] 8086,SM,LOCK
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ADD mem,imm32 [mi: hle o32 81+s /0 ibd] 386,SM,LOCK
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AND mem,reg8 [mr: hle 20 /r] 8086,SM,LOCK
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AND reg8,reg8 [mr: 20 /r] 8086
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AND mem,reg16 [mr: hle o16 21 /r] 8086,SM,LOCK
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AND reg16,reg16 [mr: o16 21 /r] 8086
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AND mem,reg32 [mr: hle o32 21 /r] 386,SM,LOCK
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AND reg32,reg32 [mr: o32 21 /r] 386
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AND mem,reg64 [mr: hle o64 21 /r] X64,SM,LOCK
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AND reg64,reg64 [mr: o64 21 /r] X64
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AND reg8,mem [rm: 22 /r] 8086,SM
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AND reg8,reg8 [rm: 22 /r] 8086
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AND reg16,mem [rm: o16 23 /r] 8086,SM
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AND reg16,reg16 [rm: o16 23 /r] 8086
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AND reg32,mem [rm: o32 23 /r] 386,SM
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AND reg32,reg32 [rm: o32 23 /r] 386
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AND reg64,mem [rm: o64 23 /r] X64,SM
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AND reg64,reg64 [rm: o64 23 /r] X64
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AND rm16,imm8 [mi: hle o16 83 /4 ibx] 8086,LOCK
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AND rm32,imm8 [mi: hle o32 83 /4 ibx] 386,LOCK
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AND rm64,imm8 [mi: hle o64 83 /4 ibx] X64,LOCK
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AND reg_al,imm [-i: 24 ib] 8086,SM
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AND reg_ax,sbyte16 [mi: o16 83 /4 ibx] 8086,SM
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AND reg_ax,imm [-i: o16 25 iw] 8086,SM
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AND reg_eax,sbyte32 [mi: o32 83 /4 ibx] 386,SM
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AND reg_eax,imm [-i: o32 25 id] 386,SM
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AND reg_rax,sbyte64 [mi: o64 83 /4 ibx] X64,SM
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AND reg_rax,imm [-i: o64 25 idx] X64,SM
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AND rm8,imm [mi: hle 80 /4 ib] 8086,SM,LOCK
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AND rm16,imm [mi: hle o16 81+s /4 ibw] 8086,SM,LOCK
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AND rm32,imm [mi: hle o32 81+s /4 ibd] 386,SM,LOCK
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AND rm64,imm [mi: hle o64 81+s /4 ibd,s] X64,SM,LOCK
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AND mem,imm8 [mi: hle 80 /4 ib] 8086,SM,LOCK
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AND mem,imm16 [mi: hle o16 81+s /4 ibw] 8086,SM,LOCK
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AND mem,imm32 [mi: hle o32 81+s /4 ibd] 386,SM,LOCK
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ARPL mem,reg16 [mr: 63 /r] 286,PROT,SM,NOLONG
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ARPL reg16,reg16 [mr: 63 /r] 286,PROT,NOLONG
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BB0_RESET void [ 0f 3a] PENT,CYRIX,ND
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BB1_RESET void [ 0f 3b] PENT,CYRIX,ND
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BOUND reg16,mem [rm: o16 62 /r] 186,NOLONG
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BOUND reg32,mem [rm: o32 62 /r] 386,NOLONG
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BSF reg16,mem [rm: o16 0f bc /r] 386,SM
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BSF reg16,reg16 [rm: o16 0f bc /r] 386
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BSF reg32,mem [rm: o32 0f bc /r] 386,SM
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BSF reg32,reg32 [rm: o32 0f bc /r] 386
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BSF reg64,mem [rm: o64 0f bc /r] X64,SM
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BSF reg64,reg64 [rm: o64 0f bc /r] X64
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BSR reg16,mem [rm: o16 0f bd /r] 386,SM
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BSR reg16,reg16 [rm: o16 0f bd /r] 386
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BSR reg32,mem [rm: o32 0f bd /r] 386,SM
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BSR reg32,reg32 [rm: o32 0f bd /r] 386
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BSR reg64,mem [rm: o64 0f bd /r] X64,SM
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BSR reg64,reg64 [rm: o64 0f bd /r] X64
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BSWAP reg32 [r: o32 0f c8+r] 486
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BSWAP reg64 [r: o64 0f c8+r] X64
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BT mem,reg16 [mr: o16 0f a3 /r] 386,SM
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BT reg16,reg16 [mr: o16 0f a3 /r] 386
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BT mem,reg32 [mr: o32 0f a3 /r] 386,SM
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BT reg32,reg32 [mr: o32 0f a3 /r] 386
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BT mem,reg64 [mr: o64 0f a3 /r] X64,SM
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BT reg64,reg64 [mr: o64 0f a3 /r] X64
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BT rm16,imm [mi: o16 0f ba /4 ib,u] 386,SB
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BT rm32,imm [mi: o32 0f ba /4 ib,u] 386,SB
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BT rm64,imm [mi: o64 0f ba /4 ib,u] X64,SB
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BTC mem,reg16 [mr: hle o16 0f bb /r] 386,SM,LOCK
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BTC reg16,reg16 [mr: o16 0f bb /r] 386
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BTC mem,reg32 [mr: hle o32 0f bb /r] 386,SM,LOCK
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BTC reg32,reg32 [mr: o32 0f bb /r] 386
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BTC mem,reg64 [mr: hle o64 0f bb /r] X64,SM,LOCK
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BTC reg64,reg64 [mr: o64 0f bb /r] X64
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BTC rm16,imm [mi: hle o16 0f ba /7 ib,u] 386,SB,LOCK
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BTC rm32,imm [mi: hle o32 0f ba /7 ib,u] 386,SB,LOCK
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BTC rm64,imm [mi: hle o64 0f ba /7 ib,u] X64,SB,LOCK
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BTR mem,reg16 [mr: hle o16 0f b3 /r] 386,SM,LOCK
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BTR reg16,reg16 [mr: o16 0f b3 /r] 386
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BTR mem,reg32 [mr: hle o32 0f b3 /r] 386,SM,LOCK
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BTR reg32,reg32 [mr: o32 0f b3 /r] 386
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BTR mem,reg64 [mr: hle o64 0f b3 /r] X64,SM,LOCK
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BTR reg64,reg64 [mr: o64 0f b3 /r] X64
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BTR rm16,imm [mi: hle o16 0f ba /6 ib,u] 386,SB,LOCK
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BTR rm32,imm [mi: hle o32 0f ba /6 ib,u] 386,SB,LOCK
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BTR rm64,imm [mi: hle o64 0f ba /6 ib,u] X64,SB,LOCK
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BTS mem,reg16 [mr: hle o16 0f ab /r] 386,SM,LOCK
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BTS reg16,reg16 [mr: o16 0f ab /r] 386
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BTS mem,reg32 [mr: hle o32 0f ab /r] 386,SM,LOCK
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BTS reg32,reg32 [mr: o32 0f ab /r] 386
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BTS mem,reg64 [mr: hle o64 0f ab /r] X64,SM,LOCK
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BTS reg64,reg64 [mr: o64 0f ab /r] X64
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BTS rm16,imm [mi: hle o16 0f ba /5 ib,u] 386,SB,LOCK
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BTS rm32,imm [mi: hle o32 0f ba /5 ib,u] 386,SB,LOCK
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BTS rm64,imm [mi: hle o64 0f ba /5 ib,u] X64,SB,LOCK
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CALL imm [i: odf e8 rel] 8086
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CALL imm|near [i: odf e8 rel] 8086
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CALL imm|far [i: odf 9a iwd seg] 8086,ND,NOLONG
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CALL imm16 [i: o16 e8 rel] 8086
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CALL imm16|near [i: o16 e8 rel] 8086
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CALL imm16|far [i: o16 9a iwd seg] 8086,ND,NOLONG
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CALL imm32 [i: o32 e8 rel] 386
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CALL imm32|near [i: o32 e8 rel] 386
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CALL imm32|far [i: o32 9a iwd seg] 386,ND,NOLONG
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CALL imm:imm [ji: odf 9a iwd iw] 8086,NOLONG
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CALL imm16:imm [ji: o16 9a iw iw] 8086,NOLONG
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CALL imm:imm16 [ji: o16 9a iw iw] 8086,NOLONG
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CALL imm32:imm [ji: o32 9a id iw] 386,NOLONG
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CALL imm:imm32 [ji: o32 9a id iw] 386,NOLONG
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CALL mem|far [m: odf ff /3] 8086,NOLONG
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CALL mem|far [m: o64 ff /3] X64
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CALL mem16|far [m: o16 ff /3] 8086
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CALL mem32|far [m: o32 ff /3] 386
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CALL mem64|far [m: o64 ff /3] X64
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CALL mem|near [m: odf ff /2] 8086,ND
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CALL mem16|near [m: o16 ff /2] 8086,ND
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CALL mem32|near [m: o32 ff /2] 386,NOLONG,ND
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CALL mem64|near [m: o64nw ff /2] X64,ND
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CALL reg16 [m: o16 ff /2] 8086
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CALL reg32 [m: o32 ff /2] 386,NOLONG
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CALL reg64 [m: o64nw ff /2] X64
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CALL mem [m: odf ff /2] 8086
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CALL mem16 [m: o16 ff /2] 8086
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CALL mem32 [m: o32 ff /2] 386,NOLONG
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CALL mem [m: o64nw ff /2] X64
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CALL mem64 [m: o64nw ff /2] X64
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CBW void [ o16 98] 8086
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CDQ void [ o32 99] 386
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CDQE void [ o64 98] X64
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CLC void [ f8] 8086
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CLD void [ fc] 8086
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CLGI void [ 0f 01 dd] X64,AMD
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CLI void [ fa] 8086
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CLTS void [ 0f 06] 286,PRIV
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CMC void [ f5] 8086
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CMP mem,reg8 [mr: 38 /r] 8086,SM
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CMP reg8,reg8 [mr: 38 /r] 8086
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CMP mem,reg16 [mr: o16 39 /r] 8086,SM
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CMP reg16,reg16 [mr: o16 39 /r] 8086
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CMP mem,reg32 [mr: o32 39 /r] 386,SM
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CMP reg32,reg32 [mr: o32 39 /r] 386
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CMP mem,reg64 [mr: o64 39 /r] X64,SM
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CMP reg64,reg64 [mr: o64 39 /r] X64
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CMP reg8,mem [rm: 3a /r] 8086,SM
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CMP reg8,reg8 [rm: 3a /r] 8086
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CMP reg16,mem [rm: o16 3b /r] 8086,SM
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CMP reg16,reg16 [rm: o16 3b /r] 8086
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CMP reg32,mem [rm: o32 3b /r] 386,SM
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CMP reg32,reg32 [rm: o32 3b /r] 386
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CMP reg64,mem [rm: o64 3b /r] X64,SM
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CMP reg64,reg64 [rm: o64 3b /r] X64
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CMP rm16,imm8 [mi: o16 83 /7 ibx] 8086
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CMP rm32,imm8 [mi: o32 83 /7 ibx] 386
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CMP rm64,imm8 [mi: o64 83 /7 ibx] X64
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CMP reg_al,imm [-i: 3c ib] 8086,SM
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CMP reg_ax,sbyte16 [mi: o16 83 /7 ibx] 8086,SM
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CMP reg_ax,imm [-i: o16 3d iw] 8086,SM
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CMP reg_eax,sbyte32 [mi: o32 83 /7 ibx] 386,SM
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CMP reg_eax,imm [-i: o32 3d id] 386,SM
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CMP reg_rax,sbyte64 [mi: o64 83 /7 ibx] X64,SM
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CMP reg_rax,imm [-i: o64 3d idx] X64,SM
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CMP rm8,imm [mi: 80 /7 ib] 8086,SM
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CMP rm16,imm [mi: o16 81+s /7 ibw] 8086,SM
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CMP rm32,imm [mi: o32 81+s /7 ibd] 386,SM
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CMP rm64,imm [mi: o64 81+s /7 ibd,s] X64,SM
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CMP mem,imm8 [mi: 80 /7 ib] 8086,SM
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CMP mem,imm16 [mi: o16 81+s /7 ibw] 8086,SM
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CMP mem,imm32 [mi: o32 81+s /7 ibd] 386,SM
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CMPSB void [ repe a6] 8086
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CMPSD void [ repe o32 a7] 386
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CMPSQ void [ repe o64 a7] X64
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CMPSW void [ repe o16 a7] 8086
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CMPXCHG mem,reg8 [mr: hle 0f b0 /r] PENT,SM,LOCK
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CMPXCHG reg8,reg8 [mr: 0f b0 /r] PENT
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CMPXCHG mem,reg16 [mr: hle o16 0f b1 /r] PENT,SM,LOCK
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CMPXCHG reg16,reg16 [mr: o16 0f b1 /r] PENT
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CMPXCHG mem,reg32 [mr: hle o32 0f b1 /r] PENT,SM,LOCK
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CMPXCHG reg32,reg32 [mr: o32 0f b1 /r] PENT
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CMPXCHG mem,reg64 [mr: hle o64 0f b1 /r] X64,SM,LOCK
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CMPXCHG reg64,reg64 [mr: o64 0f b1 /r] X64
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CMPXCHG486 mem,reg8 [mr: 0f a6 /r] 486,SM,UNDOC,ND
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CMPXCHG486 reg8,reg8 [mr: 0f a6 /r] 486,UNDOC,ND
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CMPXCHG486 mem,reg16 [mr: o16 0f a7 /r] 486,SM,UNDOC,ND
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CMPXCHG486 reg16,reg16 [mr: o16 0f a7 /r] 486,UNDOC,ND
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CMPXCHG486 mem,reg32 [mr: o32 0f a7 /r] 486,SM,UNDOC,ND
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CMPXCHG486 reg32,reg32 [mr: o32 0f a7 /r] 486,UNDOC,ND
|
|
CMPXCHG8B mem [m: hle 0f c7 /1] PENT,LOCK
|
|
CMPXCHG16B mem [m: hle o64 0f c7 /1] X64,LOCK
|
|
CPUID void [ 0f a2] PENT
|
|
CPU_READ void [ 0f 3d] PENT,CYRIX
|
|
CPU_WRITE void [ 0f 3c] PENT,CYRIX
|
|
CQO void [ o64 99] X64
|
|
CWD void [ o16 99] 8086
|
|
CWDE void [ o32 98] 386
|
|
DAA void [ 27] 8086,NOLONG
|
|
DAS void [ 2f] 8086,NOLONG
|
|
DEC reg16 [r: o16 48+r] 8086,NOLONG
|
|
DEC reg32 [r: o32 48+r] 386,NOLONG
|
|
DEC rm8 [m: hle fe /1] 8086,LOCK
|
|
DEC rm16 [m: hle o16 ff /1] 8086,LOCK
|
|
DEC rm32 [m: hle o32 ff /1] 386,LOCK
|
|
DEC rm64 [m: hle o64 ff /1] X64,LOCK
|
|
DIV rm8 [m: f6 /6] 8086
|
|
DIV rm16 [m: o16 f7 /6] 8086
|
|
DIV rm32 [m: o32 f7 /6] 386
|
|
DIV rm64 [m: o64 f7 /6] X64
|
|
DMINT void [ 0f 39] P6,CYRIX
|
|
EMMS void [ 0f 77] PENT,MMX
|
|
ENTER imm,imm [ij: c8 iw ib,u] 186
|
|
EQU imm ignore 8086
|
|
EQU imm:imm ignore 8086
|
|
F2XM1 void [ d9 f0] 8086,FPU
|
|
FABS void [ d9 e1] 8086,FPU
|
|
FADD mem32 [m: d8 /0] 8086,FPU
|
|
FADD mem64 [m: dc /0] 8086,FPU
|
|
FADD fpureg|to [r: dc c0+r] 8086,FPU
|
|
FADD fpureg [r: d8 c0+r] 8086,FPU
|
|
FADD fpureg,fpu0 [r-: dc c0+r] 8086,FPU
|
|
FADD fpu0,fpureg [-r: d8 c0+r] 8086,FPU
|
|
FADD void [ de c1] 8086,FPU,ND
|
|
FADDP fpureg [r: de c0+r] 8086,FPU
|
|
FADDP fpureg,fpu0 [r-: de c0+r] 8086,FPU
|
|
FADDP void [ de c1] 8086,FPU,ND
|
|
FBLD mem80 [m: df /4] 8086,FPU
|
|
FBLD mem [m: df /4] 8086,FPU
|
|
FBSTP mem80 [m: df /6] 8086,FPU
|
|
FBSTP mem [m: df /6] 8086,FPU
|
|
FCHS void [ d9 e0] 8086,FPU
|
|
FCLEX void [ wait db e2] 8086,FPU
|
|
FCMOVB fpureg [r: da c0+r] P6,FPU
|
|
FCMOVB fpu0,fpureg [-r: da c0+r] P6,FPU
|
|
FCMOVB void [ da c1] P6,FPU,ND
|
|
FCMOVBE fpureg [r: da d0+r] P6,FPU
|
|
FCMOVBE fpu0,fpureg [-r: da d0+r] P6,FPU
|
|
FCMOVBE void [ da d1] P6,FPU,ND
|
|
FCMOVE fpureg [r: da c8+r] P6,FPU
|
|
FCMOVE fpu0,fpureg [-r: da c8+r] P6,FPU
|
|
FCMOVE void [ da c9] P6,FPU,ND
|
|
FCMOVNB fpureg [r: db c0+r] P6,FPU
|
|
FCMOVNB fpu0,fpureg [-r: db c0+r] P6,FPU
|
|
FCMOVNB void [ db c1] P6,FPU,ND
|
|
FCMOVNBE fpureg [r: db d0+r] P6,FPU
|
|
FCMOVNBE fpu0,fpureg [-r: db d0+r] P6,FPU
|
|
FCMOVNBE void [ db d1] P6,FPU,ND
|
|
FCMOVNE fpureg [r: db c8+r] P6,FPU
|
|
FCMOVNE fpu0,fpureg [-r: db c8+r] P6,FPU
|
|
FCMOVNE void [ db c9] P6,FPU,ND
|
|
FCMOVNU fpureg [r: db d8+r] P6,FPU
|
|
FCMOVNU fpu0,fpureg [-r: db d8+r] P6,FPU
|
|
FCMOVNU void [ db d9] P6,FPU,ND
|
|
FCMOVU fpureg [r: da d8+r] P6,FPU
|
|
FCMOVU fpu0,fpureg [-r: da d8+r] P6,FPU
|
|
FCMOVU void [ da d9] P6,FPU,ND
|
|
FCOM mem32 [m: d8 /2] 8086,FPU
|
|
FCOM mem64 [m: dc /2] 8086,FPU
|
|
FCOM fpureg [r: d8 d0+r] 8086,FPU
|
|
FCOM fpu0,fpureg [-r: d8 d0+r] 8086,FPU
|
|
FCOM void [ d8 d1] 8086,FPU,ND
|
|
FCOMI fpureg [r: db f0+r] P6,FPU
|
|
FCOMI fpu0,fpureg [-r: db f0+r] P6,FPU
|
|
FCOMI void [ db f1] P6,FPU,ND
|
|
FCOMIP fpureg [r: df f0+r] P6,FPU
|
|
FCOMIP fpu0,fpureg [-r: df f0+r] P6,FPU
|
|
FCOMIP void [ df f1] P6,FPU,ND
|
|
FCOMP mem32 [m: d8 /3] 8086,FPU
|
|
FCOMP mem64 [m: dc /3] 8086,FPU
|
|
FCOMP fpureg [r: d8 d8+r] 8086,FPU
|
|
FCOMP fpu0,fpureg [-r: d8 d8+r] 8086,FPU
|
|
FCOMP void [ d8 d9] 8086,FPU,ND
|
|
FCOMPP void [ de d9] 8086,FPU
|
|
FCOS void [ d9 ff] 386,FPU
|
|
FDECSTP void [ d9 f6] 8086,FPU
|
|
FDISI void [ wait db e1] 8086,FPU
|
|
FDIV mem32 [m: d8 /6] 8086,FPU
|
|
FDIV mem64 [m: dc /6] 8086,FPU
|
|
FDIV fpureg|to [r: dc f8+r] 8086,FPU
|
|
FDIV fpureg [r: d8 f0+r] 8086,FPU
|
|
FDIV fpureg,fpu0 [r-: dc f8+r] 8086,FPU
|
|
FDIV fpu0,fpureg [-r: d8 f0+r] 8086,FPU
|
|
FDIV void [ de f9] 8086,FPU,ND
|
|
FDIVP fpureg [r: de f8+r] 8086,FPU
|
|
FDIVP fpureg,fpu0 [r-: de f8+r] 8086,FPU
|
|
FDIVP void [ de f9] 8086,FPU,ND
|
|
FDIVR mem32 [m: d8 /7] 8086,FPU
|
|
FDIVR mem64 [m: dc /7] 8086,FPU
|
|
FDIVR fpureg|to [r: dc f0+r] 8086,FPU
|
|
FDIVR fpureg,fpu0 [r-: dc f0+r] 8086,FPU
|
|
FDIVR fpureg [r: d8 f8+r] 8086,FPU
|
|
FDIVR fpu0,fpureg [-r: d8 f8+r] 8086,FPU
|
|
FDIVR void [ de f1] 8086,FPU,ND
|
|
FDIVRP fpureg [r: de f0+r] 8086,FPU
|
|
FDIVRP fpureg,fpu0 [r-: de f0+r] 8086,FPU
|
|
FDIVRP void [ de f1] 8086,FPU,ND
|
|
FEMMS void [ 0f 0e] PENT,3DNOW
|
|
FENI void [ wait db e0] 8086,FPU
|
|
FFREE fpureg [r: dd c0+r] 8086,FPU
|
|
FFREE void [ dd c1] 8086,FPU
|
|
FFREEP fpureg [r: df c0+r] 286,FPU,UNDOC
|
|
FFREEP void [ df c1] 286,FPU,UNDOC
|
|
FIADD mem32 [m: da /0] 8086,FPU
|
|
FIADD mem16 [m: de /0] 8086,FPU
|
|
FICOM mem32 [m: da /2] 8086,FPU
|
|
FICOM mem16 [m: de /2] 8086,FPU
|
|
FICOMP mem32 [m: da /3] 8086,FPU
|
|
FICOMP mem16 [m: de /3] 8086,FPU
|
|
FIDIV mem32 [m: da /6] 8086,FPU
|
|
FIDIV mem16 [m: de /6] 8086,FPU
|
|
FIDIVR mem32 [m: da /7] 8086,FPU
|
|
FIDIVR mem16 [m: de /7] 8086,FPU
|
|
FILD mem32 [m: db /0] 8086,FPU
|
|
FILD mem16 [m: df /0] 8086,FPU
|
|
FILD mem64 [m: df /5] 8086,FPU
|
|
FIMUL mem32 [m: da /1] 8086,FPU
|
|
FIMUL mem16 [m: de /1] 8086,FPU
|
|
FINCSTP void [ d9 f7] 8086,FPU
|
|
FINIT void [ wait db e3] 8086,FPU
|
|
FIST mem32 [m: db /2] 8086,FPU
|
|
FIST mem16 [m: df /2] 8086,FPU
|
|
FISTP mem32 [m: db /3] 8086,FPU
|
|
FISTP mem16 [m: df /3] 8086,FPU
|
|
FISTP mem64 [m: df /7] 8086,FPU
|
|
FISTTP mem16 [m: df /1] PRESCOTT,FPU
|
|
FISTTP mem32 [m: db /1] PRESCOTT,FPU
|
|
FISTTP mem64 [m: dd /1] PRESCOTT,FPU
|
|
FISUB mem32 [m: da /4] 8086,FPU
|
|
FISUB mem16 [m: de /4] 8086,FPU
|
|
FISUBR mem32 [m: da /5] 8086,FPU
|
|
FISUBR mem16 [m: de /5] 8086,FPU
|
|
FLD mem32 [m: d9 /0] 8086,FPU
|
|
FLD mem64 [m: dd /0] 8086,FPU
|
|
FLD mem80 [m: db /5] 8086,FPU
|
|
FLD fpureg [r: d9 c0+r] 8086,FPU
|
|
FLD void [ d9 c1] 8086,FPU,ND
|
|
FLD1 void [ d9 e8] 8086,FPU
|
|
FLDCW mem [m: d9 /5] 8086,FPU,SW
|
|
FLDENV mem [m: d9 /4] 8086,FPU
|
|
FLDL2E void [ d9 ea] 8086,FPU
|
|
FLDL2T void [ d9 e9] 8086,FPU
|
|
FLDLG2 void [ d9 ec] 8086,FPU
|
|
FLDLN2 void [ d9 ed] 8086,FPU
|
|
FLDPI void [ d9 eb] 8086,FPU
|
|
FLDZ void [ d9 ee] 8086,FPU
|
|
FMUL mem32 [m: d8 /1] 8086,FPU
|
|
FMUL mem64 [m: dc /1] 8086,FPU
|
|
FMUL fpureg|to [r: dc c8+r] 8086,FPU
|
|
FMUL fpureg,fpu0 [r-: dc c8+r] 8086,FPU
|
|
FMUL fpureg [r: d8 c8+r] 8086,FPU
|
|
FMUL fpu0,fpureg [-r: d8 c8+r] 8086,FPU
|
|
FMUL void [ de c9] 8086,FPU,ND
|
|
FMULP fpureg [r: de c8+r] 8086,FPU
|
|
FMULP fpureg,fpu0 [r-: de c8+r] 8086,FPU
|
|
FMULP void [ de c9] 8086,FPU,ND
|
|
FNCLEX void [ db e2] 8086,FPU
|
|
FNDISI void [ db e1] 8086,FPU
|
|
FNENI void [ db e0] 8086,FPU
|
|
FNINIT void [ db e3] 8086,FPU
|
|
FNOP void [ d9 d0] 8086,FPU
|
|
FNSAVE mem [m: dd /6] 8086,FPU
|
|
FNSTCW mem [m: d9 /7] 8086,FPU,SW
|
|
FNSTENV mem [m: d9 /6] 8086,FPU
|
|
FNSTSW mem [m: dd /7] 8086,FPU,SW
|
|
FNSTSW reg_ax [-: df e0] 286,FPU
|
|
FPATAN void [ d9 f3] 8086,FPU
|
|
FPREM void [ d9 f8] 8086,FPU
|
|
FPREM1 void [ d9 f5] 386,FPU
|
|
FPTAN void [ d9 f2] 8086,FPU
|
|
FRNDINT void [ d9 fc] 8086,FPU
|
|
FRSTOR mem [m: dd /4] 8086,FPU
|
|
FSAVE mem [m: wait dd /6] 8086,FPU
|
|
FSCALE void [ d9 fd] 8086,FPU
|
|
FSETPM void [ db e4] 286,FPU
|
|
FSIN void [ d9 fe] 386,FPU
|
|
FSINCOS void [ d9 fb] 386,FPU
|
|
FSQRT void [ d9 fa] 8086,FPU
|
|
FST mem32 [m: d9 /2] 8086,FPU
|
|
FST mem64 [m: dd /2] 8086,FPU
|
|
FST fpureg [r: dd d0+r] 8086,FPU
|
|
FST void [ dd d1] 8086,FPU,ND
|
|
FSTCW mem [m: wait d9 /7] 8086,FPU,SW
|
|
FSTENV mem [m: wait d9 /6] 8086,FPU
|
|
FSTP mem32 [m: d9 /3] 8086,FPU
|
|
FSTP mem64 [m: dd /3] 8086,FPU
|
|
FSTP mem80 [m: db /7] 8086,FPU
|
|
FSTP fpureg [r: dd d8+r] 8086,FPU
|
|
FSTP void [ dd d9] 8086,FPU,ND
|
|
FSTSW mem [m: wait dd /7] 8086,FPU,SW
|
|
FSTSW reg_ax [-: wait df e0] 286,FPU
|
|
FSUB mem32 [m: d8 /4] 8086,FPU
|
|
FSUB mem64 [m: dc /4] 8086,FPU
|
|
FSUB fpureg|to [r: dc e8+r] 8086,FPU
|
|
FSUB fpureg,fpu0 [r-: dc e8+r] 8086,FPU
|
|
FSUB fpureg [r: d8 e0+r] 8086,FPU
|
|
FSUB fpu0,fpureg [-r: d8 e0+r] 8086,FPU
|
|
FSUB void [ de e9] 8086,FPU,ND
|
|
FSUBP fpureg [r: de e8+r] 8086,FPU
|
|
FSUBP fpureg,fpu0 [r-: de e8+r] 8086,FPU
|
|
FSUBP void [ de e9] 8086,FPU,ND
|
|
FSUBR mem32 [m: d8 /5] 8086,FPU
|
|
FSUBR mem64 [m: dc /5] 8086,FPU
|
|
FSUBR fpureg|to [r: dc e0+r] 8086,FPU
|
|
FSUBR fpureg,fpu0 [r-: dc e0+r] 8086,FPU
|
|
FSUBR fpureg [r: d8 e8+r] 8086,FPU
|
|
FSUBR fpu0,fpureg [-r: d8 e8+r] 8086,FPU
|
|
FSUBR void [ de e1] 8086,FPU,ND
|
|
FSUBRP fpureg [r: de e0+r] 8086,FPU
|
|
FSUBRP fpureg,fpu0 [r-: de e0+r] 8086,FPU
|
|
FSUBRP void [ de e1] 8086,FPU,ND
|
|
FTST void [ d9 e4] 8086,FPU
|
|
FUCOM fpureg [r: dd e0+r] 386,FPU
|
|
FUCOM fpu0,fpureg [-r: dd e0+r] 386,FPU
|
|
FUCOM void [ dd e1] 386,FPU,ND
|
|
FUCOMI fpureg [r: db e8+r] P6,FPU
|
|
FUCOMI fpu0,fpureg [-r: db e8+r] P6,FPU
|
|
FUCOMI void [ db e9] P6,FPU,ND
|
|
FUCOMIP fpureg [r: df e8+r] P6,FPU
|
|
FUCOMIP fpu0,fpureg [-r: df e8+r] P6,FPU
|
|
FUCOMIP void [ df e9] P6,FPU,ND
|
|
FUCOMP fpureg [r: dd e8+r] 386,FPU
|
|
FUCOMP fpu0,fpureg [-r: dd e8+r] 386,FPU
|
|
FUCOMP void [ dd e9] 386,FPU,ND
|
|
FUCOMPP void [ da e9] 386,FPU
|
|
FXAM void [ d9 e5] 8086,FPU
|
|
FXCH fpureg [r: d9 c8+r] 8086,FPU
|
|
FXCH fpureg,fpu0 [r-: d9 c8+r] 8086,FPU
|
|
FXCH fpu0,fpureg [-r: d9 c8+r] 8086,FPU
|
|
FXCH void [ d9 c9] 8086,FPU,ND
|
|
FXTRACT void [ d9 f4] 8086,FPU
|
|
FYL2X void [ d9 f1] 8086,FPU
|
|
FYL2XP1 void [ d9 f9] 8086,FPU
|
|
HLT void [ f4] 8086,PRIV
|
|
IBTS mem,reg16 [mr: o16 0f a7 /r] 386,SW,UNDOC,ND
|
|
IBTS reg16,reg16 [mr: o16 0f a7 /r] 386,UNDOC,ND
|
|
IBTS mem,reg32 [mr: o32 0f a7 /r] 386,SD,UNDOC,ND
|
|
IBTS reg32,reg32 [mr: o32 0f a7 /r] 386,UNDOC,ND
|
|
ICEBP void [ f1] 386,ND
|
|
IDIV rm8 [m: f6 /7] 8086
|
|
IDIV rm16 [m: o16 f7 /7] 8086
|
|
IDIV rm32 [m: o32 f7 /7] 386
|
|
IDIV rm64 [m: o64 f7 /7] X64
|
|
IMUL rm8 [m: f6 /5] 8086
|
|
IMUL rm16 [m: o16 f7 /5] 8086
|
|
IMUL rm32 [m: o32 f7 /5] 386
|
|
IMUL rm64 [m: o64 f7 /5] X64
|
|
IMUL reg16,mem [rm: o16 0f af /r] 386,SM
|
|
IMUL reg16,reg16 [rm: o16 0f af /r] 386
|
|
IMUL reg32,mem [rm: o32 0f af /r] 386,SM
|
|
IMUL reg32,reg32 [rm: o32 0f af /r] 386
|
|
IMUL reg64,mem [rm: o64 0f af /r] X64,SM
|
|
IMUL reg64,reg64 [rm: o64 0f af /r] X64
|
|
IMUL reg16,mem,imm8 [rmi: o16 6b /r ib,s] 186,SM
|
|
IMUL reg16,mem,sbyte16 [rmi: o16 6b /r ib,s] 186,SM,ND
|
|
IMUL reg16,mem,imm16 [rmi: o16 69 /r iw] 186,SM
|
|
IMUL reg16,mem,imm [rmi: o16 69+s /r ibw] 186,SM,ND
|
|
IMUL reg16,reg16,imm8 [rmi: o16 6b /r ib,s] 186
|
|
IMUL reg16,reg16,sbyte16 [rmi: o16 6b /r ib,s] 186,SM,ND
|
|
IMUL reg16,reg16,imm16 [rmi: o16 69 /r iw] 186
|
|
IMUL reg16,reg16,imm [rmi: o16 69+s /r ibw] 186,SM,ND
|
|
IMUL reg32,mem,imm8 [rmi: o32 6b /r ib,s] 386,SM
|
|
IMUL reg32,mem,sbyte32 [rmi: o32 6b /r ib,s] 386,SM,ND
|
|
IMUL reg32,mem,imm32 [rmi: o32 69 /r id] 386,SM
|
|
IMUL reg32,mem,imm [rmi: o32 69+s /r ibd] 386,SM,ND
|
|
IMUL reg32,reg32,imm8 [rmi: o32 6b /r ib,s] 386
|
|
IMUL reg32,reg32,sbyte32 [rmi: o32 6b /r ib,s] 386,SM,ND
|
|
IMUL reg32,reg32,imm32 [rmi: o32 69 /r id] 386
|
|
IMUL reg32,reg32,imm [rmi: o32 69+s /r ibd] 386,SM,ND
|
|
IMUL reg64,mem,imm8 [rmi: o64 6b /r ib,s] X64,SM
|
|
IMUL reg64,mem,sbyte64 [rmi: o64 6b /r ib,s] X64,SM,ND
|
|
IMUL reg64,mem,imm32 [rmi: o64 69 /r id] X64,SM
|
|
IMUL reg64,mem,imm [rmi: o64 69+s /r ibd,s] X64,SM,ND
|
|
IMUL reg64,reg64,imm8 [rmi: o64 6b /r ib,s] X64
|
|
IMUL reg64,reg64,sbyte64 [rmi: o64 6b /r ib,s] X64,SM,ND
|
|
IMUL reg64,reg64,imm32 [rmi: o64 69 /r id] X64
|
|
IMUL reg64,reg64,imm [rmi: o64 69+s /r ibd,s] X64,SM,ND
|
|
IMUL reg16,imm8 [r+mi: o16 6b /r ib,s] 186
|
|
IMUL reg16,sbyte16 [r+mi: o16 6b /r ib,s] 186,SM,ND
|
|
IMUL reg16,imm16 [r+mi: o16 69 /r iw] 186
|
|
IMUL reg16,imm [r+mi: o16 69+s /r ibw] 186,SM,ND
|
|
IMUL reg32,imm8 [r+mi: o32 6b /r ib,s] 386
|
|
IMUL reg32,sbyte32 [r+mi: o32 6b /r ib,s] 386,SM,ND
|
|
IMUL reg32,imm32 [r+mi: o32 69 /r id] 386
|
|
IMUL reg32,imm [r+mi: o32 69+s /r ibd] 386,SM,ND
|
|
IMUL reg64,imm8 [r+mi: o64 6b /r ib,s] X64
|
|
IMUL reg64,sbyte64 [r+mi: o64 6b /r ib,s] X64,SM,ND
|
|
IMUL reg64,imm32 [r+mi: o64 69 /r idx] X64
|
|
IMUL reg64,imm [r+mi: o64 69+s /r ibd,s] X64,SM,ND
|
|
IN reg_al,imm [-i: e4 ib,u] 8086,SB
|
|
IN reg_ax,imm [-i: o16 e5 ib,u] 8086,SB
|
|
IN reg_eax,imm [-i: o32 e5 ib,u] 386,SB
|
|
IN reg_al,reg_dx [--: ec] 8086
|
|
IN reg_ax,reg_dx [--: o16 ed] 8086
|
|
IN reg_eax,reg_dx [--: o32 ed] 386
|
|
INC reg16 [r: o16 40+r] 8086,NOLONG
|
|
INC reg32 [r: o32 40+r] 386,NOLONG
|
|
INC rm8 [m: hle fe /0] 8086,LOCK
|
|
INC rm16 [m: hle o16 ff /0] 8086,LOCK
|
|
INC rm32 [m: hle o32 ff /0] 386,LOCK
|
|
INC rm64 [m: hle o64 ff /0] X64,LOCK
|
|
INCBIN ignore ignore ignore
|
|
INSB void [ 6c] 186
|
|
INSD void [ o32 6d] 386
|
|
INSW void [ o16 6d] 186
|
|
INT imm [i: cd ib,u] 8086,SB
|
|
INT01 void [ f1] 386,ND
|
|
INT1 void [ f1] 386
|
|
INT03 void [ cc] 8086,ND
|
|
INT3 void [ cc] 8086
|
|
INTO void [ ce] 8086,NOLONG
|
|
INVD void [ 0f 08] 486,PRIV
|
|
INVPCID reg32,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,NOLONG
|
|
INVPCID reg64,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,LONG
|
|
INVLPG mem [m: 0f 01 /7] 486,PRIV
|
|
INVLPGA reg_ax,reg_ecx [--: a16 0f 01 df] X86_64,AMD,NOLONG
|
|
INVLPGA reg_eax,reg_ecx [--: a32 0f 01 df] X86_64,AMD
|
|
INVLPGA reg_rax,reg_ecx [--: o64nw a64 0f 01 df] X64,AMD
|
|
INVLPGA void [ 0f 01 df] X86_64,AMD
|
|
IRET void [ odf cf] 8086
|
|
IRETD void [ o32 cf] 386
|
|
IRETQ void [ o64 cf] X64
|
|
IRETW void [ o16 cf] 8086
|
|
JCXZ imm [i: a16 e3 rel8] 8086,NOLONG
|
|
JECXZ imm [i: a32 e3 rel8] 386
|
|
JRCXZ imm [i: a64 e3 rel8] X64
|
|
JMP imm|short [i: eb rel8] 8086
|
|
JMP imm [i: jmp8 eb rel8] 8086,ND
|
|
JMP imm [i: odf e9 rel] 8086
|
|
JMP imm|near [i: odf e9 rel] 8086,ND
|
|
JMP imm|far [i: odf ea iwd seg] 8086,ND,NOLONG
|
|
JMP imm16 [i: o16 e9 rel] 8086
|
|
JMP imm16|near [i: o16 e9 rel] 8086,ND
|
|
JMP imm16|far [i: o16 ea iwd seg] 8086,ND,NOLONG
|
|
JMP imm32 [i: o32 e9 rel] 386
|
|
JMP imm32|near [i: o32 e9 rel] 386,ND
|
|
JMP imm32|far [i: o32 ea iwd seg] 386,ND,NOLONG
|
|
JMP imm:imm [ji: odf ea iwd iw] 8086,NOLONG
|
|
JMP imm16:imm [ji: o16 ea iw iw] 8086,NOLONG
|
|
JMP imm:imm16 [ji: o16 ea iw iw] 8086,NOLONG
|
|
JMP imm32:imm [ji: o32 ea id iw] 386,NOLONG
|
|
JMP imm:imm32 [ji: o32 ea id iw] 386,NOLONG
|
|
JMP mem|far [m: odf ff /5] 8086,NOLONG
|
|
JMP mem|far [m: o64 ff /5] X64
|
|
JMP mem16|far [m: o16 ff /5] 8086
|
|
JMP mem32|far [m: o32 ff /5] 386
|
|
JMP mem64|far [m: o64 ff /5] X64
|
|
JMP mem|near [m: odf ff /4] 8086,ND
|
|
JMP mem16|near [m: o16 ff /4] 8086,ND
|
|
JMP mem32|near [m: o32 ff /4] 386,NOLONG,ND
|
|
JMP mem64|near [m: o64nw ff /4] X64,ND
|
|
JMP reg16 [m: o16 ff /4] 8086
|
|
JMP reg32 [m: o32 ff /4] 386,NOLONG
|
|
JMP reg64 [m: o64nw ff /4] X64
|
|
JMP mem [m: odf ff /4] 8086
|
|
JMP mem16 [m: o16 ff /4] 8086
|
|
JMP mem32 [m: o32 ff /4] 386,NOLONG
|
|
JMP mem [m: o64nw ff /4] X64
|
|
JMP mem64 [m: o64nw ff /4] X64
|
|
JMPE imm [i: odf 0f b8 rel] IA64
|
|
JMPE imm16 [i: o16 0f b8 rel] IA64
|
|
JMPE imm32 [i: o32 0f b8 rel] IA64
|
|
JMPE rm16 [m: o16 0f 00 /6] IA64
|
|
JMPE rm32 [m: o32 0f 00 /6] IA64
|
|
LAHF void [ 9f] 8086
|
|
LAR reg16,mem [rm: o16 0f 02 /r] 286,PROT,SW
|
|
LAR reg16,reg16 [rm: o16 0f 02 /r] 286,PROT
|
|
LAR reg16,reg32 [rm: o16 0f 02 /r] 386,PROT
|
|
LAR reg16,reg64 [rm: o16 o64nw 0f 02 /r] X64,PROT,ND
|
|
LAR reg32,mem [rm: o32 0f 02 /r] 386,PROT,SW
|
|
LAR reg32,reg16 [rm: o32 0f 02 /r] 386,PROT
|
|
LAR reg32,reg32 [rm: o32 0f 02 /r] 386,PROT
|
|
LAR reg32,reg64 [rm: o32 o64nw 0f 02 /r] X64,PROT,ND
|
|
LAR reg64,mem [rm: o64 0f 02 /r] X64,PROT,SW
|
|
LAR reg64,reg16 [rm: o64 0f 02 /r] X64,PROT
|
|
LAR reg64,reg32 [rm: o64 0f 02 /r] X64,PROT
|
|
LAR reg64,reg64 [rm: o64 0f 02 /r] X64,PROT
|
|
LDS reg16,mem [rm: o16 c5 /r] 8086,NOLONG
|
|
LDS reg32,mem [rm: o32 c5 /r] 386,NOLONG
|
|
LEA reg16,mem [rm: o16 8d /r] 8086
|
|
LEA reg32,mem [rm: o32 8d /r] 386
|
|
LEA reg64,mem [rm: o64 8d /r] X64
|
|
LEAVE void [ c9] 186
|
|
LES reg16,mem [rm: o16 c4 /r] 8086,NOLONG
|
|
LES reg32,mem [rm: o32 c4 /r] 386,NOLONG
|
|
LFENCE void [ 0f ae e8] X64,AMD
|
|
LFS reg16,mem [rm: o16 0f b4 /r] 386
|
|
LFS reg32,mem [rm: o32 0f b4 /r] 386
|
|
LFS reg64,mem [rm: o64 0f b4 /r] X64
|
|
LGDT mem [m: 0f 01 /2] 286,PRIV
|
|
LGS reg16,mem [rm: o16 0f b5 /r] 386
|
|
LGS reg32,mem [rm: o32 0f b5 /r] 386
|
|
LGS reg64,mem [rm: o64 0f b5 /r] X64
|
|
LIDT mem [m: 0f 01 /3] 286,PRIV
|
|
LLDT mem [m: 0f 00 /2] 286,PROT,PRIV
|
|
LLDT mem16 [m: 0f 00 /2] 286,PROT,PRIV
|
|
LLDT reg16 [m: 0f 00 /2] 286,PROT,PRIV
|
|
LMSW mem [m: 0f 01 /6] 286,PRIV
|
|
LMSW mem16 [m: 0f 01 /6] 286,PRIV
|
|
LMSW reg16 [m: 0f 01 /6] 286,PRIV
|
|
LOADALL void [ 0f 07] 386,UNDOC
|
|
LOADALL286 void [ 0f 05] 286,UNDOC
|
|
LODSB void [ ac] 8086
|
|
LODSD void [ o32 ad] 386
|
|
LODSQ void [ o64 ad] X64
|
|
LODSW void [ o16 ad] 8086
|
|
LOOP imm [i: adf e2 rel8] 8086
|
|
LOOP imm,reg_cx [i-: a16 e2 rel8] 8086,NOLONG
|
|
LOOP imm,reg_ecx [i-: a32 e2 rel8] 386
|
|
LOOP imm,reg_rcx [i-: a64 e2 rel8] X64
|
|
LOOPE imm [i: adf e1 rel8] 8086
|
|
LOOPE imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
|
|
LOOPE imm,reg_ecx [i-: a32 e1 rel8] 386
|
|
LOOPE imm,reg_rcx [i-: a64 e1 rel8] X64
|
|
LOOPNE imm [i: adf e0 rel8] 8086
|
|
LOOPNE imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
|
|
LOOPNE imm,reg_ecx [i-: a32 e0 rel8] 386
|
|
LOOPNE imm,reg_rcx [i-: a64 e0 rel8] X64
|
|
LOOPNZ imm [i: adf e0 rel8] 8086
|
|
LOOPNZ imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
|
|
LOOPNZ imm,reg_ecx [i-: a32 e0 rel8] 386
|
|
LOOPNZ imm,reg_rcx [i-: a64 e0 rel8] X64
|
|
LOOPZ imm [i: adf e1 rel8] 8086
|
|
LOOPZ imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
|
|
LOOPZ imm,reg_ecx [i-: a32 e1 rel8] 386
|
|
LOOPZ imm,reg_rcx [i-: a64 e1 rel8] X64
|
|
LSL reg16,mem [rm: o16 0f 03 /r] 286,PROT,SW
|
|
LSL reg16,reg16 [rm: o16 0f 03 /r] 286,PROT
|
|
LSL reg16,reg32 [rm: o16 0f 03 /r] 386,PROT
|
|
LSL reg16,reg64 [rm: o16 o64nw 0f 03 /r] X64,PROT,ND
|
|
LSL reg32,mem [rm: o32 0f 03 /r] 386,PROT,SW
|
|
LSL reg32,reg16 [rm: o32 0f 03 /r] 386,PROT
|
|
LSL reg32,reg32 [rm: o32 0f 03 /r] 386,PROT
|
|
LSL reg32,reg64 [rm: o32 o64nw 0f 03 /r] X64,PROT,ND
|
|
LSL reg64,mem [rm: o64 0f 03 /r] X64,PROT,SW
|
|
LSL reg64,reg16 [rm: o64 0f 03 /r] X64,PROT
|
|
LSL reg64,reg32 [rm: o64 0f 03 /r] X64,PROT
|
|
LSL reg64,reg64 [rm: o64 0f 03 /r] X64,PROT
|
|
LSS reg16,mem [rm: o16 0f b2 /r] 386
|
|
LSS reg32,mem [rm: o32 0f b2 /r] 386
|
|
LSS reg64,mem [rm: o64 0f b2 /r] X64
|
|
LTR mem [m: 0f 00 /3] 286,PROT,PRIV
|
|
LTR mem16 [m: 0f 00 /3] 286,PROT,PRIV
|
|
LTR reg16 [m: 0f 00 /3] 286,PROT,PRIV
|
|
MFENCE void [ 0f ae f0] X64,AMD
|
|
MONITOR void [ 0f 01 c8] PRESCOTT
|
|
MONITOR reg_eax,reg_ecx,reg_edx [---: 0f 01 c8] PRESCOTT,ND
|
|
MONITOR reg_rax,reg_ecx,reg_edx [---: 0f 01 c8] X64,ND
|
|
MOV mem,reg_sreg [mr: 8c /r] 8086,SW
|
|
MOV reg16,reg_sreg [mr: o16 8c /r] 8086
|
|
MOV reg32,reg_sreg [mr: o32 8c /r] 386
|
|
MOV reg64,reg_sreg [mr: o64nw 8c /r] X64,OPT,ND
|
|
MOV rm64,reg_sreg [mr: o64 8c /r] X64
|
|
MOV reg_sreg,mem [rm: 8e /r] 8086,SW
|
|
MOV reg_sreg,reg16 [rm: 8e /r] 8086,OPT,ND
|
|
MOV reg_sreg,reg32 [rm: 8e /r] 386,OPT,ND
|
|
MOV reg_sreg,reg64 [rm: o64nw 8e /r] X64,OPT,ND
|
|
MOV reg_sreg,reg16 [rm: o16 8e /r] 8086
|
|
MOV reg_sreg,reg32 [rm: o32 8e /r] 386
|
|
MOV reg_sreg,rm64 [rm: o64 8e /r] X64
|
|
MOV reg_al,mem_offs [-i: a0 iwdq] 8086,SM
|
|
MOV reg_ax,mem_offs [-i: o16 a1 iwdq] 8086,SM
|
|
MOV reg_eax,mem_offs [-i: o32 a1 iwdq] 386,SM
|
|
MOV reg_rax,mem_offs [-i: o64 a1 iwdq] X64,SM
|
|
MOV mem_offs,reg_al [i-: nohle a2 iwdq] 8086,SM
|
|
MOV mem_offs,reg_ax [i-: nohle o16 a3 iwdq] 8086,SM
|
|
MOV mem_offs,reg_eax [i-: nohle o32 a3 iwdq] 386,SM
|
|
MOV mem_offs,reg_rax [i-: nohle o64 a3 iwdq] X64,SM
|
|
MOV reg32,reg_creg [mr: rex.l 0f 20 /r] 386,PRIV,NOLONG
|
|
MOV reg64,reg_creg [mr: o64nw 0f 20 /r] X64,PRIV
|
|
MOV reg_creg,reg32 [rm: rex.l 0f 22 /r] 386,PRIV,NOLONG
|
|
MOV reg_creg,reg64 [rm: o64nw 0f 22 /r] X64,PRIV
|
|
MOV reg32,reg_dreg [mr: 0f 21 /r] 386,PRIV,NOLONG
|
|
MOV reg64,reg_dreg [mr: o64nw 0f 21 /r] X64,PRIV
|
|
MOV reg_dreg,reg32 [rm: 0f 23 /r] 386,PRIV,NOLONG
|
|
MOV reg_dreg,reg64 [rm: o64nw 0f 23 /r] X64,PRIV
|
|
MOV reg32,reg_treg [mr: 0f 24 /r] 386,NOLONG,ND
|
|
MOV reg_treg,reg32 [rm: 0f 26 /r] 386,NOLONG,ND
|
|
MOV mem,reg8 [mr: hlexr 88 /r] 8086,SM,LOCK
|
|
MOV reg8,reg8 [mr: 88 /r] 8086
|
|
MOV mem,reg16 [mr: hlexr o16 89 /r] 8086,SM,LOCK
|
|
MOV reg16,reg16 [mr: o16 89 /r] 8086
|
|
MOV mem,reg32 [mr: hlexr o32 89 /r] 386,SM,LOCK
|
|
MOV reg32,reg32 [mr: o32 89 /r] 386
|
|
MOV mem,reg64 [mr: hlexr o64 89 /r] X64,SM,LOCK
|
|
MOV reg64,reg64 [mr: o64 89 /r] X64
|
|
MOV reg8,mem [rm: 8a /r] 8086,SM
|
|
MOV reg8,reg8 [rm: 8a /r] 8086
|
|
MOV reg16,mem [rm: o16 8b /r] 8086,SM
|
|
MOV reg16,reg16 [rm: o16 8b /r] 8086
|
|
MOV reg32,mem [rm: o32 8b /r] 386,SM
|
|
MOV reg32,reg32 [rm: o32 8b /r] 386
|
|
MOV reg64,mem [rm: o64 8b /r] X64,SM
|
|
MOV reg64,reg64 [rm: o64 8b /r] X64
|
|
MOV reg8,imm [ri: b0+r ib] 8086,SM
|
|
MOV reg16,imm [ri: o16 b8+r iw] 8086,SM
|
|
MOV reg32,imm [ri: o32 b8+r id] 386,SM
|
|
MOV reg64,udword64 [ri: o64nw b8+r id] X64,SM,OPT,ND
|
|
MOV reg64,sdword64 [mi: o64 c7 /0 idx] X64,SM,OPT,ND
|
|
MOV reg64,imm [ri: o64 b8+r iq] X64,SM
|
|
MOV rm8,imm [mi: hlexr c6 /0 ib] 8086,SM
|
|
MOV rm16,imm [mi: hlexr o16 c7 /0 iw] 8086,SM
|
|
MOV rm32,imm [mi: hlexr o32 c7 /0 id] 386,SM
|
|
MOV rm64,imm [mi: hlexr o64 c7 /0 idx] X64,SM
|
|
MOV rm64,imm32 [mi: hlexr o64 c7 /0 idx] X64
|
|
MOV mem,imm8 [mi: hlexr c6 /0 ib] 8086,SM
|
|
MOV mem,imm16 [mi: hlexr o16 c7 /0 iw] 8086,SM
|
|
MOV mem,imm32 [mi: hlexr o32 c7 /0 id] 386,SM
|
|
MOVD mmxreg,rm32 [rm: np 0f 6e /r] PENT,MMX
|
|
MOVD rm32,mmxreg [mr: np 0f 7e /r] PENT,MMX
|
|
MOVD xmmreg,rm32 [rm: np o16 0f 6e /r] SSE2
|
|
MOVD rm32,xmmreg [mr: np o16 0f 7e /r] SSE2
|
|
MOVQ mmxreg,mmxrm [rm: np o64nw 0f 6f /r] PENT,MMX,SQ
|
|
MOVQ mmxrm,mmxreg [mr: np o64nw 0f 7f /r] PENT,MMX,SQ
|
|
MOVQ mmxreg,rm64 [rm: np 0f 6e /r] X64,MMX
|
|
MOVQ rm64,mmxreg [mr: np 0f 7e /r] X64,MMX
|
|
MOVSB void [ a4] 8086
|
|
MOVSD void [ o32 a5] 386
|
|
MOVSQ void [ o64 a5] X64
|
|
MOVSW void [ o16 a5] 8086
|
|
MOVSX reg16,mem [rm: o16 0f be /r] 386,SB
|
|
MOVSX reg16,reg8 [rm: o16 0f be /r] 386
|
|
MOVSX reg32,rm8 [rm: o32 0f be /r] 386
|
|
MOVSX reg32,rm16 [rm: o32 0f bf /r] 386
|
|
MOVSX reg64,rm8 [rm: o64 0f be /r] X64
|
|
MOVSX reg64,rm16 [rm: o64 0f bf /r] X64
|
|
MOVSXD reg64,rm32 [rm: o64 63 /r] X64
|
|
MOVSX reg64,rm32 [rm: o64 63 /r] X64,ND
|
|
MOVZX reg16,mem [rm: o16 0f b6 /r] 386,SB
|
|
MOVZX reg16,reg8 [rm: o16 0f b6 /r] 386
|
|
MOVZX reg32,rm8 [rm: o32 0f b6 /r] 386
|
|
MOVZX reg32,rm16 [rm: o32 0f b7 /r] 386
|
|
MOVZX reg64,rm8 [rm: o64 0f b6 /r] X64
|
|
MOVZX reg64,rm16 [rm: o64 0f b7 /r] X64
|
|
MUL rm8 [m: f6 /4] 8086
|
|
MUL rm16 [m: o16 f7 /4] 8086
|
|
MUL rm32 [m: o32 f7 /4] 386
|
|
MUL rm64 [m: o64 f7 /4] X64
|
|
MWAIT void [ 0f 01 c9] PRESCOTT
|
|
MWAIT reg_eax,reg_ecx [--: 0f 01 c9] PRESCOTT,ND
|
|
NEG rm8 [m: hle f6 /3] 8086,LOCK
|
|
NEG rm16 [m: hle o16 f7 /3] 8086,LOCK
|
|
NEG rm32 [m: hle o32 f7 /3] 386,LOCK
|
|
NEG rm64 [m: hle o64 f7 /3] X64,LOCK
|
|
NOP void [ norexb 90] 8086
|
|
NOP rm16 [m: o16 0f 1f /0] P6
|
|
NOP rm32 [m: o32 0f 1f /0] P6
|
|
NOP rm64 [m: o64 0f 1f /0] X64
|
|
NOT rm8 [m: hle f6 /2] 8086,LOCK
|
|
NOT rm16 [m: hle o16 f7 /2] 8086,LOCK
|
|
NOT rm32 [m: hle o32 f7 /2] 386,LOCK
|
|
NOT rm64 [m: hle o64 f7 /2] X64,LOCK
|
|
OR mem,reg8 [mr: hle 08 /r] 8086,SM,LOCK
|
|
OR reg8,reg8 [mr: 08 /r] 8086
|
|
OR mem,reg16 [mr: hle o16 09 /r] 8086,SM,LOCK
|
|
OR reg16,reg16 [mr: o16 09 /r] 8086
|
|
OR mem,reg32 [mr: hle o32 09 /r] 386,SM,LOCK
|
|
OR reg32,reg32 [mr: o32 09 /r] 386
|
|
OR mem,reg64 [mr: hle o64 09 /r] X64,SM,LOCK
|
|
OR reg64,reg64 [mr: o64 09 /r] X64
|
|
OR reg8,mem [rm: 0a /r] 8086,SM
|
|
OR reg8,reg8 [rm: 0a /r] 8086
|
|
OR reg16,mem [rm: o16 0b /r] 8086,SM
|
|
OR reg16,reg16 [rm: o16 0b /r] 8086
|
|
OR reg32,mem [rm: o32 0b /r] 386,SM
|
|
OR reg32,reg32 [rm: o32 0b /r] 386
|
|
OR reg64,mem [rm: o64 0b /r] X64,SM
|
|
OR reg64,reg64 [rm: o64 0b /r] X64
|
|
OR rm16,imm8 [mi: hle o16 83 /1 ibx] 8086,LOCK
|
|
OR rm32,imm8 [mi: hle o32 83 /1 ibx] 386,LOCK
|
|
OR rm64,imm8 [mi: hle o64 83 /1 ibx] X64,LOCK
|
|
OR reg_al,imm [-i: 0c ib] 8086,SM
|
|
OR reg_ax,sbyte16 [mi: o16 83 /1 ibx] 8086,SM
|
|
OR reg_ax,imm [-i: o16 0d iw] 8086,SM
|
|
OR reg_eax,sbyte32 [mi: o32 83 /1 ibx] 386,SM
|
|
OR reg_eax,imm [-i: o32 0d id] 386,SM
|
|
OR reg_rax,sbyte64 [mi: o64 83 /1 ibx] X64,SM
|
|
OR reg_rax,imm [-i: o64 0d idx] X64,SM
|
|
OR rm8,imm [mi: hle 80 /1 ib] 8086,SM,LOCK
|
|
OR rm16,imm [mi: hle o16 81+s /1 ibw] 8086,SM,LOCK
|
|
OR rm32,imm [mi: hle o32 81+s /1 ibd] 386,SM,LOCK
|
|
OR rm64,imm [mi: hle o64 81+s /1 ibd,s] X64,SM,LOCK
|
|
OR mem,imm8 [mi: hle 80 /1 ib] 8086,SM,LOCK
|
|
OR mem,imm16 [mi: hle o16 81+s /1 ibw] 8086,SM,LOCK
|
|
OR mem,imm32 [mi: hle o32 81+s /1 ibd] 386,SM,LOCK
|
|
OUT imm,reg_al [i-: e6 ib,u] 8086,SB
|
|
OUT imm,reg_ax [i-: o16 e7 ib,u] 8086,SB
|
|
OUT imm,reg_eax [i-: o32 e7 ib,u] 386,SB
|
|
OUT reg_dx,reg_al [--: ee] 8086
|
|
OUT reg_dx,reg_ax [--: o16 ef] 8086
|
|
OUT reg_dx,reg_eax [--: o32 ef] 386
|
|
OUTSB void [ 6e] 186
|
|
OUTSD void [ o32 6f] 386
|
|
OUTSW void [ o16 6f] 186
|
|
PACKSSDW mmxreg,mmxrm [rm: np o64nw 0f 6b /r] PENT,MMX,SQ
|
|
PACKSSWB mmxreg,mmxrm [rm: np o64nw 0f 63 /r] PENT,MMX,SQ
|
|
PACKUSWB mmxreg,mmxrm [rm: np o64nw 0f 67 /r] PENT,MMX,SQ
|
|
PADDB mmxreg,mmxrm [rm: np o64nw 0f fc /r] PENT,MMX,SQ
|
|
PADDD mmxreg,mmxrm [rm: np o64nw 0f fe /r] PENT,MMX,SQ
|
|
PADDSB mmxreg,mmxrm [rm: np o64nw 0f ec /r] PENT,MMX,SQ
|
|
PADDSIW mmxreg,mmxrm [rm: o64nw 0f 51 /r] PENT,MMX,SQ,CYRIX
|
|
PADDSW mmxreg,mmxrm [rm: np o64nw 0f ed /r] PENT,MMX,SQ
|
|
PADDUSB mmxreg,mmxrm [rm: np o64nw 0f dc /r] PENT,MMX,SQ
|
|
PADDUSW mmxreg,mmxrm [rm: np o64nw 0f dd /r] PENT,MMX,SQ
|
|
PADDW mmxreg,mmxrm [rm: np o64nw 0f fd /r] PENT,MMX,SQ
|
|
PAND mmxreg,mmxrm [rm: np o64nw 0f db /r] PENT,MMX,SQ
|
|
PANDN mmxreg,mmxrm [rm: np o64nw 0f df /r] PENT,MMX,SQ
|
|
PAUSE void [ norexb f3i 90] 8086
|
|
PAVEB mmxreg,mmxrm [rm: o64nw 0f 50 /r] PENT,MMX,SQ,CYRIX
|
|
PAVGUSB mmxreg,mmxrm [rm: o64nw 0f 0f /r bf] PENT,3DNOW,SQ
|
|
PCMPEQB mmxreg,mmxrm [rm: np o64nw 0f 74 /r] PENT,MMX,SQ
|
|
PCMPEQD mmxreg,mmxrm [rm: np o64nw 0f 76 /r] PENT,MMX,SQ
|
|
PCMPEQW mmxreg,mmxrm [rm: np o64nw 0f 75 /r] PENT,MMX,SQ
|
|
PCMPGTB mmxreg,mmxrm [rm: np o64nw 0f 64 /r] PENT,MMX,SQ
|
|
PCMPGTD mmxreg,mmxrm [rm: np o64nw 0f 66 /r] PENT,MMX,SQ
|
|
PCMPGTW mmxreg,mmxrm [rm: np o64nw 0f 65 /r] PENT,MMX,SQ
|
|
PDISTIB mmxreg,mem [rm: 0f 54 /r] PENT,MMX,SM,CYRIX
|
|
PF2ID mmxreg,mmxrm [rm: o64nw 0f 0f /r 1d] PENT,3DNOW,SQ
|
|
PFACC mmxreg,mmxrm [rm: o64nw 0f 0f /r ae] PENT,3DNOW,SQ
|
|
PFADD mmxreg,mmxrm [rm: o64nw 0f 0f /r 9e] PENT,3DNOW,SQ
|
|
PFCMPEQ mmxreg,mmxrm [rm: o64nw 0f 0f /r b0] PENT,3DNOW,SQ
|
|
PFCMPGE mmxreg,mmxrm [rm: o64nw 0f 0f /r 90] PENT,3DNOW,SQ
|
|
PFCMPGT mmxreg,mmxrm [rm: o64nw 0f 0f /r a0] PENT,3DNOW,SQ
|
|
PFMAX mmxreg,mmxrm [rm: o64nw 0f 0f /r a4] PENT,3DNOW,SQ
|
|
PFMIN mmxreg,mmxrm [rm: o64nw 0f 0f /r 94] PENT,3DNOW,SQ
|
|
PFMUL mmxreg,mmxrm [rm: o64nw 0f 0f /r b4] PENT,3DNOW,SQ
|
|
PFRCP mmxreg,mmxrm [rm: o64nw 0f 0f /r 96] PENT,3DNOW,SQ
|
|
PFRCPIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a6] PENT,3DNOW,SQ
|
|
PFRCPIT2 mmxreg,mmxrm [rm: o64nw 0f 0f /r b6] PENT,3DNOW,SQ
|
|
PFRSQIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a7] PENT,3DNOW,SQ
|
|
PFRSQRT mmxreg,mmxrm [rm: o64nw 0f 0f /r 97] PENT,3DNOW,SQ
|
|
PFSUB mmxreg,mmxrm [rm: o64nw 0f 0f /r 9a] PENT,3DNOW,SQ
|
|
PFSUBR mmxreg,mmxrm [rm: o64nw 0f 0f /r aa] PENT,3DNOW,SQ
|
|
PI2FD mmxreg,mmxrm [rm: o64nw 0f 0f /r 0d] PENT,3DNOW,SQ
|
|
PMACHRIW mmxreg,mem [rm: 0f 5e /r] PENT,MMX,SM,CYRIX
|
|
PMADDWD mmxreg,mmxrm [rm: np o64nw 0f f5 /r] PENT,MMX,SQ
|
|
PMAGW mmxreg,mmxrm [rm: o64nw 0f 52 /r] PENT,MMX,SQ,CYRIX
|
|
PMULHRIW mmxreg,mmxrm [rm: o64nw 0f 5d /r] PENT,MMX,SQ,CYRIX
|
|
PMULHRWA mmxreg,mmxrm [rm: o64nw 0f 0f /r b7] PENT,3DNOW,SQ
|
|
PMULHRWC mmxreg,mmxrm [rm: o64nw 0f 59 /r] PENT,MMX,SQ,CYRIX
|
|
PMULHW mmxreg,mmxrm [rm: np o64nw 0f e5 /r] PENT,MMX,SQ
|
|
PMULLW mmxreg,mmxrm [rm: np o64nw 0f d5 /r] PENT,MMX,SQ
|
|
PMVGEZB mmxreg,mem [rm: 0f 5c /r] PENT,MMX,SQ,CYRIX
|
|
PMVLZB mmxreg,mem [rm: 0f 5b /r] PENT,MMX,SQ,CYRIX
|
|
PMVNZB mmxreg,mem [rm: 0f 5a /r] PENT,MMX,SQ,CYRIX
|
|
PMVZB mmxreg,mem [rm: 0f 58 /r] PENT,MMX,SQ,CYRIX
|
|
POP reg16 [r: o16 58+r] 8086
|
|
POP reg32 [r: o32 58+r] 386,NOLONG
|
|
POP reg64 [r: o64nw 58+r] X64
|
|
POP rm16 [m: o16 8f /0] 8086
|
|
POP rm32 [m: o32 8f /0] 386,NOLONG
|
|
POP rm64 [m: o64nw 8f /0] X64
|
|
POP reg_cs [-: 0f] 8086,UNDOC,ND
|
|
POP reg_dess [-: popseg] 8086,NOLONG
|
|
POP reg_fsgs [-: 0f popseg2] 386
|
|
POPA void [ odf 61] 186,NOLONG
|
|
POPAD void [ o32 61] 386,NOLONG
|
|
POPAW void [ o16 61] 186,NOLONG
|
|
POPF void [ odf 9d] 8086
|
|
POPFD void [ o32 9d] 386,NOLONG
|
|
POPFQ void [ o32 9d] X64
|
|
POPFW void [ o16 9d] 8086
|
|
POR mmxreg,mmxrm [rm: np o64nw 0f eb /r] PENT,MMX,SQ
|
|
PREFETCH mem [m: 0f 0d /0] PENT,3DNOW,SQ
|
|
PREFETCHW mem [m: 0f 0d /1] PENT,3DNOW,SQ
|
|
PSLLD mmxreg,mmxrm [rm: np o64nw 0f f2 /r] PENT,MMX,SQ
|
|
PSLLD mmxreg,imm [mi: np 0f 72 /6 ib,u] PENT,MMX
|
|
PSLLQ mmxreg,mmxrm [rm: np o64nw 0f f3 /r] PENT,MMX,SQ
|
|
PSLLQ mmxreg,imm [mi: np 0f 73 /6 ib,u] PENT,MMX
|
|
PSLLW mmxreg,mmxrm [rm: np o64nw 0f f1 /r] PENT,MMX,SQ
|
|
PSLLW mmxreg,imm [mi: np 0f 71 /6 ib,u] PENT,MMX
|
|
PSRAD mmxreg,mmxrm [rm: np o64nw 0f e2 /r] PENT,MMX,SQ
|
|
PSRAD mmxreg,imm [mi: np 0f 72 /4 ib,u] PENT,MMX
|
|
PSRAW mmxreg,mmxrm [rm: np o64nw 0f e1 /r] PENT,MMX,SQ
|
|
PSRAW mmxreg,imm [mi: np 0f 71 /4 ib,u] PENT,MMX
|
|
PSRLD mmxreg,mmxrm [rm: np o64nw 0f d2 /r] PENT,MMX,SQ
|
|
PSRLD mmxreg,imm [mi: np 0f 72 /2 ib,u] PENT,MMX
|
|
PSRLQ mmxreg,mmxrm [rm: np o64nw 0f d3 /r] PENT,MMX,SQ
|
|
PSRLQ mmxreg,imm [mi: np 0f 73 /2 ib,u] PENT,MMX
|
|
PSRLW mmxreg,mmxrm [rm: np o64nw 0f d1 /r] PENT,MMX,SQ
|
|
PSRLW mmxreg,imm [mi: np 0f 71 /2 ib,u] PENT,MMX
|
|
PSUBB mmxreg,mmxrm [rm: np o64nw 0f f8 /r] PENT,MMX,SQ
|
|
PSUBD mmxreg,mmxrm [rm: np o64nw 0f fa /r] PENT,MMX,SQ
|
|
PSUBSB mmxreg,mmxrm [rm: np o64nw 0f e8 /r] PENT,MMX,SQ
|
|
PSUBSIW mmxreg,mmxrm [rm: o64nw 0f 55 /r] PENT,MMX,SQ,CYRIX
|
|
PSUBSW mmxreg,mmxrm [rm: np o64nw 0f e9 /r] PENT,MMX,SQ
|
|
PSUBUSB mmxreg,mmxrm [rm: np o64nw 0f d8 /r] PENT,MMX,SQ
|
|
PSUBUSW mmxreg,mmxrm [rm: np o64nw 0f d9 /r] PENT,MMX,SQ
|
|
PSUBW mmxreg,mmxrm [rm: np o64nw 0f f9 /r] PENT,MMX,SQ
|
|
PUNPCKHBW mmxreg,mmxrm [rm: np o64nw 0f 68 /r] PENT,MMX,SQ
|
|
PUNPCKHDQ mmxreg,mmxrm [rm: np o64nw 0f 6a /r] PENT,MMX,SQ
|
|
PUNPCKHWD mmxreg,mmxrm [rm: np o64nw 0f 69 /r] PENT,MMX,SQ
|
|
PUNPCKLBW mmxreg,mmxrm [rm: np o64nw 0f 60 /r] PENT,MMX,SQ
|
|
PUNPCKLDQ mmxreg,mmxrm [rm: np o64nw 0f 62 /r] PENT,MMX,SQ
|
|
PUNPCKLWD mmxreg,mmxrm [rm: np o64nw 0f 61 /r] PENT,MMX,SQ
|
|
PUSH reg16 [r: o16 50+r] 8086
|
|
PUSH reg32 [r: o32 50+r] 386,NOLONG
|
|
PUSH reg64 [r: o64nw 50+r] X64
|
|
PUSH rm16 [m: o16 ff /6] 8086
|
|
PUSH rm32 [m: o32 ff /6] 386,NOLONG
|
|
PUSH rm64 [m: o64nw ff /6] X64
|
|
PUSH reg_cs [-: pushseg] 8086,NOLONG
|
|
PUSH reg_dess [-: pushseg] 8086,NOLONG
|
|
PUSH reg_fsgs [-: 0f pushseg2] 386
|
|
PUSH imm8 [i: 6a ibx] 186
|
|
PUSH imm16 [i: o16 68+s ibw] 186,AR0,SZ
|
|
PUSH imm32 [i: o32 68+s ibd] 386,NOLONG,AR0,SZ
|
|
PUSH imm32 [i: o32 68+s ibd] 386,NOLONG,SD
|
|
PUSH imm32 [i: o64nw 68+s ibd,s] X64,AR0,SZ
|
|
PUSH imm64 [i: o64nw 68+s ibd,s] X64,AR0,SZ
|
|
PUSHA void [ odf 60] 186,NOLONG
|
|
PUSHAD void [ o32 60] 386,NOLONG
|
|
PUSHAW void [ o16 60] 186,NOLONG
|
|
PUSHF void [ odf 9c] 8086
|
|
PUSHFD void [ o32 9c] 386,NOLONG
|
|
PUSHFQ void [ o32 9c] X64
|
|
PUSHFW void [ o16 9c] 8086
|
|
PXOR mmxreg,mmxrm [rm: np o64nw 0f ef /r] PENT,MMX,SQ
|
|
RCL rm8,unity [m-: d0 /2] 8086
|
|
RCL rm8,reg_cl [m-: d2 /2] 8086
|
|
RCL rm8,imm [mi: c0 /2 ib,u] 186,SB
|
|
RCL rm16,unity [m-: o16 d1 /2] 8086
|
|
RCL rm16,reg_cl [m-: o16 d3 /2] 8086
|
|
RCL rm16,imm [mi: o16 c1 /2 ib,u] 186,SB
|
|
RCL rm32,unity [m-: o32 d1 /2] 386
|
|
RCL rm32,reg_cl [m-: o32 d3 /2] 386
|
|
RCL rm32,imm [mi: o32 c1 /2 ib,u] 386,SB
|
|
RCL rm64,unity [m-: o64 d1 /2] X64
|
|
RCL rm64,reg_cl [m-: o64 d3 /2] X64
|
|
RCL rm64,imm [mi: o64 c1 /2 ib,u] X64,SB
|
|
RCR rm8,unity [m-: d0 /3] 8086
|
|
RCR rm8,reg_cl [m-: d2 /3] 8086
|
|
RCR rm8,imm [mi: c0 /3 ib,u] 186,SB
|
|
RCR rm16,unity [m-: o16 d1 /3] 8086
|
|
RCR rm16,reg_cl [m-: o16 d3 /3] 8086
|
|
RCR rm16,imm [mi: o16 c1 /3 ib,u] 186,SB
|
|
RCR rm32,unity [m-: o32 d1 /3] 386
|
|
RCR rm32,reg_cl [m-: o32 d3 /3] 386
|
|
RCR rm32,imm [mi: o32 c1 /3 ib,u] 386,SB
|
|
RCR rm64,unity [m-: o64 d1 /3] X64
|
|
RCR rm64,reg_cl [m-: o64 d3 /3] X64
|
|
RCR rm64,imm [mi: o64 c1 /3 ib,u] X64,SB
|
|
RDSHR rm32 [m: o32 0f 36 /0] P6,CYRIX,SMM
|
|
RDMSR void [ 0f 32] PENT,PRIV
|
|
RDPMC void [ 0f 33] P6
|
|
RDTSC void [ 0f 31] PENT
|
|
RDTSCP void [ 0f 01 f9] X86_64
|
|
RET void [ c3] 8086
|
|
RET imm [i: c2 iw] 8086,SW
|
|
RETF void [ cb] 8086
|
|
RETF imm [i: ca iw] 8086,SW
|
|
RETN void [ c3] 8086
|
|
RETN imm [i: c2 iw] 8086,SW
|
|
ROL rm8,unity [m-: d0 /0] 8086
|
|
ROL rm8,reg_cl [m-: d2 /0] 8086
|
|
ROL rm8,imm [mi: c0 /0 ib,u] 186,SB
|
|
ROL rm16,unity [m-: o16 d1 /0] 8086
|
|
ROL rm16,reg_cl [m-: o16 d3 /0] 8086
|
|
ROL rm16,imm [mi: o16 c1 /0 ib,u] 186,SB
|
|
ROL rm32,unity [m-: o32 d1 /0] 386
|
|
ROL rm32,reg_cl [m-: o32 d3 /0] 386
|
|
ROL rm32,imm [mi: o32 c1 /0 ib,u] 386,SB
|
|
ROL rm64,unity [m-: o64 d1 /0] X64
|
|
ROL rm64,reg_cl [m-: o64 d3 /0] X64
|
|
ROL rm64,imm [mi: o64 c1 /0 ib,u] X64,SB
|
|
ROR rm8,unity [m-: d0 /1] 8086
|
|
ROR rm8,reg_cl [m-: d2 /1] 8086
|
|
ROR rm8,imm [mi: c0 /1 ib,u] 186,SB
|
|
ROR rm16,unity [m-: o16 d1 /1] 8086
|
|
ROR rm16,reg_cl [m-: o16 d3 /1] 8086
|
|
ROR rm16,imm [mi: o16 c1 /1 ib,u] 186,SB
|
|
ROR rm32,unity [m-: o32 d1 /1] 386
|
|
ROR rm32,reg_cl [m-: o32 d3 /1] 386
|
|
ROR rm32,imm [mi: o32 c1 /1 ib,u] 386,SB
|
|
ROR rm64,unity [m-: o64 d1 /1] X64
|
|
ROR rm64,reg_cl [m-: o64 d3 /1] X64
|
|
ROR rm64,imm [mi: o64 c1 /1 ib,u] X64,SB
|
|
RDM void [ 0f 3a] P6,CYRIX,ND
|
|
RSDC reg_sreg,mem80 [rm: 0f 79 /r] 486,CYRIX,SMM
|
|
RSLDT mem80 [m: 0f 7b /0] 486,CYRIX,SMM
|
|
RSM void [ 0f aa] PENT,SMM
|
|
RSTS mem80 [m: 0f 7d /0] 486,CYRIX,SMM
|
|
SAHF void [ 9e] 8086
|
|
SAL rm8,unity [m-: d0 /4] 8086,ND
|
|
SAL rm8,reg_cl [m-: d2 /4] 8086,ND
|
|
SAL rm8,imm [mi: c0 /4 ib,u] 186,ND,SB
|
|
SAL rm16,unity [m-: o16 d1 /4] 8086,ND
|
|
SAL rm16,reg_cl [m-: o16 d3 /4] 8086,ND
|
|
SAL rm16,imm [mi: o16 c1 /4 ib,u] 186,ND,SB
|
|
SAL rm32,unity [m-: o32 d1 /4] 386,ND
|
|
SAL rm32,reg_cl [m-: o32 d3 /4] 386,ND
|
|
SAL rm32,imm [mi: o32 c1 /4 ib,u] 386,ND,SB
|
|
SAL rm64,unity [m-: o64 d1 /4] X64,ND
|
|
SAL rm64,reg_cl [m-: o64 d3 /4] X64,ND
|
|
SAL rm64,imm [mi: o64 c1 /4 ib,u] X64,ND,SB
|
|
SALC void [ d6] 8086,UNDOC
|
|
SAR rm8,unity [m-: d0 /7] 8086
|
|
SAR rm8,reg_cl [m-: d2 /7] 8086
|
|
SAR rm8,imm [mi: c0 /7 ib,u] 186,SB
|
|
SAR rm16,unity [m-: o16 d1 /7] 8086
|
|
SAR rm16,reg_cl [m-: o16 d3 /7] 8086
|
|
SAR rm16,imm [mi: o16 c1 /7 ib,u] 186,SB
|
|
SAR rm32,unity [m-: o32 d1 /7] 386
|
|
SAR rm32,reg_cl [m-: o32 d3 /7] 386
|
|
SAR rm32,imm [mi: o32 c1 /7 ib,u] 386,SB
|
|
SAR rm64,unity [m-: o64 d1 /7] X64
|
|
SAR rm64,reg_cl [m-: o64 d3 /7] X64
|
|
SAR rm64,imm [mi: o64 c1 /7 ib,u] X64,SB
|
|
SBB mem,reg8 [mr: hle 18 /r] 8086,SM,LOCK
|
|
SBB reg8,reg8 [mr: 18 /r] 8086
|
|
SBB mem,reg16 [mr: hle o16 19 /r] 8086,SM,LOCK
|
|
SBB reg16,reg16 [mr: o16 19 /r] 8086
|
|
SBB mem,reg32 [mr: hle o32 19 /r] 386,SM,LOCK
|
|
SBB reg32,reg32 [mr: o32 19 /r] 386
|
|
SBB mem,reg64 [mr: hle o64 19 /r] X64,SM,LOCK
|
|
SBB reg64,reg64 [mr: o64 19 /r] X64
|
|
SBB reg8,mem [rm: 1a /r] 8086,SM
|
|
SBB reg8,reg8 [rm: 1a /r] 8086
|
|
SBB reg16,mem [rm: o16 1b /r] 8086,SM
|
|
SBB reg16,reg16 [rm: o16 1b /r] 8086
|
|
SBB reg32,mem [rm: o32 1b /r] 386,SM
|
|
SBB reg32,reg32 [rm: o32 1b /r] 386
|
|
SBB reg64,mem [rm: o64 1b /r] X64,SM
|
|
SBB reg64,reg64 [rm: o64 1b /r] X64
|
|
SBB rm16,imm8 [mi: hle o16 83 /3 ibx] 8086,LOCK
|
|
SBB rm32,imm8 [mi: hle o32 83 /3 ibx] 386,LOCK
|
|
SBB rm64,imm8 [mi: hle o64 83 /3 ibx] X64,LOCK
|
|
SBB reg_al,imm [-i: 1c ib] 8086,SM
|
|
SBB reg_ax,sbyte16 [mi: o16 83 /3 ibx] 8086,SM
|
|
SBB reg_ax,imm [-i: o16 1d iw] 8086,SM
|
|
SBB reg_eax,sbyte32 [mi: o32 83 /3 ibx] 386,SM
|
|
SBB reg_eax,imm [-i: o32 1d id] 386,SM
|
|
SBB reg_rax,sbyte64 [mi: o64 83 /3 ibx] X64,SM
|
|
SBB reg_rax,imm [-i: o64 1d idx] X64,SM
|
|
SBB rm8,imm [mi: hle 80 /3 ib] 8086,SM,LOCK
|
|
SBB rm16,imm [mi: hle o16 81+s /3 ibw] 8086,SM,LOCK
|
|
SBB rm32,imm [mi: hle o32 81+s /3 ibd] 386,SM,LOCK
|
|
SBB rm64,imm [mi: hle o64 81+s /3 ibd,s] X64,SM,LOCK
|
|
SBB mem,imm8 [mi: hle 80 /3 ib] 8086,SM,LOCK
|
|
SBB mem,imm16 [mi: hle o16 81+s /3 ibw] 8086,SM,LOCK
|
|
SBB mem,imm32 [mi: hle o32 81+s /3 ibd] 386,SM,LOCK
|
|
SCASB void [ repe ae] 8086
|
|
SCASD void [ repe o32 af] 386
|
|
SCASQ void [ repe o64 af] X64
|
|
SCASW void [ repe o16 af] 8086
|
|
SFENCE void [ 0f ae f8] X64,AMD
|
|
SGDT mem [m: 0f 01 /0] 286
|
|
SHL rm8,unity [m-: d0 /4] 8086
|
|
SHL rm8,reg_cl [m-: d2 /4] 8086
|
|
SHL rm8,imm [mi: c0 /4 ib,u] 186,SB
|
|
SHL rm16,unity [m-: o16 d1 /4] 8086
|
|
SHL rm16,reg_cl [m-: o16 d3 /4] 8086
|
|
SHL rm16,imm [mi: o16 c1 /4 ib,u] 186,SB
|
|
SHL rm32,unity [m-: o32 d1 /4] 386
|
|
SHL rm32,reg_cl [m-: o32 d3 /4] 386
|
|
SHL rm32,imm [mi: o32 c1 /4 ib,u] 386,SB
|
|
SHL rm64,unity [m-: o64 d1 /4] X64
|
|
SHL rm64,reg_cl [m-: o64 d3 /4] X64
|
|
SHL rm64,imm [mi: o64 c1 /4 ib,u] X64,SB
|
|
SHLD mem,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
|
|
SHLD reg16,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
|
|
SHLD mem,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
|
|
SHLD reg32,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
|
|
SHLD mem,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
|
|
SHLD reg64,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
|
|
SHLD mem,reg16,reg_cl [mr-: o16 0f a5 /r] 386,SM
|
|
SHLD reg16,reg16,reg_cl [mr-: o16 0f a5 /r] 386
|
|
SHLD mem,reg32,reg_cl [mr-: o32 0f a5 /r] 386,SM
|
|
SHLD reg32,reg32,reg_cl [mr-: o32 0f a5 /r] 386
|
|
SHLD mem,reg64,reg_cl [mr-: o64 0f a5 /r] X64,SM
|
|
SHLD reg64,reg64,reg_cl [mr-: o64 0f a5 /r] X64
|
|
SHR rm8,unity [m-: d0 /5] 8086
|
|
SHR rm8,reg_cl [m-: d2 /5] 8086
|
|
SHR rm8,imm [mi: c0 /5 ib,u] 186,SB
|
|
SHR rm16,unity [m-: o16 d1 /5] 8086
|
|
SHR rm16,reg_cl [m-: o16 d3 /5] 8086
|
|
SHR rm16,imm [mi: o16 c1 /5 ib,u] 186,SB
|
|
SHR rm32,unity [m-: o32 d1 /5] 386
|
|
SHR rm32,reg_cl [m-: o32 d3 /5] 386
|
|
SHR rm32,imm [mi: o32 c1 /5 ib,u] 386,SB
|
|
SHR rm64,unity [m-: o64 d1 /5] X64
|
|
SHR rm64,reg_cl [m-: o64 d3 /5] X64
|
|
SHR rm64,imm [mi: o64 c1 /5 ib,u] X64,SB
|
|
SHRD mem,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
|
|
SHRD reg16,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
|
|
SHRD mem,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
|
|
SHRD reg32,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
|
|
SHRD mem,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
|
|
SHRD reg64,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
|
|
SHRD mem,reg16,reg_cl [mr-: o16 0f ad /r] 386,SM
|
|
SHRD reg16,reg16,reg_cl [mr-: o16 0f ad /r] 386
|
|
SHRD mem,reg32,reg_cl [mr-: o32 0f ad /r] 386,SM
|
|
SHRD reg32,reg32,reg_cl [mr-: o32 0f ad /r] 386
|
|
SHRD mem,reg64,reg_cl [mr-: o64 0f ad /r] X64,SM
|
|
SHRD reg64,reg64,reg_cl [mr-: o64 0f ad /r] X64
|
|
SIDT mem [m: 0f 01 /1] 286
|
|
SLDT mem [m: 0f 00 /0] 286
|
|
SLDT mem16 [m: 0f 00 /0] 286
|
|
SLDT reg16 [m: o16 0f 00 /0] 286
|
|
SLDT reg32 [m: o32 0f 00 /0] 386
|
|
SLDT reg64 [m: o64nw 0f 00 /0] X64,ND
|
|
SLDT reg64 [m: o64 0f 00 /0] X64
|
|
SKINIT void [ 0f 01 de] X64
|
|
SMI void [ f1] 386,UNDOC
|
|
SMINT void [ 0f 38] P6,CYRIX,ND
|
|
; Older Cyrix chips had this; they had to move due to conflict with MMX
|
|
SMINTOLD void [ 0f 7e] 486,CYRIX,ND
|
|
SMSW mem [m: 0f 01 /4] 286
|
|
SMSW mem16 [m: 0f 01 /4] 286
|
|
SMSW reg16 [m: o16 0f 01 /4] 286
|
|
SMSW reg32 [m: o32 0f 01 /4] 386
|
|
STC void [ f9] 8086
|
|
STD void [ fd] 8086
|
|
STGI void [ 0f 01 dc] X64
|
|
STI void [ fb] 8086
|
|
STOSB void [ aa] 8086
|
|
STOSD void [ o32 ab] 386
|
|
STOSQ void [ o64 ab] X64
|
|
STOSW void [ o16 ab] 8086
|
|
STR mem [m: 0f 00 /1] 286,PROT
|
|
STR mem16 [m: 0f 00 /1] 286,PROT
|
|
STR reg16 [m: o16 0f 00 /1] 286,PROT
|
|
STR reg32 [m: o32 0f 00 /1] 386,PROT
|
|
STR reg64 [m: o64 0f 00 /1] X64
|
|
SUB mem,reg8 [mr: hle 28 /r] 8086,SM,LOCK
|
|
SUB reg8,reg8 [mr: 28 /r] 8086
|
|
SUB mem,reg16 [mr: hle o16 29 /r] 8086,SM,LOCK
|
|
SUB reg16,reg16 [mr: o16 29 /r] 8086
|
|
SUB mem,reg32 [mr: hle o32 29 /r] 386,SM,LOCK
|
|
SUB reg32,reg32 [mr: o32 29 /r] 386
|
|
SUB mem,reg64 [mr: hle o64 29 /r] X64,SM,LOCK
|
|
SUB reg64,reg64 [mr: o64 29 /r] X64
|
|
SUB reg8,mem [rm: 2a /r] 8086,SM
|
|
SUB reg8,reg8 [rm: 2a /r] 8086
|
|
SUB reg16,mem [rm: o16 2b /r] 8086,SM
|
|
SUB reg16,reg16 [rm: o16 2b /r] 8086
|
|
SUB reg32,mem [rm: o32 2b /r] 386,SM
|
|
SUB reg32,reg32 [rm: o32 2b /r] 386
|
|
SUB reg64,mem [rm: o64 2b /r] X64,SM
|
|
SUB reg64,reg64 [rm: o64 2b /r] X64
|
|
SUB rm16,imm8 [mi: hle o16 83 /5 ibx] 8086,LOCK
|
|
SUB rm32,imm8 [mi: hle o32 83 /5 ibx] 386,LOCK
|
|
SUB rm64,imm8 [mi: hle o64 83 /5 ibx] X64,LOCK
|
|
SUB reg_al,imm [-i: 2c ib] 8086,SM
|
|
SUB reg_ax,sbyte16 [mi: o16 83 /5 ibx] 8086,SM
|
|
SUB reg_ax,imm [-i: o16 2d iw] 8086,SM
|
|
SUB reg_eax,sbyte32 [mi: o32 83 /5 ibx] 386,SM
|
|
SUB reg_eax,imm [-i: o32 2d id] 386,SM
|
|
SUB reg_rax,sbyte64 [mi: o64 83 /5 ibx] X64,SM
|
|
SUB reg_rax,imm [-i: o64 2d idx] X64,SM
|
|
SUB rm8,imm [mi: hle 80 /5 ib] 8086,SM,LOCK
|
|
SUB rm16,imm [mi: hle o16 81+s /5 ibw] 8086,SM,LOCK
|
|
SUB rm32,imm [mi: hle o32 81+s /5 ibd] 386,SM,LOCK
|
|
SUB rm64,imm [mi: hle o64 81+s /5 ibd,s] X64,SM,LOCK
|
|
SUB mem,imm8 [mi: hle 80 /5 ib] 8086,SM,LOCK
|
|
SUB mem,imm16 [mi: hle o16 81+s /5 ibw] 8086,SM,LOCK
|
|
SUB mem,imm32 [mi: hle o32 81+s /5 ibd] 386,SM,LOCK
|
|
SVDC mem80,reg_sreg [mr: 0f 78 /r] 486,CYRIX,SMM
|
|
SVLDT mem80 [m: 0f 7a /0] 486,CYRIX,SMM,ND
|
|
SVTS mem80 [m: 0f 7c /0] 486,CYRIX,SMM
|
|
SWAPGS void [ 0f 01 f8] X64
|
|
SYSCALL void [ 0f 05] P6,AMD
|
|
SYSENTER void [ 0f 34] P6
|
|
SYSEXIT void [ 0f 35] P6,PRIV
|
|
SYSRET void [ 0f 07] P6,PRIV,AMD
|
|
TEST mem,reg8 [mr: 84 /r] 8086,SM
|
|
TEST reg8,reg8 [mr: 84 /r] 8086
|
|
TEST mem,reg16 [mr: o16 85 /r] 8086,SM
|
|
TEST reg16,reg16 [mr: o16 85 /r] 8086
|
|
TEST mem,reg32 [mr: o32 85 /r] 386,SM
|
|
TEST reg32,reg32 [mr: o32 85 /r] 386
|
|
TEST mem,reg64 [mr: o64 85 /r] X64,SM
|
|
TEST reg64,reg64 [mr: o64 85 /r] X64
|
|
TEST reg8,mem [rm: 84 /r] 8086,SM
|
|
TEST reg16,mem [rm: o16 85 /r] 8086,SM
|
|
TEST reg32,mem [rm: o32 85 /r] 386,SM
|
|
TEST reg64,mem [rm: o64 85 /r] X64,SM
|
|
TEST reg_al,imm [-i: a8 ib] 8086,SM
|
|
TEST reg_ax,imm [-i: o16 a9 iw] 8086,SM
|
|
TEST reg_eax,imm [-i: o32 a9 id] 386,SM
|
|
TEST reg_rax,imm [-i: o64 a9 idx] X64,SM
|
|
TEST rm8,imm [mi: f6 /0 ib] 8086,SM
|
|
TEST rm16,imm [mi: o16 f7 /0 iw] 8086,SM
|
|
TEST rm32,imm [mi: o32 f7 /0 id] 386,SM
|
|
TEST rm64,imm [mi: o64 f7 /0 idx] X64,SM
|
|
TEST mem,imm8 [mi: f6 /0 ib] 8086,SM
|
|
TEST mem,imm16 [mi: o16 f7 /0 iw] 8086,SM
|
|
TEST mem,imm32 [mi: o32 f7 /0 id] 386,SM
|
|
UD0 void [ 0f ff] 186,UNDOC
|
|
UD1 void [ 0f b9] 186,UNDOC
|
|
UD2B void [ 0f b9] 186,UNDOC,ND
|
|
UD2 void [ 0f 0b] 186
|
|
UD2A void [ 0f 0b] 186,ND
|
|
UMOV mem,reg8 [mr: np 0f 10 /r] 386,UNDOC,SM,ND
|
|
UMOV reg8,reg8 [mr: np 0f 10 /r] 386,UNDOC,ND
|
|
UMOV mem,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,SM,ND
|
|
UMOV reg16,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,ND
|
|
UMOV mem,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,SM,ND
|
|
UMOV reg32,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,ND
|
|
UMOV reg8,mem [rm: np 0f 12 /r] 386,UNDOC,SM,ND
|
|
UMOV reg8,reg8 [rm: np 0f 12 /r] 386,UNDOC,ND
|
|
UMOV reg16,mem [rm: np o16 0f 13 /r] 386,UNDOC,SM,ND
|
|
UMOV reg16,reg16 [rm: np o16 0f 13 /r] 386,UNDOC,ND
|
|
UMOV reg32,mem [rm: np o32 0f 13 /r] 386,UNDOC,SM,ND
|
|
UMOV reg32,reg32 [rm: np o32 0f 13 /r] 386,UNDOC,ND
|
|
VERR mem [m: 0f 00 /4] 286,PROT
|
|
VERR mem16 [m: 0f 00 /4] 286,PROT
|
|
VERR reg16 [m: 0f 00 /4] 286,PROT
|
|
VERW mem [m: 0f 00 /5] 286,PROT
|
|
VERW mem16 [m: 0f 00 /5] 286,PROT
|
|
VERW reg16 [m: 0f 00 /5] 286,PROT
|
|
FWAIT void [ wait] 8086
|
|
WBINVD void [ 0f 09] 486,PRIV
|
|
WRSHR rm32 [m: o32 0f 37 /0] P6,CYRIX,SMM
|
|
WRMSR void [ 0f 30] PENT,PRIV
|
|
XADD mem,reg8 [mr: hle 0f c0 /r] 486,SM,LOCK
|
|
XADD reg8,reg8 [mr: 0f c0 /r] 486
|
|
XADD mem,reg16 [mr: hle o16 0f c1 /r] 486,SM,LOCK
|
|
XADD reg16,reg16 [mr: o16 0f c1 /r] 486
|
|
XADD mem,reg32 [mr: hle o32 0f c1 /r] 486,SM,LOCK
|
|
XADD reg32,reg32 [mr: o32 0f c1 /r] 486
|
|
XADD mem,reg64 [mr: hle o64 0f c1 /r] X64,SM,LOCK
|
|
XADD reg64,reg64 [mr: o64 0f c1 /r] X64
|
|
XBTS reg16,mem [rm: o16 0f a6 /r] 386,SW,UNDOC,ND
|
|
XBTS reg16,reg16 [rm: o16 0f a6 /r] 386,UNDOC,ND
|
|
XBTS reg32,mem [rm: o32 0f a6 /r] 386,SD,UNDOC,ND
|
|
XBTS reg32,reg32 [rm: o32 0f a6 /r] 386,UNDOC,ND
|
|
XCHG reg_ax,reg16 [-r: o16 90+r] 8086
|
|
XCHG reg_eax,reg32na [-r: o32 90+r] 386
|
|
XCHG reg_rax,reg64 [-r: o64 90+r] X64
|
|
XCHG reg16,reg_ax [r-: o16 90+r] 8086
|
|
XCHG reg32na,reg_eax [r-: o32 90+r] 386
|
|
XCHG reg64,reg_rax [r-: o64 90+r] X64
|
|
; This must be NOLONG since opcode 90 is NOP, and in 64-bit mode
|
|
; "xchg eax,eax" is *not* a NOP.
|
|
XCHG reg_eax,reg_eax [--: o32 90] 386,NOLONG
|
|
XCHG reg8,mem [rm: hlenl 86 /r] 8086,SM,LOCK
|
|
XCHG reg8,reg8 [rm: 86 /r] 8086
|
|
XCHG reg16,mem [rm: hlenl o16 87 /r] 8086,SM,LOCK
|
|
XCHG reg16,reg16 [rm: o16 87 /r] 8086
|
|
XCHG reg32,mem [rm: hlenl o32 87 /r] 386,SM,LOCK
|
|
XCHG reg32,reg32 [rm: o32 87 /r] 386
|
|
XCHG reg64,mem [rm: hlenl o64 87 /r] X64,SM,LOCK
|
|
XCHG reg64,reg64 [rm: o64 87 /r] X64
|
|
XCHG mem,reg8 [mr: hlenl 86 /r] 8086,SM,LOCK
|
|
XCHG reg8,reg8 [mr: 86 /r] 8086
|
|
XCHG mem,reg16 [mr: hlenl o16 87 /r] 8086,SM,LOCK
|
|
XCHG reg16,reg16 [mr: o16 87 /r] 8086
|
|
XCHG mem,reg32 [mr: hlenl o32 87 /r] 386,SM,LOCK
|
|
XCHG reg32,reg32 [mr: o32 87 /r] 386
|
|
XCHG mem,reg64 [mr: hlenl o64 87 /r] X64,SM,LOCK
|
|
XCHG reg64,reg64 [mr: o64 87 /r] X64
|
|
XLATB void [ d7] 8086
|
|
XLAT void [ d7] 8086
|
|
XOR mem,reg8 [mr: hle 30 /r] 8086,SM,LOCK
|
|
XOR reg8,reg8 [mr: 30 /r] 8086
|
|
XOR mem,reg16 [mr: hle o16 31 /r] 8086,SM,LOCK
|
|
XOR reg16,reg16 [mr: o16 31 /r] 8086
|
|
XOR mem,reg32 [mr: hle o32 31 /r] 386,SM,LOCK
|
|
XOR reg32,reg32 [mr: o32 31 /r] 386
|
|
XOR mem,reg64 [mr: hle o64 31 /r] X64,SM,LOCK
|
|
XOR reg64,reg64 [mr: o64 31 /r] X64
|
|
XOR reg8,mem [rm: 32 /r] 8086,SM
|
|
XOR reg8,reg8 [rm: 32 /r] 8086
|
|
XOR reg16,mem [rm: o16 33 /r] 8086,SM
|
|
XOR reg16,reg16 [rm: o16 33 /r] 8086
|
|
XOR reg32,mem [rm: o32 33 /r] 386,SM
|
|
XOR reg32,reg32 [rm: o32 33 /r] 386
|
|
XOR reg64,mem [rm: o64 33 /r] X64,SM
|
|
XOR reg64,reg64 [rm: o64 33 /r] X64
|
|
XOR rm16,imm8 [mi: hle o16 83 /6 ibx] 8086,LOCK
|
|
XOR rm32,imm8 [mi: hle o32 83 /6 ibx] 386,LOCK
|
|
XOR rm64,imm8 [mi: hle o64 83 /6 ibx] X64,LOCK
|
|
XOR reg_al,imm [-i: 34 ib] 8086,SM
|
|
XOR reg_ax,sbyte16 [mi: o16 83 /6 ibx] 8086,SM
|
|
XOR reg_ax,imm [-i: o16 35 iw] 8086,SM
|
|
XOR reg_eax,sbyte32 [mi: o32 83 /6 ibx] 386,SM
|
|
XOR reg_eax,imm [-i: o32 35 id] 386,SM
|
|
XOR reg_rax,sbyte64 [mi: o64 83 /6 ibx] X64,SM
|
|
XOR reg_rax,imm [-i: o64 35 idx] X64,SM
|
|
XOR rm8,imm [mi: hle 80 /6 ib] 8086,SM,LOCK
|
|
XOR rm16,imm [mi: hle o16 81+s /6 ibw] 8086,SM,LOCK
|
|
XOR rm32,imm [mi: hle o32 81+s /6 ibd] 386,SM,LOCK
|
|
XOR rm64,imm [mi: hle o64 81+s /6 ibd,s] X64,SM,LOCK
|
|
XOR mem,imm8 [mi: hle 80 /6 ib] 8086,SM,LOCK
|
|
XOR mem,imm16 [mi: hle o16 81+s /6 ibw] 8086,SM,LOCK
|
|
XOR mem,imm32 [mi: hle o32 81+s /6 ibd] 386,SM,LOCK
|
|
CMOVcc reg16,mem [rm: o16 0f 40+c /r] P6,SM
|
|
CMOVcc reg16,reg16 [rm: o16 0f 40+c /r] P6
|
|
CMOVcc reg32,mem [rm: o32 0f 40+c /r] P6,SM
|
|
CMOVcc reg32,reg32 [rm: o32 0f 40+c /r] P6
|
|
CMOVcc reg64,mem [rm: o64 0f 40+c /r] X64,SM
|
|
CMOVcc reg64,reg64 [rm: o64 0f 40+c /r] X64
|
|
Jcc imm|near [i: odf 0f 80+c rel] 386
|
|
Jcc imm16|near [i: o16 0f 80+c rel] 386
|
|
Jcc imm32|near [i: o32 0f 80+c rel] 386
|
|
Jcc imm|short [i: 70+c rel8] 8086,ND
|
|
Jcc imm [i: jcc8 70+c rel8] 8086,ND
|
|
Jcc imm [i: 0f 80+c rel] 386,ND
|
|
Jcc imm [i: 71+c jlen e9 rel] 8086,ND
|
|
Jcc imm [i: 70+c rel8] 8086
|
|
SETcc mem [m: 0f 90+c /0] 386,SB
|
|
SETcc reg8 [m: 0f 90+c /0] 386
|
|
|
|
;# Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
|
|
ADDPS xmmreg,xmmrm128 [rm: np 0f 58 /r] KATMAI,SSE
|
|
ADDSS xmmreg,xmmrm32 [rm: f3 0f 58 /r] KATMAI,SSE
|
|
ANDNPS xmmreg,xmmrm128 [rm: np 0f 55 /r] KATMAI,SSE
|
|
ANDPS xmmreg,xmmrm128 [rm: np 0f 54 /r] KATMAI,SSE
|
|
CMPEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 00] KATMAI,SSE
|
|
CMPEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 00] KATMAI,SSE
|
|
CMPLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 02] KATMAI,SSE
|
|
CMPLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 02] KATMAI,SSE
|
|
CMPLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 01] KATMAI,SSE
|
|
CMPLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 01] KATMAI,SSE
|
|
CMPNEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 04] KATMAI,SSE
|
|
CMPNEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 04] KATMAI,SSE
|
|
CMPNLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 06] KATMAI,SSE
|
|
CMPNLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 06] KATMAI,SSE
|
|
CMPNLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 05] KATMAI,SSE
|
|
CMPNLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 05] KATMAI,SSE
|
|
CMPORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 07] KATMAI,SSE
|
|
CMPORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 07] KATMAI,SSE
|
|
CMPUNORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 03] KATMAI,SSE
|
|
CMPUNORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 03] KATMAI,SSE
|
|
; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
|
|
; specific ops first and only disassemble illegal ones as cmpps/cmpss.
|
|
CMPPS xmmreg,mem,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
|
|
CMPPS xmmreg,xmmreg,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
|
|
CMPSS xmmreg,mem,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
|
|
CMPSS xmmreg,xmmreg,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
|
|
COMISS xmmreg,xmmrm32 [rm: np 0f 2f /r] KATMAI,SSE
|
|
CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] KATMAI,SSE,MMX
|
|
CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] KATMAI,SSE,MMX
|
|
CVTSI2SS xmmreg,mem [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1,ND
|
|
CVTSI2SS xmmreg,rm32 [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1
|
|
CVTSI2SS xmmreg,rm64 [rm: o64 f3 0f 2a /r] X64,SSE,SQ,AR1
|
|
CVTSS2SI reg32,xmmreg [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
|
|
CVTSS2SI reg32,mem [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
|
|
CVTSS2SI reg64,xmmreg [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
|
|
CVTSS2SI reg64,mem [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
|
|
CVTTPS2PI mmxreg,xmmrm [rm: np 0f 2c /r] KATMAI,SSE,MMX,SQ
|
|
CVTTSS2SI reg32,xmmrm [rm: f3 0f 2c /r] KATMAI,SSE,SD,AR1
|
|
CVTTSS2SI reg64,xmmrm [rm: o64 f3 0f 2c /r] X64,SSE,SD,AR1
|
|
DIVPS xmmreg,xmmrm128 [rm: np 0f 5e /r] KATMAI,SSE
|
|
DIVSS xmmreg,xmmrm32 [rm: f3 0f 5e /r] KATMAI,SSE
|
|
LDMXCSR mem32 [m: 0f ae /2] KATMAI,SSE
|
|
MAXPS xmmreg,xmmrm128 [rm: np 0f 5f /r] KATMAI,SSE
|
|
MAXSS xmmreg,xmmrm32 [rm: f3 0f 5f /r] KATMAI,SSE
|
|
MINPS xmmreg,xmmrm128 [rm: np 0f 5d /r] KATMAI,SSE
|
|
MINSS xmmreg,xmmrm32 [rm: f3 0f 5d /r] KATMAI,SSE
|
|
MOVAPS xmmreg,xmmrm128 [rm: np 0f 28 /r] KATMAI,SSE
|
|
MOVAPS xmmrm128,xmmreg [mr: np 0f 29 /r] KATMAI,SSE
|
|
MOVHPS xmmreg,mem64 [rm: np 0f 16 /r] KATMAI,SSE
|
|
MOVHPS mem64,xmmreg [mr: np 0f 17 /r] KATMAI,SSE
|
|
MOVLHPS xmmreg,xmmreg [rm: np 0f 16 /r] KATMAI,SSE
|
|
MOVLPS xmmreg,mem64 [rm: np 0f 12 /r] KATMAI,SSE
|
|
MOVLPS mem64,xmmreg [mr: np 0f 13 /r] KATMAI,SSE
|
|
MOVHLPS xmmreg,xmmreg [rm: np 0f 12 /r] KATMAI,SSE
|
|
MOVMSKPS reg32,xmmreg [rm: np 0f 50 /r] KATMAI,SSE
|
|
MOVMSKPS reg64,xmmreg [rm: np o64 0f 50 /r] X64,SSE
|
|
MOVNTPS mem128,xmmreg [mr: np 0f 2b /r] KATMAI,SSE
|
|
MOVSS xmmreg,xmmrm32 [rm: f3 0f 10 /r] KATMAI,SSE
|
|
MOVSS mem32,xmmreg [mr: f3 0f 11 /r] KATMAI,SSE
|
|
MOVSS xmmreg,xmmreg [rm: f3 0f 10 /r] KATMAI,SSE
|
|
MOVUPS xmmreg,xmmrm128 [rm: np 0f 10 /r] KATMAI,SSE
|
|
MOVUPS xmmrm128,xmmreg [mr: np 0f 11 /r] KATMAI,SSE
|
|
MULPS xmmreg,xmmrm128 [rm: np 0f 59 /r] KATMAI,SSE
|
|
MULSS xmmreg,xmmrm32 [rm: f3 0f 59 /r] KATMAI,SSE
|
|
ORPS xmmreg,xmmrm128 [rm: np 0f 56 /r] KATMAI,SSE
|
|
RCPPS xmmreg,xmmrm128 [rm: np 0f 53 /r] KATMAI,SSE
|
|
RCPSS xmmreg,xmmrm32 [rm: f3 0f 53 /r] KATMAI,SSE
|
|
RSQRTPS xmmreg,xmmrm128 [rm: np 0f 52 /r] KATMAI,SSE
|
|
RSQRTSS xmmreg,xmmrm32 [rm: f3 0f 52 /r] KATMAI,SSE
|
|
SHUFPS xmmreg,xmmrm128,imm8 [rmi: np 0f c6 /r ib,u] KATMAI,SSE
|
|
SQRTPS xmmreg,xmmrm128 [rm: np 0f 51 /r] KATMAI,SSE
|
|
SQRTSS xmmreg,xmmrm32 [rm: f3 0f 51 /r] KATMAI,SSE
|
|
STMXCSR mem32 [m: 0f ae /3] KATMAI,SSE
|
|
SUBPS xmmreg,xmmrm128 [rm: np 0f 5c /r] KATMAI,SSE
|
|
SUBSS xmmreg,xmmrm32 [rm: f3 0f 5c /r] KATMAI,SSE
|
|
UCOMISS xmmreg,xmmrm32 [rm: np 0f 2e /r] KATMAI,SSE
|
|
UNPCKHPS xmmreg,xmmrm128 [rm: np 0f 15 /r] KATMAI,SSE
|
|
UNPCKLPS xmmreg,xmmrm128 [rm: np 0f 14 /r] KATMAI,SSE
|
|
XORPS xmmreg,xmmrm128 [rm: np 0f 57 /r] KATMAI,SSE
|
|
|
|
;# Introduced in Deschutes but necessary for SSE support
|
|
FXRSTOR mem [m: 0f ae /1] P6,SSE,FPU
|
|
FXRSTOR64 mem [m: o64 0f ae /1] X64,SSE,FPU
|
|
FXSAVE mem [m: 0f ae /0] P6,SSE,FPU
|
|
FXSAVE64 mem [m: o64 0f ae /0] X64,SSE,FPU
|
|
|
|
;# XSAVE group (AVX and extended state)
|
|
; Introduced in late Penryn ... we really need to clean up the handling
|
|
; of CPU feature bits.
|
|
XGETBV void [ np 0f 01 d0] NEHALEM
|
|
XSETBV void [ np 0f 01 d1] NEHALEM,PRIV
|
|
XSAVE mem [m: 0f ae /4] NEHALEM
|
|
XSAVE64 mem [m: o64 0f ae /4] LONG,NEHALEM
|
|
XSAVEOPT mem [m: 0f ae /6] FUTURE
|
|
XSAVEOPT64 mem [m: o64 0f ae /6] LONG,FUTURE
|
|
XRSTOR mem [m: 0f ae /5] NEHALEM
|
|
XRSTOR64 mem [m: o64 0f ae /5] LONG,NEHALEM
|
|
|
|
; These instructions are not SSE-specific; they are
|
|
;# Generic memory operations
|
|
; and work even if CR4.OSFXFR == 0
|
|
PREFETCHNTA mem [m: 0f 18 /0] KATMAI
|
|
PREFETCHT0 mem [m: 0f 18 /1] KATMAI
|
|
PREFETCHT1 mem [m: 0f 18 /2] KATMAI
|
|
PREFETCHT2 mem [m: 0f 18 /3] KATMAI
|
|
SFENCE void [ 0f ae f8] KATMAI
|
|
|
|
;# New MMX instructions introduced in Katmai
|
|
MASKMOVQ mmxreg,mmxreg [rm: np 0f f7 /r] KATMAI,MMX
|
|
MOVNTQ mem,mmxreg [mr: np 0f e7 /r] KATMAI,MMX,SQ
|
|
PAVGB mmxreg,mmxrm [rm: np o64nw 0f e0 /r] KATMAI,MMX,SQ
|
|
PAVGW mmxreg,mmxrm [rm: np o64nw 0f e3 /r] KATMAI,MMX,SQ
|
|
PEXTRW reg32,mmxreg,imm [rmi: np 0f c5 /r ib,u] KATMAI,MMX,SB,AR2
|
|
; PINSRW is documented as using a reg32, but it's really using only 16 bit
|
|
; -- accept either, but be truthful in disassembly
|
|
PINSRW mmxreg,mem,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
|
|
PINSRW mmxreg,rm16,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
|
|
PINSRW mmxreg,reg32,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
|
|
PMAXSW mmxreg,mmxrm [rm: np o64nw 0f ee /r] KATMAI,MMX,SQ
|
|
PMAXUB mmxreg,mmxrm [rm: np o64nw 0f de /r] KATMAI,MMX,SQ
|
|
PMINSW mmxreg,mmxrm [rm: np o64nw 0f ea /r] KATMAI,MMX,SQ
|
|
PMINUB mmxreg,mmxrm [rm: np o64nw 0f da /r] KATMAI,MMX,SQ
|
|
PMOVMSKB reg32,mmxreg [rm: np 0f d7 /r] KATMAI,MMX
|
|
PMULHUW mmxreg,mmxrm [rm: np o64nw 0f e4 /r] KATMAI,MMX,SQ
|
|
PSADBW mmxreg,mmxrm [rm: np o64nw 0f f6 /r] KATMAI,MMX,SQ
|
|
PSHUFW mmxreg,mmxrm,imm [rmi: np o64nw 0f 70 /r ib] KATMAI,MMX,SM2,SB,AR2
|
|
|
|
;# AMD Enhanced 3DNow! (Athlon) instructions
|
|
PF2IW mmxreg,mmxrm [rm: o64nw 0f 0f /r 1c] PENT,3DNOW,SQ
|
|
PFNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8a] PENT,3DNOW,SQ
|
|
PFPNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8e] PENT,3DNOW,SQ
|
|
PI2FW mmxreg,mmxrm [rm: o64nw 0f 0f /r 0c] PENT,3DNOW,SQ
|
|
PSWAPD mmxreg,mmxrm [rm: o64nw 0f 0f /r bb] PENT,3DNOW,SQ
|
|
|
|
;# Willamette SSE2 Cacheability Instructions
|
|
MASKMOVDQU xmmreg,xmmreg [rm: 66 0f f7 /r] WILLAMETTE,SSE2
|
|
; CLFLUSH needs its own feature flag implemented one day
|
|
CLFLUSH mem [m: 0f ae /7] WILLAMETTE,SSE2
|
|
MOVNTDQ mem,xmmreg [mr: 66 0f e7 /r] WILLAMETTE,SSE2,SO
|
|
MOVNTI mem,reg32 [mr: np 0f c3 /r] WILLAMETTE,SD
|
|
MOVNTI mem,reg64 [mr: o64 np 0f c3 /r] X64,SQ
|
|
MOVNTPD mem,xmmreg [mr: 66 0f 2b /r] WILLAMETTE,SSE2,SO
|
|
LFENCE void [ 0f ae e8] WILLAMETTE,SSE2
|
|
MFENCE void [ 0f ae f0] WILLAMETTE,SSE2
|
|
|
|
;# Willamette MMX instructions (SSE2 SIMD Integer Instructions)
|
|
MOVD mem,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2,SD
|
|
MOVD xmmreg,mem [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2,SD
|
|
MOVD xmmreg,rm32 [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2
|
|
MOVD rm32,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2
|
|
MOVDQA xmmreg,xmmreg [rm: 66 0f 6f /r] WILLAMETTE,SSE2
|
|
MOVDQA mem,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2,SO
|
|
MOVDQA xmmreg,mem [rm: 66 0f 6f /r] WILLAMETTE,SSE2,SO
|
|
MOVDQA xmmreg,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2
|
|
MOVDQU xmmreg,xmmreg [rm: f3 0f 6f /r] WILLAMETTE,SSE2
|
|
MOVDQU mem,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2,SO
|
|
MOVDQU xmmreg,mem [rm: f3 0f 6f /r] WILLAMETTE,SSE2,SO
|
|
MOVDQU xmmreg,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2
|
|
MOVDQ2Q mmxreg,xmmreg [rm: f2 0f d6 /r] WILLAMETTE,SSE2
|
|
MOVQ xmmreg,xmmreg [rm: f3 0f 7e /r] WILLAMETTE,SSE2
|
|
MOVQ xmmreg,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2
|
|
MOVQ mem,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2,SQ
|
|
MOVQ xmmreg,mem [rm: f3 0f 7e /r] WILLAMETTE,SSE2,SQ
|
|
MOVQ xmmreg,rm64 [rm: 66 o64 0f 6e /r] X64,SSE2
|
|
MOVQ rm64,xmmreg [mr: 66 o64 0f 7e /r] X64,SSE2
|
|
MOVQ2DQ xmmreg,mmxreg [rm: f3 0f d6 /r] WILLAMETTE,SSE2
|
|
PACKSSWB xmmreg,xmmrm [rm: 66 0f 63 /r] WILLAMETTE,SSE2,SO
|
|
PACKSSDW xmmreg,xmmrm [rm: 66 0f 6b /r] WILLAMETTE,SSE2,SO
|
|
PACKUSWB xmmreg,xmmrm [rm: 66 0f 67 /r] WILLAMETTE,SSE2,SO
|
|
PADDB xmmreg,xmmrm [rm: 66 0f fc /r] WILLAMETTE,SSE2,SO
|
|
PADDW xmmreg,xmmrm [rm: 66 0f fd /r] WILLAMETTE,SSE2,SO
|
|
PADDD xmmreg,xmmrm [rm: 66 0f fe /r] WILLAMETTE,SSE2,SO
|
|
PADDQ mmxreg,mmxrm [rm: np 0f d4 /r] WILLAMETTE,MMX,SQ
|
|
PADDQ xmmreg,xmmrm [rm: 66 0f d4 /r] WILLAMETTE,SSE2,SO
|
|
PADDSB xmmreg,xmmrm [rm: 66 0f ec /r] WILLAMETTE,SSE2,SO
|
|
PADDSW xmmreg,xmmrm [rm: 66 0f ed /r] WILLAMETTE,SSE2,SO
|
|
PADDUSB xmmreg,xmmrm [rm: 66 0f dc /r] WILLAMETTE,SSE2,SO
|
|
PADDUSW xmmreg,xmmrm [rm: 66 0f dd /r] WILLAMETTE,SSE2,SO
|
|
PAND xmmreg,xmmrm [rm: 66 0f db /r] WILLAMETTE,SSE2,SO
|
|
PANDN xmmreg,xmmrm [rm: 66 0f df /r] WILLAMETTE,SSE2,SO
|
|
PAVGB xmmreg,xmmrm [rm: 66 0f e0 /r] WILLAMETTE,SSE2,SO
|
|
PAVGW xmmreg,xmmrm [rm: 66 0f e3 /r] WILLAMETTE,SSE2,SO
|
|
PCMPEQB xmmreg,xmmrm [rm: 66 0f 74 /r] WILLAMETTE,SSE2,SO
|
|
PCMPEQW xmmreg,xmmrm [rm: 66 0f 75 /r] WILLAMETTE,SSE2,SO
|
|
PCMPEQD xmmreg,xmmrm [rm: 66 0f 76 /r] WILLAMETTE,SSE2,SO
|
|
PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r] WILLAMETTE,SSE2,SO
|
|
PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r] WILLAMETTE,SSE2,SO
|
|
PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r] WILLAMETTE,SSE2,SO
|
|
PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u] WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,reg32,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2,ND
|
|
PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
|
|
PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
|
|
PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r] WILLAMETTE,SSE2,SO
|
|
PMAXSW xmmreg,xmmrm [rm: 66 0f ee /r] WILLAMETTE,SSE2,SO
|
|
PMAXUB xmmreg,xmmrm [rm: 66 0f de /r] WILLAMETTE,SSE2,SO
|
|
PMINSW xmmreg,xmmrm [rm: 66 0f ea /r] WILLAMETTE,SSE2,SO
|
|
PMINUB xmmreg,xmmrm [rm: 66 0f da /r] WILLAMETTE,SSE2,SO
|
|
PMOVMSKB reg32,xmmreg [rm: 66 0f d7 /r] WILLAMETTE,SSE2
|
|
PMULHUW xmmreg,xmmrm [rm: 66 0f e4 /r] WILLAMETTE,SSE2,SO
|
|
PMULHW xmmreg,xmmrm [rm: 66 0f e5 /r] WILLAMETTE,SSE2,SO
|
|
PMULLW xmmreg,xmmrm [rm: 66 0f d5 /r] WILLAMETTE,SSE2,SO
|
|
PMULUDQ mmxreg,mmxrm [rm: np o64nw 0f f4 /r] WILLAMETTE,SSE2,SO
|
|
PMULUDQ xmmreg,xmmrm [rm: 66 0f f4 /r] WILLAMETTE,SSE2,SO
|
|
POR xmmreg,xmmrm [rm: 66 0f eb /r] WILLAMETTE,SSE2,SO
|
|
PSADBW xmmreg,xmmrm [rm: 66 0f f6 /r] WILLAMETTE,SSE2,SO
|
|
PSHUFD xmmreg,xmmreg,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFD xmmreg,mem,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSHUFHW xmmreg,xmmreg,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFHW xmmreg,mem,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSHUFLW xmmreg,xmmreg,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
|
|
PSHUFLW xmmreg,mem,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
|
|
PSLLDQ xmmreg,imm [mi: 66 0f 73 /7 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSLLW xmmreg,xmmrm [rm: 66 0f f1 /r] WILLAMETTE,SSE2,SO
|
|
PSLLW xmmreg,imm [mi: 66 0f 71 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSLLD xmmreg,xmmrm [rm: 66 0f f2 /r] WILLAMETTE,SSE2,SO
|
|
PSLLD xmmreg,imm [mi: 66 0f 72 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSLLQ xmmreg,xmmrm [rm: 66 0f f3 /r] WILLAMETTE,SSE2,SO
|
|
PSLLQ xmmreg,imm [mi: 66 0f 73 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRAW xmmreg,xmmrm [rm: 66 0f e1 /r] WILLAMETTE,SSE2,SO
|
|
PSRAW xmmreg,imm [mi: 66 0f 71 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRAD xmmreg,xmmrm [rm: 66 0f e2 /r] WILLAMETTE,SSE2,SO
|
|
PSRAD xmmreg,imm [mi: 66 0f 72 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRLDQ xmmreg,imm [mi: 66 0f 73 /3 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRLW xmmreg,xmmrm [rm: 66 0f d1 /r] WILLAMETTE,SSE2,SO
|
|
PSRLW xmmreg,imm [mi: 66 0f 71 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRLD xmmreg,xmmrm [rm: 66 0f d2 /r] WILLAMETTE,SSE2,SO
|
|
PSRLD xmmreg,imm [mi: 66 0f 72 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSRLQ xmmreg,xmmrm [rm: 66 0f d3 /r] WILLAMETTE,SSE2,SO
|
|
PSRLQ xmmreg,imm [mi: 66 0f 73 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
|
|
PSUBB xmmreg,xmmrm [rm: 66 0f f8 /r] WILLAMETTE,SSE2,SO
|
|
PSUBW xmmreg,xmmrm [rm: 66 0f f9 /r] WILLAMETTE,SSE2,SO
|
|
PSUBD xmmreg,xmmrm [rm: 66 0f fa /r] WILLAMETTE,SSE2,SO
|
|
PSUBQ mmxreg,mmxrm [rm: np o64nw 0f fb /r] WILLAMETTE,SSE2,SO
|
|
PSUBQ xmmreg,xmmrm [rm: 66 0f fb /r] WILLAMETTE,SSE2,SO
|
|
PSUBSB xmmreg,xmmrm [rm: 66 0f e8 /r] WILLAMETTE,SSE2,SO
|
|
PSUBSW xmmreg,xmmrm [rm: 66 0f e9 /r] WILLAMETTE,SSE2,SO
|
|
PSUBUSB xmmreg,xmmrm [rm: 66 0f d8 /r] WILLAMETTE,SSE2,SO
|
|
PSUBUSW xmmreg,xmmrm [rm: 66 0f d9 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKHBW xmmreg,xmmrm [rm: 66 0f 68 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKHWD xmmreg,xmmrm [rm: 66 0f 69 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKHDQ xmmreg,xmmrm [rm: 66 0f 6a /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKHQDQ xmmreg,xmmrm [rm: 66 0f 6d /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKLBW xmmreg,xmmrm [rm: 66 0f 60 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKLWD xmmreg,xmmrm [rm: 66 0f 61 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKLDQ xmmreg,xmmrm [rm: 66 0f 62 /r] WILLAMETTE,SSE2,SO
|
|
PUNPCKLQDQ xmmreg,xmmrm [rm: 66 0f 6c /r] WILLAMETTE,SSE2,SO
|
|
PXOR xmmreg,xmmrm [rm: 66 0f ef /r] WILLAMETTE,SSE2,SO
|
|
|
|
;# Willamette Streaming SIMD instructions (SSE2)
|
|
ADDPD xmmreg,xmmrm [rm: 66 0f 58 /r] WILLAMETTE,SSE2,SO
|
|
ADDSD xmmreg,xmmrm [rm: f2 0f 58 /r] WILLAMETTE,SSE2,SQ
|
|
ANDNPD xmmreg,xmmrm [rm: 66 0f 55 /r] WILLAMETTE,SSE2,SO
|
|
ANDPD xmmreg,xmmrm [rm: 66 0f 54 /r] WILLAMETTE,SSE2,SO
|
|
CMPEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 00] WILLAMETTE,SSE2,SO
|
|
CMPEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 00] WILLAMETTE,SSE2
|
|
CMPLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 02] WILLAMETTE,SSE2,SO
|
|
CMPLESD xmmreg,xmmrm [rm: f2 0f c2 /r 02] WILLAMETTE,SSE2
|
|
CMPLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 01] WILLAMETTE,SSE2,SO
|
|
CMPLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 01] WILLAMETTE,SSE2
|
|
CMPNEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 04] WILLAMETTE,SSE2,SO
|
|
CMPNEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 04] WILLAMETTE,SSE2
|
|
CMPNLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 06] WILLAMETTE,SSE2,SO
|
|
CMPNLESD xmmreg,xmmrm [rm: f2 0f c2 /r 06] WILLAMETTE,SSE2
|
|
CMPNLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 05] WILLAMETTE,SSE2,SO
|
|
CMPNLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 05] WILLAMETTE,SSE2
|
|
CMPORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 07] WILLAMETTE,SSE2,SO
|
|
CMPORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 07] WILLAMETTE,SSE2
|
|
CMPUNORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 03] WILLAMETTE,SSE2,SO
|
|
CMPUNORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 03] WILLAMETTE,SSE2
|
|
; CMPPD/CMPSD must come after the specific ops; that way the disassembler will find the
|
|
; specific ops first and only disassemble illegal ones as cmppd/cmpsd.
|
|
CMPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c2 /r ib,u] WILLAMETTE,SSE2
|
|
CMPSD xmmreg,xmmrm128,imm8 [rmi: f2 0f c2 /r ib,u] WILLAMETTE,SSE2
|
|
COMISD xmmreg,xmmrm [rm: 66 0f 2f /r] WILLAMETTE,SSE2
|
|
CVTDQ2PD xmmreg,xmmrm [rm: f3 0f e6 /r] WILLAMETTE,SSE2,SQ
|
|
CVTDQ2PS xmmreg,xmmrm [rm: np 0f 5b /r] WILLAMETTE,SSE2,SO
|
|
CVTPD2DQ xmmreg,xmmrm [rm: f2 0f e6 /r] WILLAMETTE,SSE2,SO
|
|
CVTPD2PI mmxreg,xmmrm [rm: 66 0f 2d /r] WILLAMETTE,SSE2,SO
|
|
CVTPD2PS xmmreg,xmmrm [rm: 66 0f 5a /r] WILLAMETTE,SSE2,SO
|
|
CVTPI2PD xmmreg,mmxrm [rm: 66 0f 2a /r] WILLAMETTE,SSE2,SQ
|
|
CVTPS2DQ xmmreg,xmmrm [rm: 66 0f 5b /r] WILLAMETTE,SSE2,SO
|
|
CVTPS2PD xmmreg,xmmrm [rm: np 0f 5a /r] WILLAMETTE,SSE2,SQ
|
|
CVTSD2SI reg32,xmmreg [rm: f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
|
|
CVTSD2SI reg32,mem [rm: f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
|
|
CVTSD2SI reg64,xmmreg [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
|
|
CVTSD2SI reg64,mem [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
|
|
CVTSD2SS xmmreg,xmmrm [rm: f2 0f 5a /r] WILLAMETTE,SSE2,SQ
|
|
CVTSI2SD xmmreg,mem [rm: f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1,ND
|
|
CVTSI2SD xmmreg,rm32 [rm: f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1
|
|
CVTSI2SD xmmreg,rm64 [rm: o64 f2 0f 2a /r] X64,SSE2,SQ,AR1
|
|
CVTSS2SD xmmreg,xmmrm [rm: f3 0f 5a /r] WILLAMETTE,SSE2,SD
|
|
CVTTPD2PI mmxreg,xmmrm [rm: 66 0f 2c /r] WILLAMETTE,SSE2,SO
|
|
CVTTPD2DQ xmmreg,xmmrm [rm: 66 0f e6 /r] WILLAMETTE,SSE2,SO
|
|
CVTTPS2DQ xmmreg,xmmrm [rm: f3 0f 5b /r] WILLAMETTE,SSE2,SO
|
|
CVTTSD2SI reg32,xmmreg [rm: f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
|
|
CVTTSD2SI reg32,mem [rm: f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
|
|
CVTTSD2SI reg64,xmmreg [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
|
|
CVTTSD2SI reg64,mem [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
|
|
DIVPD xmmreg,xmmrm [rm: 66 0f 5e /r] WILLAMETTE,SSE2,SO
|
|
DIVSD xmmreg,xmmrm [rm: f2 0f 5e /r] WILLAMETTE,SSE2
|
|
MAXPD xmmreg,xmmrm [rm: 66 0f 5f /r] WILLAMETTE,SSE2,SO
|
|
MAXSD xmmreg,xmmrm [rm: f2 0f 5f /r] WILLAMETTE,SSE2
|
|
MINPD xmmreg,xmmrm [rm: 66 0f 5d /r] WILLAMETTE,SSE2,SO
|
|
MINSD xmmreg,xmmrm [rm: f2 0f 5d /r] WILLAMETTE,SSE2
|
|
MOVAPD xmmreg,xmmreg [rm: 66 0f 28 /r] WILLAMETTE,SSE2
|
|
MOVAPD xmmreg,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2
|
|
MOVAPD mem,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2,SO
|
|
MOVAPD xmmreg,mem [rm: 66 0f 28 /r] WILLAMETTE,SSE2,SO
|
|
MOVHPD mem,xmmreg [mr: 66 0f 17 /r] WILLAMETTE,SSE2
|
|
MOVHPD xmmreg,mem [rm: 66 0f 16 /r] WILLAMETTE,SSE2
|
|
MOVLPD mem,xmmreg [mr: 66 0f 13 /r] WILLAMETTE,SSE2
|
|
MOVLPD xmmreg,mem [rm: 66 0f 12 /r] WILLAMETTE,SSE2
|
|
MOVMSKPD reg32,xmmreg [rm: 66 0f 50 /r] WILLAMETTE,SSE2
|
|
MOVMSKPD reg64,xmmreg [rm: 66 o64 0f 50 /r] X64,SSE2
|
|
MOVSD xmmreg,xmmreg [rm: f2 0f 10 /r] WILLAMETTE,SSE2
|
|
MOVSD xmmreg,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
|
|
MOVSD mem64,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
|
|
MOVSD xmmreg,mem64 [rm: f2 0f 10 /r] WILLAMETTE,SSE2
|
|
MOVUPD xmmreg,xmmreg [rm: 66 0f 10 /r] WILLAMETTE,SSE2
|
|
MOVUPD xmmreg,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2
|
|
MOVUPD mem,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2,SO
|
|
MOVUPD xmmreg,mem [rm: 66 0f 10 /r] WILLAMETTE,SSE2,SO
|
|
MULPD xmmreg,xmmrm [rm: 66 0f 59 /r] WILLAMETTE,SSE2,SO
|
|
MULSD xmmreg,xmmrm [rm: f2 0f 59 /r] WILLAMETTE,SSE2
|
|
ORPD xmmreg,xmmrm [rm: 66 0f 56 /r] WILLAMETTE,SSE2,SO
|
|
SHUFPD xmmreg,xmmreg,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SB,AR2
|
|
SHUFPD xmmreg,mem,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SM,SB,AR2
|
|
SQRTPD xmmreg,xmmrm [rm: 66 0f 51 /r] WILLAMETTE,SSE2,SO
|
|
SQRTSD xmmreg,xmmrm [rm: f2 0f 51 /r] WILLAMETTE,SSE2
|
|
SUBPD xmmreg,xmmrm [rm: 66 0f 5c /r] WILLAMETTE,SSE2,SO
|
|
SUBSD xmmreg,xmmrm [rm: f2 0f 5c /r] WILLAMETTE,SSE2
|
|
UCOMISD xmmreg,xmmrm [rm: 66 0f 2e /r] WILLAMETTE,SSE2
|
|
UNPCKHPD xmmreg,xmmrm128 [rm: 66 0f 15 /r] WILLAMETTE,SSE2
|
|
UNPCKLPD xmmreg,xmmrm128 [rm: 66 0f 14 /r] WILLAMETTE,SSE2
|
|
XORPD xmmreg,xmmrm128 [rm: 66 0f 57 /r] WILLAMETTE,SSE2
|
|
|
|
;# Prescott New Instructions (SSE3)
|
|
ADDSUBPD xmmreg,xmmrm [rm: 66 0f d0 /r] PRESCOTT,SSE3,SO
|
|
ADDSUBPS xmmreg,xmmrm [rm: f2 0f d0 /r] PRESCOTT,SSE3,SO
|
|
HADDPD xmmreg,xmmrm [rm: 66 0f 7c /r] PRESCOTT,SSE3,SO
|
|
HADDPS xmmreg,xmmrm [rm: f2 0f 7c /r] PRESCOTT,SSE3,SO
|
|
HSUBPD xmmreg,xmmrm [rm: 66 0f 7d /r] PRESCOTT,SSE3,SO
|
|
HSUBPS xmmreg,xmmrm [rm: f2 0f 7d /r] PRESCOTT,SSE3,SO
|
|
LDDQU xmmreg,mem [rm: f2 0f f0 /r] PRESCOTT,SSE3,SO
|
|
MOVDDUP xmmreg,xmmrm [rm: f2 0f 12 /r] PRESCOTT,SSE3
|
|
MOVSHDUP xmmreg,xmmrm [rm: f3 0f 16 /r] PRESCOTT,SSE3
|
|
MOVSLDUP xmmreg,xmmrm [rm: f3 0f 12 /r] PRESCOTT,SSE3
|
|
|
|
;# VMX Instructions
|
|
VMCALL void [ 0f 01 c1] VMX
|
|
VMCLEAR mem [m: 66 0f c7 /6] VMX
|
|
VMFUNC void [ 0f 01 d4] VMX
|
|
VMLAUNCH void [ 0f 01 c2] VMX
|
|
VMLOAD void [ 0f 01 da] X64,VMX
|
|
VMMCALL void [ 0f 01 d9] X64,VMX
|
|
VMPTRLD mem [m: 0f c7 /6] VMX
|
|
VMPTRST mem [m: 0f c7 /7] VMX
|
|
VMREAD rm32,reg32 [mr: np 0f 78 /r] VMX,NOLONG,SD
|
|
VMREAD rm64,reg64 [mr: o64nw np 0f 78 /r] X64,VMX,SQ
|
|
VMRESUME void [ 0f 01 c3] VMX
|
|
VMRUN void [ 0f 01 d8] X64,VMX
|
|
VMSAVE void [ 0f 01 db] X64,VMX
|
|
VMWRITE reg32,rm32 [rm: np 0f 79 /r] VMX,NOLONG,SD
|
|
VMWRITE reg64,rm64 [rm: o64nw np 0f 79 /r] X64,VMX,SQ
|
|
VMXOFF void [ 0f 01 c4] VMX
|
|
VMXON mem [m: f3 0f c7 /6] VMX
|
|
;# Extended Page Tables VMX instructions
|
|
INVEPT reg32,mem [rm: 66 0f 38 80 /r] VMX,SO,NOLONG
|
|
INVEPT reg64,mem [rm: o64nw 66 0f 38 80 /r] VMX,SO,LONG
|
|
INVVPID reg32,mem [rm: 66 0f 38 81 /r] VMX,SO,NOLONG
|
|
INVVPID reg64,mem [rm: o64nw 66 0f 38 81 /r] VMX,SO,LONG
|
|
|
|
;# Tejas New Instructions (SSSE3)
|
|
PABSB mmxreg,mmxrm [rm: np 0f 38 1c /r] SSSE3,MMX,SQ
|
|
PABSB xmmreg,xmmrm [rm: 66 0f 38 1c /r] SSSE3
|
|
PABSW mmxreg,mmxrm [rm: np 0f 38 1d /r] SSSE3,MMX,SQ
|
|
PABSW xmmreg,xmmrm [rm: 66 0f 38 1d /r] SSSE3
|
|
PABSD mmxreg,mmxrm [rm: np 0f 38 1e /r] SSSE3,MMX,SQ
|
|
PABSD xmmreg,xmmrm [rm: 66 0f 38 1e /r] SSSE3
|
|
PALIGNR mmxreg,mmxrm,imm [rmi: np 0f 3a 0f /r ib,u] SSSE3,MMX,SQ
|
|
PALIGNR xmmreg,xmmrm,imm [rmi: 66 0f 3a 0f /r ib,u] SSSE3
|
|
PHADDW mmxreg,mmxrm [rm: np 0f 38 01 /r] SSSE3,MMX,SQ
|
|
PHADDW xmmreg,xmmrm [rm: 66 0f 38 01 /r] SSSE3
|
|
PHADDD mmxreg,mmxrm [rm: np 0f 38 02 /r] SSSE3,MMX,SQ
|
|
PHADDD xmmreg,xmmrm [rm: 66 0f 38 02 /r] SSSE3
|
|
PHADDSW mmxreg,mmxrm [rm: np 0f 38 03 /r] SSSE3,MMX,SQ
|
|
PHADDSW xmmreg,xmmrm [rm: 66 0f 38 03 /r] SSSE3
|
|
PHSUBW mmxreg,mmxrm [rm: np 0f 38 05 /r] SSSE3,MMX,SQ
|
|
PHSUBW xmmreg,xmmrm [rm: 66 0f 38 05 /r] SSSE3
|
|
PHSUBD mmxreg,mmxrm [rm: np 0f 38 06 /r] SSSE3,MMX,SQ
|
|
PHSUBD xmmreg,xmmrm [rm: 66 0f 38 06 /r] SSSE3
|
|
PHSUBSW mmxreg,mmxrm [rm: np 0f 38 07 /r] SSSE3,MMX,SQ
|
|
PHSUBSW xmmreg,xmmrm [rm: 66 0f 38 07 /r] SSSE3
|
|
PMADDUBSW mmxreg,mmxrm [rm: np 0f 38 04 /r] SSSE3,MMX,SQ
|
|
PMADDUBSW xmmreg,xmmrm [rm: 66 0f 38 04 /r] SSSE3
|
|
PMULHRSW mmxreg,mmxrm [rm: np 0f 38 0b /r] SSSE3,MMX,SQ
|
|
PMULHRSW xmmreg,xmmrm [rm: 66 0f 38 0b /r] SSSE3
|
|
PSHUFB mmxreg,mmxrm [rm: np 0f 38 00 /r] SSSE3,MMX,SQ
|
|
PSHUFB xmmreg,xmmrm [rm: 66 0f 38 00 /r] SSSE3
|
|
PSIGNB mmxreg,mmxrm [rm: np 0f 38 08 /r] SSSE3,MMX,SQ
|
|
PSIGNB xmmreg,xmmrm [rm: 66 0f 38 08 /r] SSSE3
|
|
PSIGNW mmxreg,mmxrm [rm: np 0f 38 09 /r] SSSE3,MMX,SQ
|
|
PSIGNW xmmreg,xmmrm [rm: 66 0f 38 09 /r] SSSE3
|
|
PSIGND mmxreg,mmxrm [rm: np 0f 38 0a /r] SSSE3,MMX,SQ
|
|
PSIGND xmmreg,xmmrm [rm: 66 0f 38 0a /r] SSSE3
|
|
|
|
;# AMD SSE4A
|
|
EXTRQ xmmreg,imm,imm [mij: 66 0f 78 /0 ib,u ib,u] SSE4A,AMD
|
|
EXTRQ xmmreg,xmmreg [rm: 66 0f 79 /r] SSE4A,AMD
|
|
INSERTQ xmmreg,xmmreg,imm,imm [rmij: f2 0f 78 /r ib,u ib,u] SSE4A,AMD
|
|
INSERTQ xmmreg,xmmreg [rm: f2 0f 79 /r] SSE4A,AMD
|
|
MOVNTSD mem,xmmreg [mr: f2 0f 2b /r] SSE4A,AMD,SQ
|
|
MOVNTSS mem,xmmreg [mr: f3 0f 2b /r] SSE4A,AMD,SD
|
|
|
|
;# New instructions in Barcelona
|
|
LZCNT reg16,rm16 [rm: o16 f3i 0f bd /r] P6,AMD
|
|
LZCNT reg32,rm32 [rm: o32 f3i 0f bd /r] P6,AMD
|
|
LZCNT reg64,rm64 [rm: o64 f3i 0f bd /r] X64,AMD
|
|
|
|
;# Penryn New Instructions (SSE4.1)
|
|
BLENDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0d /r ib,u] SSE41
|
|
BLENDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0c /r ib,u] SSE41
|
|
BLENDVPD xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 15 /r] SSE41
|
|
BLENDVPS xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 14 /r] SSE41
|
|
DPPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 41 /r ib,u] SSE41
|
|
DPPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 40 /r ib,u] SSE41
|
|
EXTRACTPS rm32,xmmreg,imm [mri: 66 0f 3a 17 /r ib,u] SSE41
|
|
EXTRACTPS reg64,xmmreg,imm [mri: o64 66 0f 3a 17 /r ib,u] SSE41,X64
|
|
INSERTPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 21 /r ib,u] SSE41,SD
|
|
MOVNTDQA xmmreg,mem [rm: 66 0f 38 2a /r] SSE41
|
|
MPSADBW xmmreg,xmmrm,imm [rmi: 66 0f 3a 42 /r ib,u] SSE41
|
|
PACKUSDW xmmreg,xmmrm [rm: 66 0f 38 2b /r] SSE41
|
|
PBLENDVB xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 10 /r] SSE41
|
|
PBLENDW xmmreg,xmmrm,imm [rmi: 66 0f 3a 0e /r ib,u] SSE41
|
|
PCMPEQQ xmmreg,xmmrm [rm: 66 0f 38 29 /r] SSE41
|
|
PEXTRB reg32,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
|
|
PEXTRB mem8,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
|
|
PEXTRB reg64,xmmreg,imm [mri: o64 66 0f 3a 14 /r ib,u] SSE41,X64
|
|
PEXTRD rm32,xmmreg,imm [mri: 66 0f 3a 16 /r ib,u] SSE41
|
|
PEXTRQ rm64,xmmreg,imm [mri: o64 66 0f 3a 16 /r ib,u] SSE41,X64
|
|
PEXTRW reg32,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
|
|
PEXTRW mem16,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
|
|
PEXTRW reg64,xmmreg,imm [mri: o64 66 0f 3a 15 /r ib,u] SSE41,X64
|
|
PHMINPOSUW xmmreg,xmmrm [rm: 66 0f 38 41 /r] SSE41
|
|
PINSRB xmmreg,mem,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
|
|
PINSRB xmmreg,rm8,imm [rmi: nohi 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
|
|
PINSRB xmmreg,reg32,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
|
|
PINSRD xmmreg,mem,imm [rmi: 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
|
|
PINSRD xmmreg,rm32,imm [rmi: 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
|
|
PINSRQ xmmreg,mem,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
|
|
PINSRQ xmmreg,rm64,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
|
|
PMAXSB xmmreg,xmmrm [rm: 66 0f 38 3c /r] SSE41
|
|
PMAXSD xmmreg,xmmrm [rm: 66 0f 38 3d /r] SSE41
|
|
PMAXUD xmmreg,xmmrm [rm: 66 0f 38 3f /r] SSE41
|
|
PMAXUW xmmreg,xmmrm [rm: 66 0f 38 3e /r] SSE41
|
|
PMINSB xmmreg,xmmrm [rm: 66 0f 38 38 /r] SSE41
|
|
PMINSD xmmreg,xmmrm [rm: 66 0f 38 39 /r] SSE41
|
|
PMINUD xmmreg,xmmrm [rm: 66 0f 38 3b /r] SSE41
|
|
PMINUW xmmreg,xmmrm [rm: 66 0f 38 3a /r] SSE41
|
|
PMOVSXBW xmmreg,xmmrm [rm: 66 0f 38 20 /r] SSE41,SQ
|
|
PMOVSXBD xmmreg,xmmrm [rm: 66 0f 38 21 /r] SSE41,SD
|
|
PMOVSXBQ xmmreg,xmmrm [rm: 66 0f 38 22 /r] SSE41,SW
|
|
PMOVSXWD xmmreg,xmmrm [rm: 66 0f 38 23 /r] SSE41,SQ
|
|
PMOVSXWQ xmmreg,xmmrm [rm: 66 0f 38 24 /r] SSE41,SD
|
|
PMOVSXDQ xmmreg,xmmrm [rm: 66 0f 38 25 /r] SSE41,SQ
|
|
PMOVZXBW xmmreg,xmmrm [rm: 66 0f 38 30 /r] SSE41,SQ
|
|
PMOVZXBD xmmreg,xmmrm [rm: 66 0f 38 31 /r] SSE41,SD
|
|
PMOVZXBQ xmmreg,xmmrm [rm: 66 0f 38 32 /r] SSE41,SW
|
|
PMOVZXWD xmmreg,xmmrm [rm: 66 0f 38 33 /r] SSE41,SQ
|
|
PMOVZXWQ xmmreg,xmmrm [rm: 66 0f 38 34 /r] SSE41,SD
|
|
PMOVZXDQ xmmreg,xmmrm [rm: 66 0f 38 35 /r] SSE41,SQ
|
|
PMULDQ xmmreg,xmmrm [rm: 66 0f 38 28 /r] SSE41
|
|
PMULLD xmmreg,xmmrm [rm: 66 0f 38 40 /r] SSE41
|
|
PTEST xmmreg,xmmrm [rm: 66 0f 38 17 /r] SSE41
|
|
ROUNDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 09 /r ib,u] SSE41
|
|
ROUNDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 08 /r ib,u] SSE41
|
|
ROUNDSD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0b /r ib,u] SSE41
|
|
ROUNDSS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0a /r ib,u] SSE41
|
|
|
|
;# Nehalem New Instructions (SSE4.2)
|
|
CRC32 reg32,rm8 [rm: f2i 0f 38 f0 /r] SSE42
|
|
CRC32 reg32,rm16 [rm: o16 f2i 0f 38 f1 /r] SSE42
|
|
CRC32 reg32,rm32 [rm: o32 f2i 0f 38 f1 /r] SSE42
|
|
CRC32 reg64,rm8 [rm: o64 f2i 0f 38 f0 /r] SSE42,X64
|
|
CRC32 reg64,rm64 [rm: o64 f2i 0f 38 f1 /r] SSE42,X64
|
|
PCMPESTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 61 /r ib,u] SSE42
|
|
PCMPESTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 60 /r ib,u] SSE42
|
|
PCMPISTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 63 /r ib,u] SSE42
|
|
PCMPISTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 62 /r ib,u] SSE42
|
|
PCMPGTQ xmmreg,xmmrm [rm: 66 0f 38 37 /r] SSE42
|
|
POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r] NEHALEM,SW
|
|
POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r] NEHALEM,SD
|
|
POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r] NEHALEM,SQ,X64
|
|
|
|
;# Intel SMX
|
|
GETSEC void [ 0f 37] KATMAI
|
|
|
|
;# Geode (Cyrix) 3DNow! additions
|
|
PFRCPV mmxreg,mmxrm [rm: o64nw 0f 0f /r 86] PENT,3DNOW,SQ,CYRIX
|
|
PFRSQRTV mmxreg,mmxrm [rm: o64nw 0f 0f /r 87] PENT,3DNOW,SQ,CYRIX
|
|
|
|
;# Intel new instructions in ???
|
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; Is NEHALEM right here?
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MOVBE reg16,mem16 [rm: o16 0f 38 f0 /r] NEHALEM,SM
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MOVBE reg32,mem32 [rm: o32 0f 38 f0 /r] NEHALEM,SM
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MOVBE reg64,mem64 [rm: o64 0f 38 f0 /r] NEHALEM,SM
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MOVBE mem16,reg16 [mr: o16 0f 38 f1 /r] NEHALEM,SM
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MOVBE mem32,reg32 [mr: o32 0f 38 f1 /r] NEHALEM,SM
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MOVBE mem64,reg64 [mr: o64 0f 38 f1 /r] NEHALEM,SM
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;# Intel AES instructions
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AESENC xmmreg,xmmrm128 [rm: 66 0f 38 dc /r] SSE,WESTMERE
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AESENCLAST xmmreg,xmmrm128 [rm: 66 0f 38 dd /r] SSE,WESTMERE
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AESDEC xmmreg,xmmrm128 [rm: 66 0f 38 de /r] SSE,WESTMERE
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AESDECLAST xmmreg,xmmrm128 [rm: 66 0f 38 df /r] SSE,WESTMERE
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AESIMC xmmreg,xmmrm128 [rm: 66 0f 38 db /r] SSE,WESTMERE
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AESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a df /r ib] SSE,WESTMERE
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;# Intel AVX AES instructions
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VAESENC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dc /r] AVX,SANDYBRIDGE
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VAESENCLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 dd /r] AVX,SANDYBRIDGE
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VAESDEC xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 de /r] AVX,SANDYBRIDGE
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VAESDECLAST xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 df /r] AVX,SANDYBRIDGE
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VAESIMC xmmreg,xmmrm128 [rm: vex.128.66.0f38 db /r] AVX,SANDYBRIDGE
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VAESKEYGENASSIST xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a df /r ib] AVX,SANDYBRIDGE
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;# Intel AVX instructions
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VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r] AVX,SANDYBRIDGE
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VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r] AVX,SANDYBRIDGE
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VADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 58 /r] AVX,SANDYBRIDGE
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VADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 58 /r] AVX,SANDYBRIDGE
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VADDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 58 /r] AVX,SANDYBRIDGE
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VADDSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 58 /r] AVX,SANDYBRIDGE
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VADDSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d0 /r] AVX,SANDYBRIDGE
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VADDSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d0 /r] AVX,SANDYBRIDGE
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VADDSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f d0 /r] AVX,SANDYBRIDGE
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VADDSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f d0 /r] AVX,SANDYBRIDGE
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VANDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 54 /r] AVX,SANDYBRIDGE
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VANDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 54 /r] AVX,SANDYBRIDGE
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VANDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 54 /r] AVX,SANDYBRIDGE
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VANDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 54 /r] AVX,SANDYBRIDGE
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VANDNPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 55 /r] AVX,SANDYBRIDGE
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VANDNPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 55 /r] AVX,SANDYBRIDGE
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VANDNPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 55 /r] AVX,SANDYBRIDGE
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VANDNPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 55 /r] AVX,SANDYBRIDGE
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VBLENDPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0d /r ib] AVX,SANDYBRIDGE
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VBLENDPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0d /r ib] AVX,SANDYBRIDGE
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VBLENDPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0c /r ib] AVX,SANDYBRIDGE
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VBLENDPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0c /r ib] AVX,SANDYBRIDGE
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VBLENDVPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4b /r /is4] AVX,SANDYBRIDGE
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VBLENDVPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4b /r /is4] AVX,SANDYBRIDGE
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VBLENDVPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4a /r /is4] AVX,SANDYBRIDGE
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VBLENDVPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a.w0 4a /r /is4] AVX,SANDYBRIDGE
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VBROADCASTSS xmmreg,mem32 [rm: vex.128.66.0f38.w0 18 /r] AVX,SANDYBRIDGE
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VBROADCASTSS ymmreg,mem32 [rm: vex.256.66.0f38.w0 18 /r] AVX,SANDYBRIDGE
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VBROADCASTSD ymmreg,mem64 [rm: vex.256.66.0f38.w0 19 /r] AVX,SANDYBRIDGE
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VBROADCASTF128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 1a /r] AVX,SANDYBRIDGE
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; Specific aliases first, then the generic version, to keep the disassembler happy...
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VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00] AVX,SANDYBRIDGE
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VCMPEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00] AVX,SANDYBRIDGE
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VCMPLT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02] AVX,SANDYBRIDGE
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VCMPLE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02] AVX,SANDYBRIDGE
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VCMPLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 02] AVX,SANDYBRIDGE
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VCMPLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 02] AVX,SANDYBRIDGE
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VCMPUNORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03] AVX,SANDYBRIDGE
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VCMPUNORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03] AVX,SANDYBRIDGE
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VCMPUNORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 03] AVX,SANDYBRIDGE
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VCMPUNORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 03] AVX,SANDYBRIDGE
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VCMPNEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04] AVX,SANDYBRIDGE
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VCMPNEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04] AVX,SANDYBRIDGE
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VCMPNEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 04] AVX,SANDYBRIDGE
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VCMPNEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 04] AVX,SANDYBRIDGE
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VCMPNLT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05] AVX,SANDYBRIDGE
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VCMPNLT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05] AVX,SANDYBRIDGE
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VCMPNLTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 05] AVX,SANDYBRIDGE
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VCMPNLTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 05] AVX,SANDYBRIDGE
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VCMPNLE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06] AVX,SANDYBRIDGE
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VCMPNLE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06] AVX,SANDYBRIDGE
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VCMPNLEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 06] AVX,SANDYBRIDGE
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VCMPNLEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 06] AVX,SANDYBRIDGE
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VCMPORD_QPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07] AVX,SANDYBRIDGE
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VCMPORD_QPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07] AVX,SANDYBRIDGE
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VCMPORDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 07] AVX,SANDYBRIDGE
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VCMPORDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 07] AVX,SANDYBRIDGE
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VCMPEQ_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 08] AVX,SANDYBRIDGE
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VCMPEQ_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 08] AVX,SANDYBRIDGE
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VCMPNGE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09] AVX,SANDYBRIDGE
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VCMPNGE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09] AVX,SANDYBRIDGE
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VCMPNGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 09] AVX,SANDYBRIDGE
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VCMPNGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 09] AVX,SANDYBRIDGE
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VCMPNGT_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a] AVX,SANDYBRIDGE
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VCMPNGT_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a] AVX,SANDYBRIDGE
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VCMPNGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0a] AVX,SANDYBRIDGE
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VCMPNGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0a] AVX,SANDYBRIDGE
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VCMPFALSE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b] AVX,SANDYBRIDGE
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VCMPFALSE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b] AVX,SANDYBRIDGE
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VCMPFALSEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0b] AVX,SANDYBRIDGE
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VCMPFALSEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0b] AVX,SANDYBRIDGE
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VCMPNEQ_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0c] AVX,SANDYBRIDGE
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VCMPNEQ_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0c] AVX,SANDYBRIDGE
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VCMPGE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d] AVX,SANDYBRIDGE
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VCMPGE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d] AVX,SANDYBRIDGE
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VCMPGEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0d] AVX,SANDYBRIDGE
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VCMPGEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0d] AVX,SANDYBRIDGE
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VCMPGT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e] AVX,SANDYBRIDGE
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VCMPGT_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e] AVX,SANDYBRIDGE
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VCMPGTPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0e] AVX,SANDYBRIDGE
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VCMPGTPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0e] AVX,SANDYBRIDGE
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VCMPTRUE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f] AVX,SANDYBRIDGE
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VCMPTRUE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f] AVX,SANDYBRIDGE
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VCMPTRUEPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 0f] AVX,SANDYBRIDGE
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VCMPTRUEPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 0f] AVX,SANDYBRIDGE
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VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPLT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 11] AVX,SANDYBRIDGE
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VCMPLT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 11] AVX,SANDYBRIDGE
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VCMPLE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 12] AVX,SANDYBRIDGE
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VCMPLE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 12] AVX,SANDYBRIDGE
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VCMPUNORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 13] AVX,SANDYBRIDGE
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VCMPUNORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 13] AVX,SANDYBRIDGE
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VCMPNEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 14] AVX,SANDYBRIDGE
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VCMPNEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 14] AVX,SANDYBRIDGE
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VCMPNLT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 15] AVX,SANDYBRIDGE
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VCMPNLT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 15] AVX,SANDYBRIDGE
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VCMPNLE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 16] AVX,SANDYBRIDGE
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VCMPNLE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 16] AVX,SANDYBRIDGE
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VCMPORD_SPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 17] AVX,SANDYBRIDGE
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VCMPORD_SPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 17] AVX,SANDYBRIDGE
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VCMPEQ_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 18] AVX,SANDYBRIDGE
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VCMPEQ_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 18] AVX,SANDYBRIDGE
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VCMPNGE_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 19] AVX,SANDYBRIDGE
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VCMPNGE_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 19] AVX,SANDYBRIDGE
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VCMPNGT_UQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1a] AVX,SANDYBRIDGE
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VCMPNGT_UQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1a] AVX,SANDYBRIDGE
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VCMPFALSE_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1b] AVX,SANDYBRIDGE
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VCMPFALSE_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1b] AVX,SANDYBRIDGE
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VCMPNEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1c] AVX,SANDYBRIDGE
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VCMPNEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1c] AVX,SANDYBRIDGE
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VCMPGE_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1d] AVX,SANDYBRIDGE
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VCMPGE_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1d] AVX,SANDYBRIDGE
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VCMPGT_OQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1e] AVX,SANDYBRIDGE
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VCMPGT_OQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1e] AVX,SANDYBRIDGE
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VCMPTRUE_USPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 1f] AVX,SANDYBRIDGE
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VCMPTRUE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1f] AVX,SANDYBRIDGE
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VCMPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c2 /r ib] AVX,SANDYBRIDGE
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VCMPPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c2 /r ib] AVX,SANDYBRIDGE
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; Specific aliases first, then the generic version, to keep the disassembler happy...
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VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10] AVX,SANDYBRIDGE
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VCMPEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00] AVX,SANDYBRIDGE
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VCMPEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00] AVX,SANDYBRIDGE
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VCMPLT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 01] AVX,SANDYBRIDGE
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VCMPLE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02] AVX,SANDYBRIDGE
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VCMPLE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPUNORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPUNORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPUNORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPUNORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPNEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNLT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPNLE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPNLEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPNLEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPORD_QPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPORD_QPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPORDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPORDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPEQ_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 08] AVX,SANDYBRIDGE
|
|
VCMPEQ_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 08] AVX,SANDYBRIDGE
|
|
VCMPNGE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGT_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPNGT_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPNGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPNGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPFALSEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPFALSEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0c] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0c] AVX,SANDYBRIDGE
|
|
VCMPGE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPGT_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPGTPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPGTPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPTRUE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPTRUEPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPTRUEPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPLT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 11] AVX,SANDYBRIDGE
|
|
VCMPLT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 11] AVX,SANDYBRIDGE
|
|
VCMPLE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 12] AVX,SANDYBRIDGE
|
|
VCMPLE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 12] AVX,SANDYBRIDGE
|
|
VCMPUNORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 13] AVX,SANDYBRIDGE
|
|
VCMPUNORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 13] AVX,SANDYBRIDGE
|
|
VCMPNEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 14] AVX,SANDYBRIDGE
|
|
VCMPNEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 14] AVX,SANDYBRIDGE
|
|
VCMPNLT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 15] AVX,SANDYBRIDGE
|
|
VCMPNLT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 15] AVX,SANDYBRIDGE
|
|
VCMPNLE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 16] AVX,SANDYBRIDGE
|
|
VCMPNLE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 16] AVX,SANDYBRIDGE
|
|
VCMPORD_SPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 17] AVX,SANDYBRIDGE
|
|
VCMPORD_SPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 17] AVX,SANDYBRIDGE
|
|
VCMPEQ_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 18] AVX,SANDYBRIDGE
|
|
VCMPEQ_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 18] AVX,SANDYBRIDGE
|
|
VCMPNGE_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 19] AVX,SANDYBRIDGE
|
|
VCMPNGE_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 19] AVX,SANDYBRIDGE
|
|
VCMPNGT_UQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1a] AVX,SANDYBRIDGE
|
|
VCMPNGT_UQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1b] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1c] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1c] AVX,SANDYBRIDGE
|
|
VCMPGE_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1d] AVX,SANDYBRIDGE
|
|
VCMPGE_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1d] AVX,SANDYBRIDGE
|
|
VCMPGT_OQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1e] AVX,SANDYBRIDGE
|
|
VCMPGT_OQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_USPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 1f] AVX,SANDYBRIDGE
|
|
VCMPTRUE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1f] AVX,SANDYBRIDGE
|
|
VCMPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c2 /r ib] AVX,SANDYBRIDGE
|
|
VCMPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c2 /r ib] AVX,SANDYBRIDGE
|
|
; Specific aliases first, then the generic version, to keep the disassembler happy...
|
|
VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00] AVX,SANDYBRIDGE
|
|
VCMPLT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
|
|
VCMPLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
|
|
VCMPLE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPUNORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPUNORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPNEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNLT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPNLESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPORD_QSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPORDSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPEQ_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 08] AVX,SANDYBRIDGE
|
|
VCMPNGE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGT_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPNGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPFALSESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0c] AVX,SANDYBRIDGE
|
|
VCMPGE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPGTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPTRUESD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPLT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 11] AVX,SANDYBRIDGE
|
|
VCMPLE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 12] AVX,SANDYBRIDGE
|
|
VCMPUNORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 13] AVX,SANDYBRIDGE
|
|
VCMPNEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 14] AVX,SANDYBRIDGE
|
|
VCMPNLT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 15] AVX,SANDYBRIDGE
|
|
VCMPNLE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 16] AVX,SANDYBRIDGE
|
|
VCMPORD_SSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 17] AVX,SANDYBRIDGE
|
|
VCMPEQ_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 18] AVX,SANDYBRIDGE
|
|
VCMPNGE_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 19] AVX,SANDYBRIDGE
|
|
VCMPNGT_UQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1c] AVX,SANDYBRIDGE
|
|
VCMPGE_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1d] AVX,SANDYBRIDGE
|
|
VCMPGT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1f] AVX,SANDYBRIDGE
|
|
VCMPSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f2.0f c2 /r ib] AVX,SANDYBRIDGE
|
|
; Specific aliases first, then the generic version, to keep the disassembler happy...
|
|
VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00] AVX,SANDYBRIDGE
|
|
VCMPLT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
|
|
VCMPLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
|
|
VCMPLE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 02] AVX,SANDYBRIDGE
|
|
VCMPUNORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPUNORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 03] AVX,SANDYBRIDGE
|
|
VCMPNEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 04] AVX,SANDYBRIDGE
|
|
VCMPNLT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 05] AVX,SANDYBRIDGE
|
|
VCMPNLE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPNLESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 06] AVX,SANDYBRIDGE
|
|
VCMPORD_QSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPORDSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 07] AVX,SANDYBRIDGE
|
|
VCMPEQ_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 08] AVX,SANDYBRIDGE
|
|
VCMPNGE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 09] AVX,SANDYBRIDGE
|
|
VCMPNGT_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPNGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPFALSESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0c] AVX,SANDYBRIDGE
|
|
VCMPGE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0d] AVX,SANDYBRIDGE
|
|
VCMPGT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPGTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPTRUESS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 0f] AVX,SANDYBRIDGE
|
|
VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10] AVX,SANDYBRIDGE
|
|
VCMPLT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 11] AVX,SANDYBRIDGE
|
|
VCMPLE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 12] AVX,SANDYBRIDGE
|
|
VCMPUNORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 13] AVX,SANDYBRIDGE
|
|
VCMPNEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 14] AVX,SANDYBRIDGE
|
|
VCMPNLT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 15] AVX,SANDYBRIDGE
|
|
VCMPNLE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 16] AVX,SANDYBRIDGE
|
|
VCMPORD_SSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 17] AVX,SANDYBRIDGE
|
|
VCMPEQ_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 18] AVX,SANDYBRIDGE
|
|
VCMPNGE_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 19] AVX,SANDYBRIDGE
|
|
VCMPNGT_UQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1a] AVX,SANDYBRIDGE
|
|
VCMPFALSE_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1b] AVX,SANDYBRIDGE
|
|
VCMPNEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1c] AVX,SANDYBRIDGE
|
|
VCMPGE_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1d] AVX,SANDYBRIDGE
|
|
VCMPGT_OQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1e] AVX,SANDYBRIDGE
|
|
VCMPTRUE_USSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 1f] AVX,SANDYBRIDGE
|
|
VCMPSS xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f3.0f c2 /r ib] AVX,SANDYBRIDGE
|
|
VCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2f /r] AVX,SANDYBRIDGE
|
|
VCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2f /r] AVX,SANDYBRIDGE
|
|
VCVTDQ2PD xmmreg,xmmrm64 [rm: vex.128.f3.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTDQ2PD ymmreg,xmmrm128 [rm: vex.256.f3.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTDQ2PS xmmreg,xmmrm128 [rm: vex.128.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTDQ2PS ymmreg,ymmrm256 [rm: vex.256.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE,SO
|
|
VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE,SY
|
|
VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE,SO
|
|
VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE,SY
|
|
VCVTPS2DQ xmmreg,xmmrm128 [rm: vex.128.66.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTPS2DQ ymmreg,ymmrm256 [rm: vex.256.66.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTPS2PD xmmreg,xmmrm64 [rm: vex.128.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTPS2PD ymmreg,xmmrm128 [rm: vex.256.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2d /r] AVX,SANDYBRIDGE
|
|
VCVTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG
|
|
VCVTSD2SS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,SD
|
|
VCVTSI2SD xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD
|
|
VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f2.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ
|
|
VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.lig.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,SD
|
|
VCVTSI2SS xmmreg,xmmreg*,mem32 [rvm: vex.nds.lig.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD
|
|
VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.lig.f3.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ
|
|
VCVTSS2SD xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5a /r] AVX,SANDYBRIDGE
|
|
VCVTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2d /r] AVX,SANDYBRIDGE
|
|
VCVTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG
|
|
VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE,SO
|
|
VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE
|
|
VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE,SY
|
|
VCVTTPS2DQ xmmreg,xmmrm128 [rm: vex.128.f3.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTTPS2DQ ymmreg,ymmrm256 [rm: vex.256.f3.0f 5b /r] AVX,SANDYBRIDGE
|
|
VCVTTSD2SI reg32,xmmrm64 [rm: vex.lig.f2.0f.w0 2c /r] AVX,SANDYBRIDGE
|
|
VCVTTSD2SI reg64,xmmrm64 [rm: vex.lig.f2.0f.w1 2c /r] AVX,SANDYBRIDGE,LONG
|
|
VCVTTSS2SI reg32,xmmrm32 [rm: vex.lig.f3.0f.w0 2c /r] AVX,SANDYBRIDGE
|
|
VCVTTSS2SI reg64,xmmrm32 [rm: vex.lig.f3.0f.w1 2c /r] AVX,SANDYBRIDGE,LONG
|
|
VDIVPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDIVPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDIVPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDIVPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDIVSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDIVSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5e /r] AVX,SANDYBRIDGE
|
|
VDPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 41 /r ib] AVX,SANDYBRIDGE
|
|
VDPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 40 /r ib] AVX,SANDYBRIDGE
|
|
VDPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 40 /r ib] AVX,SANDYBRIDGE
|
|
VEXTRACTF128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 19 /r ib] AVX,SANDYBRIDGE
|
|
VEXTRACTPS rm32,xmmreg,imm8 [mri: vex.128.66.0f3a 17 /r ib] AVX,SANDYBRIDGE
|
|
VHADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7c /r] AVX,SANDYBRIDGE
|
|
VHADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7c /r] AVX,SANDYBRIDGE
|
|
VHADDPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7c /r] AVX,SANDYBRIDGE
|
|
VHADDPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7c /r] AVX,SANDYBRIDGE
|
|
VHSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 7d /r] AVX,SANDYBRIDGE
|
|
VHSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 7d /r] AVX,SANDYBRIDGE
|
|
VHSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.f2.0f 7d /r] AVX,SANDYBRIDGE
|
|
VHSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7d /r] AVX,SANDYBRIDGE
|
|
VINSERTF128 ymmreg,ymmreg,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 18 /r ib] AVX,SANDYBRIDGE
|
|
VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 21 /r ib] AVX,SANDYBRIDGE
|
|
VLDDQU xmmreg,mem128 [rm: vex.128.f2.0f f0 /r] AVX,SANDYBRIDGE
|
|
VLDQQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE
|
|
VLDDQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE
|
|
VLDMXCSR mem32 [m: vex.lz.0f ae /2] AVX,SANDYBRIDGE
|
|
VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPS xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2c /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPS ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2c /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2e /r] AVX,SANDYBRIDGE,SO
|
|
VMASKMOVPS mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2e /r] AVX,SANDYBRIDGE,SY
|
|
VMASKMOVPD xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38.w0 2d /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPD ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38.w0 2d /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38.w0 2f /r] AVX,SANDYBRIDGE
|
|
VMASKMOVPD mem256,ymmreg,ymmreg [mvr: vex.nds.256.66.0f38.w0 2f /r] AVX,SANDYBRIDGE
|
|
VMAXPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMAXPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMAXPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMAXPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMAXSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMAXSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5f /r] AVX,SANDYBRIDGE
|
|
VMINPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMINPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMINPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMINPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMINSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMINSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5d /r] AVX,SANDYBRIDGE
|
|
VMOVAPD xmmreg,xmmrm128 [rm: vex.128.66.0f 28 /r] AVX,SANDYBRIDGE
|
|
VMOVAPD xmmrm128,xmmreg [mr: vex.128.66.0f 29 /r] AVX,SANDYBRIDGE
|
|
VMOVAPD ymmreg,ymmrm256 [rm: vex.256.66.0f 28 /r] AVX,SANDYBRIDGE
|
|
VMOVAPD ymmrm256,ymmreg [mr: vex.256.66.0f 29 /r] AVX,SANDYBRIDGE
|
|
VMOVAPS xmmreg,xmmrm128 [rm: vex.128.0f 28 /r] AVX,SANDYBRIDGE
|
|
VMOVAPS xmmrm128,xmmreg [mr: vex.128.0f 29 /r] AVX,SANDYBRIDGE
|
|
VMOVAPS ymmreg,ymmrm256 [rm: vex.256.0f 28 /r] AVX,SANDYBRIDGE
|
|
VMOVAPS ymmrm256,ymmreg [mr: vex.256.0f 29 /r] AVX,SANDYBRIDGE
|
|
VMOVD xmmreg,rm32 [rm: vex.128.66.0f.w0 6e /r] AVX,SANDYBRIDGE
|
|
VMOVD rm32,xmmreg [mr: vex.128.66.0f.w0 7e /r] AVX,SANDYBRIDGE
|
|
VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r] AVX,SANDYBRIDGE,SQ
|
|
VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r] AVX,SANDYBRIDGE,SQ
|
|
VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r] AVX,SANDYBRIDGE,LONG,SQ
|
|
VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r] AVX,SANDYBRIDGE,LONG,SQ
|
|
VMOVDDUP xmmreg,xmmrm64 [rm: vex.128.f2.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVDDUP ymmreg,ymmrm256 [rm: vex.256.f2.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVDQA xmmreg,xmmrm128 [rm: vex.128.66.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVDQA xmmrm128,xmmreg [mr: vex.128.66.0f 7f /r] AVX,SANDYBRIDGE
|
|
; These are officially documented as VMOVDQA, but VMOVQQA seems more logical to me...
|
|
VMOVQQA ymmreg,ymmrm256 [rm: vex.256.66.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVQQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r] AVX,SANDYBRIDGE
|
|
VMOVDQA ymmreg,ymmrm [rm: vex.256.66.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVDQA ymmrm256,ymmreg [mr: vex.256.66.0f 7f /r] AVX,SANDYBRIDGE
|
|
VMOVDQU xmmreg,xmmrm128 [rm: vex.128.f3.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVDQU xmmrm128,xmmreg [mr: vex.128.f3.0f 7f /r] AVX,SANDYBRIDGE
|
|
; These are officially documented as VMOVDQU, but VMOVQQU seems more logical to me...
|
|
VMOVQQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVQQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r] AVX,SANDYBRIDGE
|
|
VMOVDQU ymmreg,ymmrm256 [rm: vex.256.f3.0f 6f /r] AVX,SANDYBRIDGE
|
|
VMOVDQU ymmrm256,ymmreg [mr: vex.256.f3.0f 7f /r] AVX,SANDYBRIDGE
|
|
VMOVHLPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVHPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 16 /r] AVX,SANDYBRIDGE
|
|
VMOVHPD mem64,xmmreg [mr: vex.128.66.0f 17 /r] AVX,SANDYBRIDGE
|
|
VMOVHPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 16 /r] AVX,SANDYBRIDGE
|
|
VMOVHPS mem64,xmmreg [mr: vex.128.0f 17 /r] AVX,SANDYBRIDGE
|
|
VMOVLHPS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.128.0f 16 /r] AVX,SANDYBRIDGE
|
|
VMOVLPD xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.66.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVLPD mem64,xmmreg [mr: vex.128.66.0f 13 /r] AVX,SANDYBRIDGE
|
|
VMOVLPS xmmreg,xmmreg*,mem64 [rvm: vex.nds.128.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVLPS mem64,xmmreg [mr: vex.128.0f 13 /r] AVX,SANDYBRIDGE
|
|
VMOVMSKPD reg64,xmmreg [rm: vex.128.66.0f 50 /r] AVX,SANDYBRIDGE,LONG
|
|
VMOVMSKPD reg32,xmmreg [rm: vex.128.66.0f 50 /r] AVX,SANDYBRIDGE
|
|
VMOVMSKPD reg64,ymmreg [rm: vex.256.66.0f 50 /r] AVX,SANDYBRIDGE,LONG
|
|
VMOVMSKPD reg32,ymmreg [rm: vex.256.66.0f 50 /r] AVX,SANDYBRIDGE
|
|
VMOVMSKPS reg64,xmmreg [rm: vex.128.0f 50 /r] AVX,SANDYBRIDGE,LONG
|
|
VMOVMSKPS reg32,xmmreg [rm: vex.128.0f 50 /r] AVX,SANDYBRIDGE
|
|
VMOVMSKPS reg64,ymmreg [rm: vex.256.0f 50 /r] AVX,SANDYBRIDGE,LONG
|
|
VMOVMSKPS reg32,ymmreg [rm: vex.256.0f 50 /r] AVX,SANDYBRIDGE
|
|
VMOVNTDQ mem128,xmmreg [mr: vex.128.66.0f e7 /r] AVX,SANDYBRIDGE
|
|
; Officially VMOVNTDQ, but VMOVNTQQ seems more logical to me...
|
|
VMOVNTQQ mem256,ymmreg [mr: vex.256.66.0f e7 /r] AVX,SANDYBRIDGE
|
|
VMOVNTDQ mem256,ymmreg [mr: vex.256.66.0f e7 /r] AVX,SANDYBRIDGE
|
|
VMOVNTDQA xmmreg,mem128 [rm: vex.128.66.0f38 2a /r] AVX,SANDYBRIDGE
|
|
VMOVNTPD mem128,xmmreg [mr: vex.128.66.0f 2b /r] AVX,SANDYBRIDGE
|
|
VMOVNTPD mem256,ymmreg [mr: vex.256.66.0f 2b /r] AVX,SANDYBRIDGE
|
|
VMOVNTPS mem128,xmmreg [mr: vex.128.0f 2b /r] AVX,SANDYBRIDGE
|
|
VMOVNTPS mem128,ymmreg [mr: vex.256.0f 2b /r] AVX,SANDYBRIDGE
|
|
VMOVSD xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f2.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVSD xmmreg,mem64 [rm: vex.lig.f2.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVSD xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f2.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVSD mem64,xmmreg [mr: vex.lig.f2.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVSHDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 16 /r] AVX,SANDYBRIDGE
|
|
VMOVSHDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 16 /r] AVX,SANDYBRIDGE
|
|
VMOVSLDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVSLDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 12 /r] AVX,SANDYBRIDGE
|
|
VMOVSS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVSS xmmreg,mem32 [rm: vex.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVSS xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVSS mem32,xmmreg [mr: vex.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVUPD xmmreg,xmmrm128 [rm: vex.128.66.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVUPD xmmrm128,xmmreg [mr: vex.128.66.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVUPD ymmreg,ymmrm256 [rm: vex.256.66.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVUPD ymmrm256,ymmreg [mr: vex.256.66.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVUPS xmmreg,xmmrm128 [rm: vex.128.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVUPS xmmrm128,xmmreg [mr: vex.128.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMOVUPS ymmreg,ymmrm256 [rm: vex.256.0f 10 /r] AVX,SANDYBRIDGE
|
|
VMOVUPS ymmrm256,ymmreg [mr: vex.256.0f 11 /r] AVX,SANDYBRIDGE
|
|
VMPSADBW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 42 /r ib] AVX,SANDYBRIDGE
|
|
VMULPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 59 /r] AVX,SANDYBRIDGE
|
|
VMULPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 59 /r] AVX,SANDYBRIDGE
|
|
VMULPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 59 /r] AVX,SANDYBRIDGE
|
|
VMULPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 59 /r] AVX,SANDYBRIDGE
|
|
VMULSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 59 /r] AVX,SANDYBRIDGE
|
|
VMULSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 59 /r] AVX,SANDYBRIDGE
|
|
VORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 56 /r] AVX,SANDYBRIDGE
|
|
VORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 56 /r] AVX,SANDYBRIDGE
|
|
VORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 56 /r] AVX,SANDYBRIDGE
|
|
VPABSB xmmreg,xmmrm128 [rm: vex.128.66.0f38 1c /r] AVX,SANDYBRIDGE
|
|
VPABSW xmmreg,xmmrm128 [rm: vex.128.66.0f38 1d /r] AVX,SANDYBRIDGE
|
|
VPABSD xmmreg,xmmrm128 [rm: vex.128.66.0f38 1e /r] AVX,SANDYBRIDGE
|
|
VPACKSSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 63 /r] AVX,SANDYBRIDGE
|
|
VPACKSSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6b /r] AVX,SANDYBRIDGE
|
|
VPACKUSWB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 67 /r] AVX,SANDYBRIDGE
|
|
VPACKUSDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 2b /r] AVX,SANDYBRIDGE
|
|
VPADDB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fc /r] AVX,SANDYBRIDGE
|
|
VPADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fd /r] AVX,SANDYBRIDGE
|
|
VPADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fe /r] AVX,SANDYBRIDGE
|
|
VPADDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d4 /r] AVX,SANDYBRIDGE
|
|
VPADDSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ec /r] AVX,SANDYBRIDGE
|
|
VPADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ed /r] AVX,SANDYBRIDGE
|
|
VPADDUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dc /r] AVX,SANDYBRIDGE
|
|
VPADDUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f dd /r] AVX,SANDYBRIDGE
|
|
VPALIGNR xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0f /r ib] AVX,SANDYBRIDGE
|
|
VPAND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f db /r] AVX,SANDYBRIDGE
|
|
VPANDN xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f df /r] AVX,SANDYBRIDGE
|
|
VPAVGB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e0 /r] AVX,SANDYBRIDGE
|
|
VPAVGW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e3 /r] AVX,SANDYBRIDGE
|
|
VPBLENDVB xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.nds.128.66.0f3a.w0 4c /r /is4] AVX,SANDYBRIDGE
|
|
VPBLENDW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 0e /r ib] AVX,SANDYBRIDGE
|
|
VPCMPESTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 61 /r ib] AVX,SANDYBRIDGE
|
|
VPCMPESTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 60 /r ib] AVX,SANDYBRIDGE
|
|
VPCMPISTRI xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 63 /r ib] AVX,SANDYBRIDGE
|
|
VPCMPISTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 62 /r ib] AVX,SANDYBRIDGE
|
|
VPCMPEQB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 74 /r] AVX,SANDYBRIDGE
|
|
VPCMPEQW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 75 /r] AVX,SANDYBRIDGE
|
|
VPCMPEQD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 76 /r] AVX,SANDYBRIDGE
|
|
VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 29 /r] AVX,SANDYBRIDGE
|
|
VPCMPGTB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 64 /r] AVX,SANDYBRIDGE
|
|
VPCMPGTW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 65 /r] AVX,SANDYBRIDGE
|
|
VPCMPGTD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 66 /r] AVX,SANDYBRIDGE
|
|
VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 37 /r] AVX,SANDYBRIDGE
|
|
VPERMILPD xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
|
|
VPERMILPD ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
|
|
VPERMILPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 05 /r ib] AVX,SANDYBRIDGE
|
|
VPERMILPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 05 /r ib] AVX,SANDYBRIDGE
|
|
VPERMILPS xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0c /r] AVX,SANDYBRIDGE
|
|
VPERMILPS ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0c /r] AVX,SANDYBRIDGE
|
|
VPERMILPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
|
|
VPERMILPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
|
|
VPERM2F128 ymmreg,ymmreg,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRB reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPEXTRB reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRB mem8,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRW reg64,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPEXTRW reg32,xmmreg,imm8 [rmi: vex.128.66.0f.w0 c5 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRW reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPEXTRW reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRW mem16,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 15 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRD reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPEXTRD rm32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 16 /r ib] AVX,SANDYBRIDGE
|
|
VPEXTRQ rm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w1 16 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPHADDW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 01 /r] AVX,SANDYBRIDGE
|
|
VPHADDD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 02 /r] AVX,SANDYBRIDGE
|
|
VPHADDSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 03 /r] AVX,SANDYBRIDGE
|
|
VPHMINPOSUW xmmreg,xmmrm128 [rm: vex.128.66.0f38 41 /r] AVX,SANDYBRIDGE
|
|
VPHSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 05 /r] AVX,SANDYBRIDGE
|
|
VPHSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 06 /r] AVX,SANDYBRIDGE
|
|
VPHSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 07 /r] AVX,SANDYBRIDGE
|
|
VPINSRB xmmreg,xmmreg*,mem8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRB xmmreg,xmmreg*,rm8,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRB xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f3a 20 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRW xmmreg,xmmreg*,mem16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRW xmmreg,xmmreg*,rm16,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRW xmmreg,xmmreg*,reg32,imm8 [rvmi: vex.nds.128.66.0f c4 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRD xmmreg,xmmreg*,mem32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRD xmmreg,xmmreg*,rm32,imm8 [rvmi: vex.nds.128.66.0f3a.w0 22 /r ib] AVX,SANDYBRIDGE
|
|
VPINSRQ xmmreg,xmmreg*,mem64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPINSRQ xmmreg,xmmreg*,rm64,imm8 [rvmi: vex.nds.128.66.0f3a.w1 22 /r ib] AVX,SANDYBRIDGE,LONG
|
|
VPMADDWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f5 /r] AVX,SANDYBRIDGE
|
|
VPMADDUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 04 /r] AVX,SANDYBRIDGE
|
|
VPMAXSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3c /r] AVX,SANDYBRIDGE
|
|
VPMAXSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ee /r] AVX,SANDYBRIDGE
|
|
VPMAXSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3d /r] AVX,SANDYBRIDGE
|
|
VPMAXUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f de /r] AVX,SANDYBRIDGE
|
|
VPMAXUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3e /r] AVX,SANDYBRIDGE
|
|
VPMAXUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3f /r] AVX,SANDYBRIDGE
|
|
VPMINSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 38 /r] AVX,SANDYBRIDGE
|
|
VPMINSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ea /r] AVX,SANDYBRIDGE
|
|
VPMINSD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 39 /r] AVX,SANDYBRIDGE
|
|
VPMINUB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f da /r] AVX,SANDYBRIDGE
|
|
VPMINUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3a /r] AVX,SANDYBRIDGE
|
|
VPMINUD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 3b /r] AVX,SANDYBRIDGE
|
|
VPMOVMSKB reg64,xmmreg [rm: vex.128.66.0f d7 /r] AVX,SANDYBRIDGE,LONG
|
|
VPMOVMSKB reg32,xmmreg [rm: vex.128.66.0f d7 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 20 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 21 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 22 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 23 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 24 /r] AVX,SANDYBRIDGE
|
|
VPMOVSXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 25 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXBW xmmreg,xmmrm64 [rm: vex.128.66.0f38 30 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXBD xmmreg,xmmrm32 [rm: vex.128.66.0f38 31 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXBQ xmmreg,xmmrm16 [rm: vex.128.66.0f38 32 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXWD xmmreg,xmmrm64 [rm: vex.128.66.0f38 33 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXWQ xmmreg,xmmrm32 [rm: vex.128.66.0f38 34 /r] AVX,SANDYBRIDGE
|
|
VPMOVZXDQ xmmreg,xmmrm64 [rm: vex.128.66.0f38 35 /r] AVX,SANDYBRIDGE
|
|
VPMULHUW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e4 /r] AVX,SANDYBRIDGE
|
|
VPMULHRSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0b /r] AVX,SANDYBRIDGE
|
|
VPMULHW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e5 /r] AVX,SANDYBRIDGE
|
|
VPMULLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d5 /r] AVX,SANDYBRIDGE
|
|
VPMULLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 40 /r] AVX,SANDYBRIDGE
|
|
VPMULUDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f4 /r] AVX,SANDYBRIDGE
|
|
VPMULDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 28 /r] AVX,SANDYBRIDGE
|
|
VPOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f eb /r] AVX,SANDYBRIDGE
|
|
VPSADBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f6 /r] AVX,SANDYBRIDGE
|
|
VPSHUFB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 00 /r] AVX,SANDYBRIDGE
|
|
VPSHUFD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f 70 /r ib] AVX,SANDYBRIDGE
|
|
VPSHUFHW xmmreg,xmmrm128,imm8 [rmi: vex.128.f3.0f 70 /r ib] AVX,SANDYBRIDGE
|
|
VPSHUFLW xmmreg,xmmrm128,imm8 [rmi: vex.128.f2.0f 70 /r ib] AVX,SANDYBRIDGE
|
|
VPSIGNB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 08 /r] AVX,SANDYBRIDGE
|
|
VPSIGNW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 09 /r] AVX,SANDYBRIDGE
|
|
VPSIGND xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 0a /r] AVX,SANDYBRIDGE
|
|
VPSLLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /7 ib] AVX,SANDYBRIDGE
|
|
VPSRLDQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /3 ib] AVX,SANDYBRIDGE
|
|
VPSLLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f1 /r] AVX,SANDYBRIDGE
|
|
VPSLLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /6 ib] AVX,SANDYBRIDGE
|
|
VPSLLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f2 /r] AVX,SANDYBRIDGE
|
|
VPSLLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /6 ib] AVX,SANDYBRIDGE
|
|
VPSLLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f3 /r] AVX,SANDYBRIDGE
|
|
VPSLLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /6 ib] AVX,SANDYBRIDGE
|
|
VPSRAW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e1 /r] AVX,SANDYBRIDGE
|
|
VPSRAW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /4 ib] AVX,SANDYBRIDGE
|
|
VPSRAD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e2 /r] AVX,SANDYBRIDGE
|
|
VPSRAD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /4 ib] AVX,SANDYBRIDGE
|
|
VPSRLW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d1 /r] AVX,SANDYBRIDGE
|
|
VPSRLW xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 71 /2 ib] AVX,SANDYBRIDGE
|
|
VPSRLD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d2 /r] AVX,SANDYBRIDGE
|
|
VPSRLD xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 72 /2 ib] AVX,SANDYBRIDGE
|
|
VPSRLQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d3 /r] AVX,SANDYBRIDGE
|
|
VPSRLQ xmmreg,xmmreg*,imm8 [vmi: vex.ndd.128.66.0f 73 /2 ib] AVX,SANDYBRIDGE
|
|
VPTEST xmmreg,xmmrm128 [rm: vex.128.66.0f38 17 /r] AVX,SANDYBRIDGE
|
|
VPTEST ymmreg,ymmrm256 [rm: vex.256.66.0f38 17 /r] AVX,SANDYBRIDGE
|
|
VPSUBB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f8 /r] AVX,SANDYBRIDGE
|
|
VPSUBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f f9 /r] AVX,SANDYBRIDGE
|
|
VPSUBD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fa /r] AVX,SANDYBRIDGE
|
|
VPSUBQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f fb /r] AVX,SANDYBRIDGE
|
|
VPSUBSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e8 /r] AVX,SANDYBRIDGE
|
|
VPSUBSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f e9 /r] AVX,SANDYBRIDGE
|
|
VPSUBUSB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d8 /r] AVX,SANDYBRIDGE
|
|
VPSUBUSW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f d9 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKHBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 68 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKHWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 69 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKHDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6a /r] AVX,SANDYBRIDGE
|
|
VPUNPCKHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6d /r] AVX,SANDYBRIDGE
|
|
VPUNPCKLBW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 60 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKLWD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 61 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKLDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 62 /r] AVX,SANDYBRIDGE
|
|
VPUNPCKLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 6c /r] AVX,SANDYBRIDGE
|
|
VPXOR xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f ef /r] AVX,SANDYBRIDGE
|
|
VRCPPS xmmreg,xmmrm128 [rm: vex.128.0f 53 /r] AVX,SANDYBRIDGE
|
|
VRCPPS ymmreg,ymmrm256 [rm: vex.256.0f 53 /r] AVX,SANDYBRIDGE
|
|
VRCPSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 53 /r] AVX,SANDYBRIDGE
|
|
VRSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 52 /r] AVX,SANDYBRIDGE
|
|
VRSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 52 /r] AVX,SANDYBRIDGE
|
|
VRSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 52 /r] AVX,SANDYBRIDGE
|
|
VROUNDPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 09 /r ib] AVX,SANDYBRIDGE
|
|
VROUNDPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 09 /r ib] AVX,SANDYBRIDGE
|
|
VROUNDPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 08 /r ib] AVX,SANDYBRIDGE
|
|
VROUNDPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a 08 /r ib] AVX,SANDYBRIDGE
|
|
VROUNDSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.128.66.0f3a 0b /r ib] AVX,SANDYBRIDGE
|
|
VROUNDSS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 0a /r ib] AVX,SANDYBRIDGE
|
|
VSHUFPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c6 /r ib] AVX,SANDYBRIDGE
|
|
VSHUFPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c6 /r ib] AVX,SANDYBRIDGE
|
|
VSHUFPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c6 /r ib] AVX,SANDYBRIDGE
|
|
VSHUFPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c6 /r ib] AVX,SANDYBRIDGE
|
|
VSQRTPD xmmreg,xmmrm128 [rm: vex.128.66.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSQRTPD ymmreg,ymmrm256 [rm: vex.256.66.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSQRTPS xmmreg,xmmrm128 [rm: vex.128.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSQRTPS ymmreg,ymmrm256 [rm: vex.256.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSQRTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSQRTSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 51 /r] AVX,SANDYBRIDGE
|
|
VSTMXCSR mem32 [m: vex.128.0f ae /3] AVX,SANDYBRIDGE
|
|
VSUBPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 5c /r] AVX,SANDYBRIDGE
|
|
VSUBPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 5c /r] AVX,SANDYBRIDGE
|
|
VSUBPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 5c /r] AVX,SANDYBRIDGE
|
|
VSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 5c /r] AVX,SANDYBRIDGE
|
|
VSUBSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f 5c /r] AVX,SANDYBRIDGE
|
|
VSUBSS xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.lig.f3.0f 5c /r] AVX,SANDYBRIDGE
|
|
VTESTPS xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0e /r] AVX,SANDYBRIDGE
|
|
VTESTPS ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0e /r] AVX,SANDYBRIDGE
|
|
VTESTPD xmmreg,xmmrm128 [rm: vex.128.66.0f38.w0 0f /r] AVX,SANDYBRIDGE
|
|
VTESTPD ymmreg,ymmrm256 [rm: vex.256.66.0f38.w0 0f /r] AVX,SANDYBRIDGE
|
|
VUCOMISD xmmreg,xmmrm64 [rm: vex.lig.66.0f 2e /r] AVX,SANDYBRIDGE
|
|
VUCOMISS xmmreg,xmmrm32 [rm: vex.lig.0f 2e /r] AVX,SANDYBRIDGE
|
|
VUNPCKHPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 15 /r] AVX,SANDYBRIDGE
|
|
VUNPCKHPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 15 /r] AVX,SANDYBRIDGE
|
|
VUNPCKHPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 15 /r] AVX,SANDYBRIDGE
|
|
VUNPCKHPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 15 /r] AVX,SANDYBRIDGE
|
|
VUNPCKLPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 14 /r] AVX,SANDYBRIDGE
|
|
VUNPCKLPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 14 /r] AVX,SANDYBRIDGE
|
|
VUNPCKLPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 14 /r] AVX,SANDYBRIDGE
|
|
VUNPCKLPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 14 /r] AVX,SANDYBRIDGE
|
|
VXORPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 57 /r] AVX,SANDYBRIDGE
|
|
VXORPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 57 /r] AVX,SANDYBRIDGE
|
|
VXORPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f 57 /r] AVX,SANDYBRIDGE
|
|
VXORPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f 57 /r] AVX,SANDYBRIDGE
|
|
VZEROALL void [ vex.256.0f.w0 77] AVX,SANDYBRIDGE
|
|
VZEROUPPER void [ vex.128.0f.w0 77] AVX,SANDYBRIDGE
|
|
|
|
;# Intel Carry-Less Multiplication instructions (CLMUL)
|
|
PCLMULLQLQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 00] SSE,WESTMERE
|
|
PCLMULHQLQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 01] SSE,WESTMERE
|
|
PCLMULLQHQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 10] SSE,WESTMERE
|
|
PCLMULHQHQDQ xmmreg,xmmrm128 [rm: 66 0f 3a 44 /r 11] SSE,WESTMERE
|
|
PCLMULQDQ xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a 44 /r ib] SSE,WESTMERE
|
|
|
|
;# Intel AVX Carry-Less Multiplication instructions (CLMUL)
|
|
VPCLMULLQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 00] AVX,SANDYBRIDGE
|
|
VPCLMULHQLQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 01] AVX,SANDYBRIDGE
|
|
VPCLMULLQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 10] AVX,SANDYBRIDGE
|
|
VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f3a 44 /r 11] AVX,SANDYBRIDGE
|
|
VPCLMULQDQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a 44 /r ib] AVX,SANDYBRIDGE
|
|
|
|
;# Intel Fused Multiply-Add instructions (FMA)
|
|
VFMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE
|
|
VFMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE
|
|
VFMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE
|
|
VFMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE
|
|
VFMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE
|
|
VFMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE
|
|
VFMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE
|
|
VFMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE
|
|
VFMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE
|
|
VFMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE
|
|
VFMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE
|
|
VFMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE
|
|
VFMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE
|
|
VFMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE
|
|
VFMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE
|
|
VFMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE
|
|
VFMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE
|
|
VFMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE
|
|
VFMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE
|
|
VFMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE
|
|
VFMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE
|
|
VFMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE
|
|
VFMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE
|
|
VFMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE
|
|
VFMADDSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE
|
|
VFMADDSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE
|
|
VFMADDSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE
|
|
VFMADDSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE
|
|
VFMADDSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE
|
|
VFMADDSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE
|
|
VFMADDSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE
|
|
VFMADDSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE
|
|
VFMADDSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE
|
|
VFMADDSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE
|
|
VFMADDSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE
|
|
VFMADDSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE
|
|
VFMADDSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE
|
|
VFMADDSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE
|
|
VFMADDSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE
|
|
VFMADDSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE
|
|
VFMADDSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE
|
|
VFMADDSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE
|
|
VFMADDSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE
|
|
VFMADDSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE
|
|
VFMADDSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE
|
|
VFMADDSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE
|
|
VFMADDSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE
|
|
VFMADDSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE
|
|
VFMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE
|
|
VFMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE
|
|
VFMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE
|
|
VFMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE
|
|
VFMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE
|
|
VFMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE
|
|
VFMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE
|
|
VFMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE
|
|
VFMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE
|
|
VFMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE
|
|
VFMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE
|
|
VFMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE
|
|
VFMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE
|
|
VFMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE
|
|
VFMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE
|
|
VFMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE
|
|
VFMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE
|
|
VFMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE
|
|
VFMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE
|
|
VFMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE
|
|
VFMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE
|
|
VFMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE
|
|
VFMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE
|
|
VFMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE
|
|
VFMSUBADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE
|
|
VFMSUBADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE
|
|
VFMSUBADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE
|
|
VFMSUBADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE
|
|
VFMSUBADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE
|
|
VFMSUBADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE
|
|
VFMSUBADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE
|
|
VFMSUBADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE
|
|
VFMSUBADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE
|
|
VFMSUBADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE
|
|
VFMSUBADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE
|
|
VFMSUBADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE
|
|
VFMSUBADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE
|
|
VFMSUBADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE
|
|
VFMSUBADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE
|
|
VFMSUBADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE
|
|
VFMSUBADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE
|
|
VFMSUBADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE
|
|
VFMSUBADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE
|
|
VFMSUBADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE
|
|
VFMSUBADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE
|
|
VFMSUBADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE
|
|
VFMSUBADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE
|
|
VFMSUBADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE
|
|
VFNMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE
|
|
VFNMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE
|
|
VFNMADD132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE
|
|
VFNMADD132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE
|
|
VFNMADD312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE
|
|
VFNMADD312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE
|
|
VFNMADD312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE
|
|
VFNMADD312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE
|
|
VFNMADD213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE
|
|
VFNMADD213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE
|
|
VFNMADD213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE
|
|
VFNMADD213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE
|
|
VFNMADD123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE
|
|
VFNMADD123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE
|
|
VFNMADD123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE
|
|
VFNMADD123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE
|
|
VFNMADD231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE
|
|
VFNMADD231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE
|
|
VFNMADD231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE
|
|
VFNMADD231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE
|
|
VFNMADD321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE
|
|
VFNMADD321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE
|
|
VFNMADD321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE
|
|
VFNMADD321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE
|
|
VFNMSUB132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE
|
|
VFNMSUB132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE
|
|
VFNMSUB132PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE
|
|
VFNMSUB132PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE
|
|
VFNMSUB312PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE
|
|
VFNMSUB312PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE
|
|
VFNMSUB312PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE
|
|
VFNMSUB312PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE
|
|
VFNMSUB213PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE
|
|
VFNMSUB213PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE
|
|
VFNMSUB213PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE
|
|
VFNMSUB213PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE
|
|
VFNMSUB123PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE
|
|
VFNMSUB123PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE
|
|
VFNMSUB123PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE
|
|
VFNMSUB123PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE
|
|
VFNMSUB231PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE
|
|
VFNMSUB231PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE
|
|
VFNMSUB231PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE
|
|
VFNMSUB231PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE
|
|
VFNMSUB321PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE
|
|
VFNMSUB321PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE
|
|
VFNMSUB321PD xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE
|
|
VFNMSUB321PD ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE
|
|
VFMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE
|
|
VFMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE
|
|
VFMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE
|
|
VFMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE
|
|
VFMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE
|
|
VFMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE
|
|
VFMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE
|
|
VFMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE
|
|
VFMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE
|
|
VFMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE
|
|
VFMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE
|
|
VFMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE
|
|
VFMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE
|
|
VFMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE
|
|
VFMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE
|
|
VFMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE
|
|
VFMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE
|
|
VFMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE
|
|
VFMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE
|
|
VFMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE
|
|
VFMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE
|
|
VFMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE
|
|
VFMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE
|
|
VFMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE
|
|
VFNMADD132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE
|
|
VFNMADD132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE
|
|
VFNMADD312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE
|
|
VFNMADD312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE
|
|
VFNMADD213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE
|
|
VFNMADD213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE
|
|
VFNMADD123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE
|
|
VFNMADD123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE
|
|
VFNMADD231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE
|
|
VFNMADD231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE
|
|
VFNMADD321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE
|
|
VFNMADD321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE
|
|
VFNMSUB132SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE
|
|
VFNMSUB132SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE
|
|
VFNMSUB312SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE
|
|
VFNMSUB312SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE
|
|
VFNMSUB213SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE
|
|
VFNMSUB213SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE
|
|
VFNMSUB123SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE
|
|
VFNMSUB123SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE
|
|
VFNMSUB231SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE
|
|
VFNMSUB231SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE
|
|
VFNMSUB321SS xmmreg,xmmreg,xmmrm32 [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE
|
|
VFNMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE
|
|
|
|
;# Intel post-32 nm processor instructions
|
|
;
|
|
; Per AVX spec revision 7, document 319433-007
|
|
RDFSBASE reg32 [m: f3 0f ae /0] LONG,FUTURE
|
|
RDFSBASE reg64 [m: o64 f3 0f ae /0] LONG,FUTURE
|
|
RDGSBASE reg32 [m: f3 0f ae /1] LONG,FUTURE
|
|
RDGSBASE reg64 [m: o64 f3 0f ae /1] LONG,FUTURE
|
|
RDRAND reg16 [m: o16 0f c7 /6] FUTURE
|
|
RDRAND reg32 [m: o32 0f c7 /6] FUTURE
|
|
RDRAND reg64 [m: o64 0f c7 /6] LONG,FUTURE
|
|
WRFSBASE reg32 [m: f3 0f ae /2] LONG,FUTURE
|
|
WRFSBASE reg64 [m: o64 f3 0f ae /2] LONG,FUTURE
|
|
WRGSBASE reg32 [m: f3 0f ae /3] LONG,FUTURE
|
|
WRGSBASE reg64 [m: o64 f3 0f ae /3] LONG,FUTURE
|
|
VCVTPH2PS ymmreg,xmmrm128 [rm: vex.256.66.0f38.w0 13 /r] AVX,FUTURE
|
|
VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r] AVX,FUTURE
|
|
VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib] AVX,FUTURE
|
|
VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib] AVX,FUTURE
|
|
|
|
;# VIA (Centaur) security instructions
|
|
XSTORE void [ 0f a7 c0] PENT,CYRIX
|
|
XCRYPTECB void [ mustrep 0f a7 c8] PENT,CYRIX
|
|
XCRYPTCBC void [ mustrep 0f a7 d0] PENT,CYRIX
|
|
XCRYPTCTR void [ mustrep 0f a7 d8] PENT,CYRIX
|
|
XCRYPTCFB void [ mustrep 0f a7 e0] PENT,CYRIX
|
|
XCRYPTOFB void [ mustrep 0f a7 e8] PENT,CYRIX
|
|
MONTMUL void [ mustrep 0f a6 c0] PENT,CYRIX
|
|
XSHA1 void [ mustrep 0f a6 c8] PENT,CYRIX
|
|
XSHA256 void [ mustrep 0f a6 d0] PENT,CYRIX
|
|
|
|
;# AMD Lightweight Profiling (LWP) instructions
|
|
;
|
|
; based on pub number 43724 revision 3.04 date August 2009
|
|
;
|
|
; updated to match draft from AMD developer (patch has been
|
|
; sent to binutils
|
|
; 2010-03-22 Quentin Neill <quentin.neill@amd.com>
|
|
; Sebastian Pop <sebastian.pop@amd.com>
|
|
;
|
|
LLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /0] AMD,386
|
|
LLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /0] AMD,X64
|
|
|
|
SLWPCB reg32 [m: xop.m9.w0.l0.p0 12 /1] AMD,386
|
|
SLWPCB reg64 [m: xop.m9.w1.l0.p0 12 /1] AMD,X64
|
|
|
|
LWPVAL reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /1 id] AMD,386
|
|
LWPVAL reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /1 id] AMD,X64
|
|
|
|
LWPINS reg32,rm32,imm32 [vmi: xop.m10.w0.ndd.l0.p0 12 /0 id] AMD,386
|
|
LWPINS reg64,rm32,imm32 [vmi: xop.m10.w1.ndd.l0.p0 12 /0 id] AMD,X64
|
|
|
|
;# AMD XOP and FMA4 instructions (SSE5)
|
|
;
|
|
; based on pub number 43479 revision 3.04 dated November 2009
|
|
;
|
|
VFMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 69 /r /is4] AMD,SSE5
|
|
VFMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 69 /r /is4] AMD,SSE5
|
|
VFMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 69 /r /is4] AMD,SSE5
|
|
VFMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 69 /r /is4] AMD,SSE5
|
|
|
|
VFMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 68 /r /is4] AMD,SSE5
|
|
VFMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 68 /r /is4] AMD,SSE5
|
|
VFMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 68 /r /is4] AMD,SSE5
|
|
VFMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 68 /r /is4] AMD,SSE5
|
|
|
|
VFMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6b /r /is4] AMD,SSE5
|
|
VFMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6b /r /is4] AMD,SSE5
|
|
|
|
VFMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6a /r /is4] AMD,SSE5
|
|
VFMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6a /r /is4] AMD,SSE5
|
|
|
|
VFMADDSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5d /r /is4] AMD,SSE5
|
|
VFMADDSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5d /r /is4] AMD,SSE5
|
|
VFMADDSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5d /r /is4] AMD,SSE5
|
|
VFMADDSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5d /r /is4] AMD,SSE5
|
|
|
|
VFMADDSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5c /r /is4] AMD,SSE5
|
|
VFMADDSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5c /r /is4] AMD,SSE5
|
|
VFMADDSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5c /r /is4] AMD,SSE5
|
|
VFMADDSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5c /r /is4] AMD,SSE5
|
|
|
|
VFMSUBADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5f /r /is4] AMD,SSE5
|
|
VFMSUBADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5f /r /is4] AMD,SSE5
|
|
VFMSUBADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5f /r /is4] AMD,SSE5
|
|
VFMSUBADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5f /r /is4] AMD,SSE5
|
|
|
|
VFMSUBADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 5e /r /is4] AMD,SSE5
|
|
VFMSUBADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 5e /r /is4] AMD,SSE5
|
|
VFMSUBADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 5e /r /is4] AMD,SSE5
|
|
VFMSUBADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 5e /r /is4] AMD,SSE5
|
|
|
|
VFMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6d /r /is4] AMD,SSE5
|
|
VFMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6d /r /is4] AMD,SSE5
|
|
VFMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6d /r /is4] AMD,SSE5
|
|
VFMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6d /r /is4] AMD,SSE5
|
|
|
|
VFMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6c /r /is4] AMD,SSE5
|
|
VFMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 6c /r /is4] AMD,SSE5
|
|
VFMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 6c /r /is4] AMD,SSE5
|
|
VFMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 6c /r /is4] AMD,SSE5
|
|
|
|
VFMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6f /r /is4] AMD,SSE5
|
|
VFMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 6f /r /is4] AMD,SSE5
|
|
|
|
VFMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 6e /r /is4] AMD,SSE5
|
|
VFMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 6e /r /is4] AMD,SSE5
|
|
|
|
VFNMADDPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 79 /r /is4] AMD,SSE5
|
|
VFNMADDPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 79 /r /is4] AMD,SSE5
|
|
VFNMADDPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 79 /r /is4] AMD,SSE5
|
|
VFNMADDPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 79 /r /is4] AMD,SSE5
|
|
|
|
VFNMADDPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 78 /r /is4] AMD,SSE5
|
|
VFNMADDPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 78 /r /is4] AMD,SSE5
|
|
VFNMADDPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 78 /r /is4] AMD,SSE5
|
|
VFNMADDPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 78 /r /is4] AMD,SSE5
|
|
|
|
VFNMADDSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7b /r /is4] AMD,SSE5
|
|
VFNMADDSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7b /r /is4] AMD,SSE5
|
|
|
|
VFNMADDSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7a /r /is4] AMD,SSE5
|
|
VFNMADDSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7a /r /is4] AMD,SSE5
|
|
|
|
VFNMSUBPD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7d /r /is4] AMD,SSE5
|
|
VFNMSUBPD ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7d /r /is4] AMD,SSE5
|
|
VFNMSUBPD xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7d /r /is4] AMD,SSE5
|
|
VFNMSUBPD ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7d /r /is4] AMD,SSE5
|
|
|
|
VFNMSUBPS xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7c /r /is4] AMD,SSE5
|
|
VFNMSUBPS ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.m3.w0.nds.l1.p1 7c /r /is4] AMD,SSE5
|
|
VFNMSUBPS xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: vex.m3.w1.nds.l0.p1 7c /r /is4] AMD,SSE5
|
|
VFNMSUBPS ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: vex.m3.w1.nds.l1.p1 7c /r /is4] AMD,SSE5
|
|
|
|
VFNMSUBSD xmmreg,xmmreg*,xmmrm64,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7f /r /is4] AMD,SSE5
|
|
VFNMSUBSD xmmreg,xmmreg*,xmmreg,xmmrm64 [rvsm: vex.m3.w1.nds.l0.p1 7f /r /is4] AMD,SSE5
|
|
|
|
VFNMSUBSS xmmreg,xmmreg*,xmmrm32,xmmreg [rvms: vex.m3.w0.nds.l0.p1 7e /r /is4] AMD,SSE5
|
|
VFNMSUBSS xmmreg,xmmreg*,xmmreg,xmmrm32 [rvsm: vex.m3.w1.nds.l0.p1 7e /r /is4] AMD,SSE5
|
|
|
|
VFRCZPD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 81 /r] AMD,SSE5
|
|
VFRCZPD ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 81 /r] AMD,SSE5
|
|
|
|
VFRCZPS xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 80 /r] AMD,SSE5
|
|
VFRCZPS ymmreg,ymmrm256* [rm: xop.m9.w0.l1.p0 80 /r] AMD,SSE5
|
|
|
|
VFRCZSD xmmreg,xmmrm64* [rm: xop.m9.w0.l0.p0 83 /r] AMD,SSE5
|
|
|
|
VFRCZSS xmmreg,xmmrm32* [rm: xop.m9.w0.l0.p0 82 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec mention imm[7:4] though it should be /is4 even in spec
|
|
VPCMOV xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a2 /r /is4] AMD,SSE5
|
|
VPCMOV ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: xop.m8.w0.nds.l1.p0 a2 /r /is4] AMD,SSE5
|
|
VPCMOV xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a2 /r /is4] AMD,SSE5
|
|
VPCMOV ymmreg,ymmreg*,ymmreg,ymmrm256 [rvsm: xop.m8.w1.nds.l1.p0 a2 /r /is4] AMD,SSE5
|
|
|
|
VPCOMB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cc /r ib] AMD,SSE5
|
|
VPCOMD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ce /r ib] AMD,SSE5
|
|
VPCOMQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cf /r ib] AMD,SSE5
|
|
;
|
|
; fixed: spec mention only 3 operands in mnemonics
|
|
VPCOMUB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ec /r ib] AMD,SSE5
|
|
VPCOMUD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ee /r ib] AMD,SSE5
|
|
VPCOMUQ xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ef /r ib] AMD,SSE5
|
|
;
|
|
; fixed: spec point wrong VPCOMB in mnemonic
|
|
VPCOMUW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 ed /r ib] AMD,SSE5
|
|
VPCOMW xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: xop.m8.w0.nds.l0.p0 cd /r ib] AMD,SSE5
|
|
|
|
VPHADDBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c2 /r] AMD,SSE5
|
|
VPHADDBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c3 /r] AMD,SSE5
|
|
VPHADDBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c1 /r] AMD,SSE5
|
|
VPHADDDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 cb /r] AMD,SSE5
|
|
;
|
|
; fixed: spec has ymmreg for l0
|
|
VPHADDUBD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d2 /r] AMD,SSE5
|
|
VPHADDUBQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d3 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec has VPHADDUBWD
|
|
VPHADDUBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d1 /r] AMD,SSE5
|
|
;
|
|
; fixed: opcode db
|
|
VPHADDUDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 db /r] AMD,SSE5
|
|
VPHADDUWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d6 /r] AMD,SSE5
|
|
VPHADDUWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 d7 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec has ymmreg for l0
|
|
VPHADDWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c6 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec has d7 opcode
|
|
VPHADDWQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 c7 /r] AMD,SSE5
|
|
|
|
VPHSUBBW xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e1 /r] AMD,SSE5
|
|
VPHSUBDQ xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e3 /r] AMD,SSE5
|
|
VPHSUBWD xmmreg,xmmrm128* [rm: xop.m9.w0.l0.p0 e2 /r] AMD,SSE5
|
|
|
|
VPMACSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9e /r /is4] AMD,SSE5
|
|
;
|
|
; fixed: spec has 97,9f opcodes here
|
|
VPMACSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 9f /r /is4] AMD,SSE5
|
|
VPMACSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 97 /r /is4] AMD,SSE5
|
|
VPMACSSDD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8e /r /is4] AMD,SSE5
|
|
VPMACSSDQH xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 8f /r /is4] AMD,SSE5
|
|
VPMACSSDQL xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 87 /r /is4] AMD,SSE5
|
|
VPMACSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 86 /r /is4] AMD,SSE5
|
|
VPMACSSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 85 /r /is4] AMD,SSE5
|
|
VPMACSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 96 /r /is4] AMD,SSE5
|
|
VPMACSWW xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 95 /r /is4] AMD,SSE5
|
|
VPMADCSSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a6 /r /is4] AMD,SSE5
|
|
VPMADCSWD xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 b6 /r /is4] AMD,SSE5
|
|
|
|
VPPERM xmmreg,xmmreg*,xmmreg,xmmrm128 [rvsm: xop.m8.w1.nds.l0.p0 a3 /r /is4] AMD,SSE5
|
|
VPPERM xmmreg,xmmreg*,xmmrm128,xmmreg [rvms: xop.m8.w0.nds.l0.p0 a3 /r /is4] AMD,SSE5
|
|
|
|
VPROTB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 90 /r] AMD,SSE5
|
|
VPROTB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 90 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec point xmmreg instead of reg/mem
|
|
VPROTB xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c0 /r ib] AMD,SSE5
|
|
|
|
VPROTD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 92 /r] AMD,SSE5
|
|
VPROTD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 92 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec error /r is needed
|
|
VPROTD xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c2 /r ib] AMD,SSE5
|
|
VPROTQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 93 /r] AMD,SSE5
|
|
VPROTQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 93 /r] AMD,SSE5
|
|
;
|
|
; fixed: spec error /r is needed
|
|
VPROTQ xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c3 /r ib] AMD,SSE5
|
|
VPROTW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 91 /r] AMD,SSE5
|
|
VPROTW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 91 /r] AMD,SSE5
|
|
VPROTW xmmreg,xmmrm128*,imm8 [rmi: xop.m8.w0.l0.p0 c1 /r ib] AMD,SSE5
|
|
|
|
VPSHAB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 98 /r] AMD,SSE5
|
|
VPSHAB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 98 /r] AMD,SSE5
|
|
|
|
VPSHAD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9a /r] AMD,SSE5
|
|
VPSHAD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9a /r] AMD,SSE5
|
|
|
|
VPSHAQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 9b /r] AMD,SSE5
|
|
VPSHAQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 9b /r] AMD,SSE5
|
|
|
|
VPSHAW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 99 /r] AMD,SSE5
|
|
VPSHAW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 99 /r] AMD,SSE5
|
|
|
|
VPSHLB xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 94 /r] AMD,SSE5
|
|
VPSHLB xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 94 /r] AMD,SSE5
|
|
|
|
;
|
|
; fixed: spec has ymmreg for l0
|
|
VPSHLD xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 96 /r] AMD,SSE5
|
|
VPSHLD xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 96 /r] AMD,SSE5
|
|
|
|
VPSHLQ xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 97 /r] AMD,SSE5
|
|
VPSHLQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 97 /r] AMD,SSE5
|
|
|
|
VPSHLW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 95 /r] AMD,SSE5
|
|
VPSHLW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 95 /r] AMD,SSE5
|
|
|
|
;# Intel AVX2 instructions
|
|
;
|
|
; based on pub number 319433-011 dated July 2011
|
|
;
|
|
VMPSADBW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 42 /r ib] FUTURE,AVX2
|
|
VPABSB ymmreg,ymmrm256 [rm: vex.256.66.0f38 1c /r] FUTURE,AVX2
|
|
VPABSW ymmreg,ymmrm256 [rm: vex.256.66.0f38 1d /r] FUTURE,AVX2
|
|
VPABSD ymmreg,ymmrm256 [rm: vex.256.66.0f38 1e /r] FUTURE,AVX2
|
|
VPACKSSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 63 /r] FUTURE,AVX2
|
|
VPACKSSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6b /r] FUTURE,AVX2
|
|
VPACKUSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 2b /r] FUTURE,AVX2
|
|
VPACKUSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 67 /r] FUTURE,AVX2
|
|
VPADDB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fc /r] FUTURE,AVX2
|
|
VPADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fd /r] FUTURE,AVX2
|
|
VPADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fe /r] FUTURE,AVX2
|
|
VPADDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d4 /r] FUTURE,AVX2
|
|
VPADDSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ec /r] FUTURE,AVX2
|
|
VPADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ed /r] FUTURE,AVX2
|
|
VPADDUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dc /r] FUTURE,AVX2
|
|
VPADDUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dd /r] FUTURE,AVX2
|
|
VPALIGNR ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0f /r ib] FUTURE,AVX2
|
|
VPAND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f db /r] FUTURE,AVX2
|
|
VPANDN ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f df /r] FUTURE,AVX2
|
|
VPAVGB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e0 /r] FUTURE,AVX2
|
|
VPAVGW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e3 /r] FUTURE,AVX2
|
|
VPBLENDVB ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a 4c /r /is4] FUTURE,AVX2
|
|
VPBLENDW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0e /r ib] FUTURE,AVX2
|
|
VPCMPEQB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 74 /r] FUTURE,AVX2
|
|
VPCMPEQW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 75 /r] FUTURE,AVX2
|
|
VPCMPEQD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 76 /r] FUTURE,AVX2
|
|
VPCMPEQQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 29 /r] FUTURE,AVX2
|
|
VPCMPGTB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 64 /r] FUTURE,AVX2
|
|
VPCMPGTW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 65 /r] FUTURE,AVX2
|
|
VPCMPGTD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 66 /r] FUTURE,AVX2
|
|
VPCMPGTQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 37 /r] FUTURE,AVX2
|
|
VPHADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 01 /r] FUTURE,AVX2
|
|
VPHADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 02 /r] FUTURE,AVX2
|
|
VPHADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 03 /r] FUTURE,AVX2
|
|
VPHSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 05 /r] FUTURE,AVX2
|
|
VPHSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 06 /r] FUTURE,AVX2
|
|
VPHSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 07 /r] FUTURE,AVX2
|
|
VPMADDUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 04 /r] FUTURE,AVX2
|
|
VPMADDWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f5 /r] FUTURE,AVX2
|
|
VPMAXSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3c /r] FUTURE,AVX2
|
|
VPMAXSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ee /r] FUTURE,AVX2
|
|
VPMAXSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3d /r] FUTURE,AVX2
|
|
VPMAXUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f de /r] FUTURE,AVX2
|
|
VPMAXUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3e /r] FUTURE,AVX2
|
|
VPMAXUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3f /r] FUTURE,AVX2
|
|
VPMINSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 38 /r] FUTURE,AVX2
|
|
VPMINSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ea /r] FUTURE,AVX2
|
|
VPMINSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 39 /r] FUTURE,AVX2
|
|
VPMINUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f da /r] FUTURE,AVX2
|
|
VPMINUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3a /r] FUTURE,AVX2
|
|
VPMINUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3b /r] FUTURE,AVX2
|
|
VPMOVMSKB reg64,ymmreg [rm: vex.256.66.0f d7 /r] FUTURE,AVX2
|
|
VPMOVSXBW reg64,xmmrm128 [rm: vex.256.66.0f38 20 /r] FUTURE,AVX2
|
|
VPMOVSXBD ymmreg,mem64 [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
|
|
VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
|
|
VPMOVSXBQ ymmreg,mem32 [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
|
|
VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
|
|
VPMOVSXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 23 /r] FUTURE,AVX2
|
|
VPMOVSXWQ ymmreg,mem64 [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
|
|
VPMOVSXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
|
|
VPMOVSXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 25 /r] FUTURE,AVX2
|
|
VPMOVZXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 30 /r] FUTURE,AVX2
|
|
VPMOVZXBD ymmreg,mem64 [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
|
|
VPMOVZXBD ymmreg,xmmreg [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
|
|
VPMOVZXBQ ymmreg,mem32 [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
|
|
VPMOVZXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
|
|
VPMOVZXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 33 /r] FUTURE,AVX2
|
|
VPMOVZXWQ ymmreg,mem64 [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
|
|
VPMOVZXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
|
|
VPMOVZXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 35 /r] FUTURE,AVX2
|
|
VPMULDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 28 /r] FUTURE,AVX2
|
|
VPMULHRSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0b /r] FUTURE,AVX2
|
|
VPMULHUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e4 /r] FUTURE,AVX2
|
|
VPMULHW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e5 /r] FUTURE,AVX2
|
|
VPMULLW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d5 /r] FUTURE,AVX2
|
|
VPMULLD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 40 /r] FUTURE,AVX2
|
|
VPMULUDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f4 /r] FUTURE,AVX2
|
|
VPOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f eb /r] FUTURE,AVX2
|
|
VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f6 /r] FUTURE,AVX2
|
|
VPSHUFB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 00 /r] FUTURE,AVX2
|
|
VPSHUFD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f 70 /r ib] FUTURE,AVX2
|
|
VPSHUFHW ymmreg,ymmrm256,imm8 [rmi: vex.256.f3.0f 70 /r ib] FUTURE,AVX2
|
|
VPSHUFLW ymmreg,ymmrm256,imm8 [rmi: vex.256.f2.0f 70 /r ib] FUTURE,AVX2
|
|
VPSIGNB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 08 /r] FUTURE,AVX2
|
|
VPSIGNW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 09 /r] FUTURE,AVX2
|
|
VPSIGND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0a /r] FUTURE,AVX2
|
|
VPSLLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /7 ib] FUTURE,AVX2
|
|
VPSLLW ymmreg,ymmreg*,xmmrm128 [vrm: vex.nds.256.66.0f f1 /r] FUTURE,AVX2
|
|
VPSLLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /6 ib] FUTURE,AVX2
|
|
VPSLLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f2 /r] FUTURE,AVX2
|
|
VPSLLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /6 ib] FUTURE,AVX2
|
|
VPSLLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f3 /r] FUTURE,AVX2
|
|
VPSLLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /6 ib] FUTURE,AVX2
|
|
VPSRAW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e1 /r] FUTURE,AVX2
|
|
VPSRAW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /4 ib] FUTURE,AVX2
|
|
VPSRAD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e2 /r] FUTURE,AVX2
|
|
VPSRAD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /4 ib] FUTURE,AVX2
|
|
VPSRLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /3 ib] FUTURE,AVX2
|
|
VPSRLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d1 /r] FUTURE,AVX2
|
|
VPSRLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /2 ib] FUTURE,AVX2
|
|
VPSRLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d2 /r] FUTURE,AVX2
|
|
VPSRLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /2 ib] FUTURE,AVX2
|
|
VPSRLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d3 /r] FUTURE,AVX2
|
|
VPSRLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f.wig 73 /2 ib] FUTURE,AVX2
|
|
VPSUBB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f8 /r] FUTURE,AVX2
|
|
VPSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f9 /r] FUTURE,AVX2
|
|
VPSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fa /r] FUTURE,AVX2
|
|
VPSUBQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fb /r] FUTURE,AVX2
|
|
VPSUBSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e8 /r] FUTURE,AVX2
|
|
VPSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e9 /r] FUTURE,AVX2
|
|
VPSUBUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d8 /r] FUTURE,AVX2
|
|
VPSUBUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d9 /r] FUTURE,AVX2
|
|
VPUNPCKHBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 68 /r] FUTURE,AVX2
|
|
VPUNPCKHWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 69 /r] FUTURE,AVX2
|
|
VPUNPCKHDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6a /r] FUTURE,AVX2
|
|
VPUNPCKHQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6d /r] FUTURE,AVX2
|
|
VPUNPCKLBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 60 /r] FUTURE,AVX2
|
|
VPUNPCKLWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 61 /r] FUTURE,AVX2
|
|
VPUNPCKLDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 62 /r] FUTURE,AVX2
|
|
VPUNPCKLQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6c /r] FUTURE,AVX2
|
|
VPXOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ef /r] FUTURE,AVX2
|
|
VMOVNTDQA ymmreg,mem128 [rm: vex.256.66.0f38 2a /r] FUTURE,AVX2
|
|
VBROADCASTSS xmmreg,xmmreg [rm: vex.128.66.0f38.w0 18 /r] FUTURE,AVX2
|
|
VBROADCASTSS ymmreg,xmmreg [rm: vex.256.66.0f38.w0 18 /r] FUTURE,AVX2
|
|
VBROADCASTSD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 19 /r] FUTURE,AVX2
|
|
VBROADCASTI128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 5a /r] FUTURE,AVX2
|
|
VPBLENDD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w0 02 /r ib] FUTURE,AVX2
|
|
VPBLENDD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 02 /r ib] FUTURE,AVX2
|
|
VPBROADCASTB xmmreg,mem8 [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
|
|
VPBROADCASTB xmmreg,xmmreg [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
|
|
VPBROADCASTB ymmreg,mem8 [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
|
|
VPBROADCASTB ymmreg,xmmreg [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
|
|
VPBROADCASTW xmmreg,mem16 [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
|
|
VPBROADCASTW xmmreg,xmmreg [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
|
|
VPBROADCASTW ymmreg,mem16 [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
|
|
VPBROADCASTW ymmreg,xmmreg [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
|
|
VPBROADCASTD xmmreg,mem32 [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
|
|
VPBROADCASTD xmmreg,xmmreg [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
|
|
VPBROADCASTD ymmreg,mem32 [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
|
|
VPBROADCASTD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
|
|
VPBROADCASTQ xmmreg,mem64 [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
|
|
VPBROADCASTQ xmmreg,xmmreg [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
|
|
VPBROADCASTQ ymmreg,mem64 [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
|
|
VPBROADCASTQ ymmreg,xmmreg [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
|
|
|
|
VPERMD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 36 /r] FUTURE,AVX2
|
|
VPERMPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 01 /r ib] FUTURE,AVX2
|
|
VPERMPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 16 /r] FUTURE,AVX2
|
|
VPERMQ ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 00 /r ib] FUTURE,AVX2
|
|
VPERM2I128 ymmreg,ymmreg,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 46 /r ib] FUTURE,AVX2
|
|
VEXTRACTI128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 39 /r ib] FUTURE,AVX2
|
|
|
|
VINSERTI128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 38 /r ib] FUTURE,AVX2
|
|
VPMASKMOVD xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w0 8c /r] FUTURE,AVX2
|
|
VPMASKMOVD ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w0 8c /r] FUTURE,AVX2
|
|
VPMASKMOVQ xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w1 8c /r] FUTURE,AVX2
|
|
VPMASKMOVQ ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w1 8c /r] FUTURE,AVX2
|
|
|
|
VPMASKMOVD mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w0 8e /r] FUTURE,AVX2
|
|
VPMASKMOVD mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w0 8e /r] FUTURE,AVX2
|
|
VPMASKMOVQ mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w1 8e /r] FUTURE,AVX2
|
|
VPMASKMOVQ mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w1 8e /r] FUTURE,AVX2
|
|
|
|
VPSLLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 47 /r] FUTURE,AVX2
|
|
VPSLLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 47 /r] FUTURE,AVX2
|
|
VPSLLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 47 /r] FUTURE,AVX2
|
|
VPSLLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 47 /r] FUTURE,AVX2
|
|
|
|
VPSRAVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 46 /r] FUTURE,AVX2
|
|
VPSRAVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 46 /r] FUTURE,AVX2
|
|
|
|
VPSRLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 45 /r] FUTURE,AVX2
|
|
VPSRLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 45 /r] FUTURE,AVX2
|
|
VPSRLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 45 /r] FUTURE,AVX2
|
|
VPSRLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 45 /r] FUTURE,AVX2
|
|
|
|
VGATHERDPD xmmreg,mem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 92 /r] FUTURE,AVX2
|
|
VGATHERQPD xmmreg,mem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 93 /r] FUTURE,AVX2
|
|
VGATHERDPD ymmreg,mem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
|
|
VGATHERQPD ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
|
|
|
|
VGATHERDPS xmmreg,mem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 92 /r] FUTURE,AVX2
|
|
VGATHERQPS xmmreg,mem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 93 /r] FUTURE,AVX2
|
|
VGATHERDPS ymmreg,mem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 92 /r] FUTURE,AVX2
|
|
VGATHERQPS xmmreg,mem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 93 /r] FUTURE,AVX2
|
|
|
|
VPGATHERDD xmmreg,mem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 90 /r] FUTURE,AVX2
|
|
VPGATHERQD xmmreg,mem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 91 /r] FUTURE,AVX2
|
|
VPGATHERDD ymmreg,mem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 90 /r] FUTURE,AVX2
|
|
VPGATHERQD xmmreg,mem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 91 /r] FUTURE,AVX2
|
|
|
|
VPGATHERDQ xmmreg,mem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 90 /r] FUTURE,AVX2
|
|
VPGATHERQQ xmmreg,mem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 91 /r] FUTURE,AVX2
|
|
VPGATHERDQ ymmreg,mem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 90 /r] FUTURE,AVX2
|
|
VPGATHERQQ ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 91 /r] FUTURE,AVX2
|
|
|
|
;# Transactional Synchronization Extensions (TSX)
|
|
XABORT imm [i: c6 f8 ib] FUTURE,RTM
|
|
XABORT imm8 [i: c6 f8 ib] FUTURE,RTM
|
|
XBEGIN imm [i: odf c7 f8 rel] FUTURE,RTM
|
|
XBEGIN imm|near [i: odf c7 f8 rel] FUTURE,RTM
|
|
XBEGIN imm16 [i: o16 c7 f8 rel] FUTURE,RTM
|
|
XBEGIN imm16|near [i: o16 c7 f8 rel] FUTURE,RTM
|
|
XBEGIN imm32 [i: o32 c7 f8 rel] FUTURE,RTM
|
|
XBEGIN imm32|near [i: o32 c7 f8 rel] FUTURE,RTM
|
|
XEND void [ 0f 01 d5] FUTURE,RTM
|
|
XTEST void [ 0f 01 d6] FUTURE,HLE,RTM
|
|
|
|
;# Intel BMI1 and BMI2 instructions
|
|
;
|
|
; based on pub number 319433-011 dated July 2011
|
|
;
|
|
TZCNT reg16,rm16 [rm: o16 f3 0f bc /r] FUTURE,BMI1
|
|
TZCNT reg32,rm32 [rm: o32 f3 0f bc /r] FUTURE,BMI1
|
|
TZCNT reg64,rm64 [rm: o64 f3 0f bc /r] LONG,FUTURE,BMI1
|
|
ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1
|
|
ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] LONG,FUTURE,BMI1
|
|
BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1
|
|
BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] LONG,FUTURE,BMI1
|
|
BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1
|
|
BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3] LONG,FUTURE,BMI1
|
|
BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1
|
|
BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2] LONG,FUTURE,BMI1
|
|
BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1
|
|
BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1] LONG,FUTURE,BMI1
|
|
BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2
|
|
BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] LONG,FUTURE,BMI2
|
|
MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2
|
|
MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] LONG,FUTURE,BMI2
|
|
PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2
|
|
PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] LONG,FUTURE,BMI2
|
|
PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2
|
|
PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] LONG,FUTURE,BMI2
|
|
RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2
|
|
RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib] LONG,FUTURE,BMI2
|
|
SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2
|
|
SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] LONG,FUTURE,BMI2
|
|
SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2
|
|
SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] LONG,FUTURE,BMI2
|
|
SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2
|
|
SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] LONG,FUTURE,BMI2
|
|
|
|
;# Systematic names for the hinting nop instructions
|
|
; These should be last in the file
|
|
HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC
|
|
HINT_NOP0 rm32 [m: o32 0f 18 /0] P6,UNDOC
|
|
HINT_NOP0 rm64 [m: o64 0f 18 /0] X64,UNDOC
|
|
HINT_NOP1 rm16 [m: o16 0f 18 /1] P6,UNDOC
|
|
HINT_NOP1 rm32 [m: o32 0f 18 /1] P6,UNDOC
|
|
HINT_NOP1 rm64 [m: o64 0f 18 /1] X64,UNDOC
|
|
HINT_NOP2 rm16 [m: o16 0f 18 /2] P6,UNDOC
|
|
HINT_NOP2 rm32 [m: o32 0f 18 /2] P6,UNDOC
|
|
HINT_NOP2 rm64 [m: o64 0f 18 /2] X64,UNDOC
|
|
HINT_NOP3 rm16 [m: o16 0f 18 /3] P6,UNDOC
|
|
HINT_NOP3 rm32 [m: o32 0f 18 /3] P6,UNDOC
|
|
HINT_NOP3 rm64 [m: o64 0f 18 /3] X64,UNDOC
|
|
HINT_NOP4 rm16 [m: o16 0f 18 /4] P6,UNDOC
|
|
HINT_NOP4 rm32 [m: o32 0f 18 /4] P6,UNDOC
|
|
HINT_NOP4 rm64 [m: o64 0f 18 /4] X64,UNDOC
|
|
HINT_NOP5 rm16 [m: o16 0f 18 /5] P6,UNDOC
|
|
HINT_NOP5 rm32 [m: o32 0f 18 /5] P6,UNDOC
|
|
HINT_NOP5 rm64 [m: o64 0f 18 /5] X64,UNDOC
|
|
HINT_NOP6 rm16 [m: o16 0f 18 /6] P6,UNDOC
|
|
HINT_NOP6 rm32 [m: o32 0f 18 /6] P6,UNDOC
|
|
HINT_NOP6 rm64 [m: o64 0f 18 /6] X64,UNDOC
|
|
HINT_NOP7 rm16 [m: o16 0f 18 /7] P6,UNDOC
|
|
HINT_NOP7 rm32 [m: o32 0f 18 /7] P6,UNDOC
|
|
HINT_NOP7 rm64 [m: o64 0f 18 /7] X64,UNDOC
|
|
HINT_NOP8 rm16 [m: o16 0f 19 /0] P6,UNDOC
|
|
HINT_NOP8 rm32 [m: o32 0f 19 /0] P6,UNDOC
|
|
HINT_NOP8 rm64 [m: o64 0f 19 /0] X64,UNDOC
|
|
HINT_NOP9 rm16 [m: o16 0f 19 /1] P6,UNDOC
|
|
HINT_NOP9 rm32 [m: o32 0f 19 /1] P6,UNDOC
|
|
HINT_NOP9 rm64 [m: o64 0f 19 /1] X64,UNDOC
|
|
HINT_NOP10 rm16 [m: o16 0f 19 /2] P6,UNDOC
|
|
HINT_NOP10 rm32 [m: o32 0f 19 /2] P6,UNDOC
|
|
HINT_NOP10 rm64 [m: o64 0f 19 /2] X64,UNDOC
|
|
HINT_NOP11 rm16 [m: o16 0f 19 /3] P6,UNDOC
|
|
HINT_NOP11 rm32 [m: o32 0f 19 /3] P6,UNDOC
|
|
HINT_NOP11 rm64 [m: o64 0f 19 /3] X64,UNDOC
|
|
HINT_NOP12 rm16 [m: o16 0f 19 /4] P6,UNDOC
|
|
HINT_NOP12 rm32 [m: o32 0f 19 /4] P6,UNDOC
|
|
HINT_NOP12 rm64 [m: o64 0f 19 /4] X64,UNDOC
|
|
HINT_NOP13 rm16 [m: o16 0f 19 /5] P6,UNDOC
|
|
HINT_NOP13 rm32 [m: o32 0f 19 /5] P6,UNDOC
|
|
HINT_NOP13 rm64 [m: o64 0f 19 /5] X64,UNDOC
|
|
HINT_NOP14 rm16 [m: o16 0f 19 /6] P6,UNDOC
|
|
HINT_NOP14 rm32 [m: o32 0f 19 /6] P6,UNDOC
|
|
HINT_NOP14 rm64 [m: o64 0f 19 /6] X64,UNDOC
|
|
HINT_NOP15 rm16 [m: o16 0f 19 /7] P6,UNDOC
|
|
HINT_NOP15 rm32 [m: o32 0f 19 /7] P6,UNDOC
|
|
HINT_NOP15 rm64 [m: o64 0f 19 /7] X64,UNDOC
|
|
HINT_NOP16 rm16 [m: o16 0f 1a /0] P6,UNDOC
|
|
HINT_NOP16 rm32 [m: o32 0f 1a /0] P6,UNDOC
|
|
HINT_NOP16 rm64 [m: o64 0f 1a /0] X64,UNDOC
|
|
HINT_NOP17 rm16 [m: o16 0f 1a /1] P6,UNDOC
|
|
HINT_NOP17 rm32 [m: o32 0f 1a /1] P6,UNDOC
|
|
HINT_NOP17 rm64 [m: o64 0f 1a /1] X64,UNDOC
|
|
HINT_NOP18 rm16 [m: o16 0f 1a /2] P6,UNDOC
|
|
HINT_NOP18 rm32 [m: o32 0f 1a /2] P6,UNDOC
|
|
HINT_NOP18 rm64 [m: o64 0f 1a /2] X64,UNDOC
|
|
HINT_NOP19 rm16 [m: o16 0f 1a /3] P6,UNDOC
|
|
HINT_NOP19 rm32 [m: o32 0f 1a /3] P6,UNDOC
|
|
HINT_NOP19 rm64 [m: o64 0f 1a /3] X64,UNDOC
|
|
HINT_NOP20 rm16 [m: o16 0f 1a /4] P6,UNDOC
|
|
HINT_NOP20 rm32 [m: o32 0f 1a /4] P6,UNDOC
|
|
HINT_NOP20 rm64 [m: o64 0f 1a /4] X64,UNDOC
|
|
HINT_NOP21 rm16 [m: o16 0f 1a /5] P6,UNDOC
|
|
HINT_NOP21 rm32 [m: o32 0f 1a /5] P6,UNDOC
|
|
HINT_NOP21 rm64 [m: o64 0f 1a /5] X64,UNDOC
|
|
HINT_NOP22 rm16 [m: o16 0f 1a /6] P6,UNDOC
|
|
HINT_NOP22 rm32 [m: o32 0f 1a /6] P6,UNDOC
|
|
HINT_NOP22 rm64 [m: o64 0f 1a /6] X64,UNDOC
|
|
HINT_NOP23 rm16 [m: o16 0f 1a /7] P6,UNDOC
|
|
HINT_NOP23 rm32 [m: o32 0f 1a /7] P6,UNDOC
|
|
HINT_NOP23 rm64 [m: o64 0f 1a /7] X64,UNDOC
|
|
HINT_NOP24 rm16 [m: o16 0f 1b /0] P6,UNDOC
|
|
HINT_NOP24 rm32 [m: o32 0f 1b /0] P6,UNDOC
|
|
HINT_NOP24 rm64 [m: o64 0f 1b /0] X64,UNDOC
|
|
HINT_NOP25 rm16 [m: o16 0f 1b /1] P6,UNDOC
|
|
HINT_NOP25 rm32 [m: o32 0f 1b /1] P6,UNDOC
|
|
HINT_NOP25 rm64 [m: o64 0f 1b /1] X64,UNDOC
|
|
HINT_NOP26 rm16 [m: o16 0f 1b /2] P6,UNDOC
|
|
HINT_NOP26 rm32 [m: o32 0f 1b /2] P6,UNDOC
|
|
HINT_NOP26 rm64 [m: o64 0f 1b /2] X64,UNDOC
|
|
HINT_NOP27 rm16 [m: o16 0f 1b /3] P6,UNDOC
|
|
HINT_NOP27 rm32 [m: o32 0f 1b /3] P6,UNDOC
|
|
HINT_NOP27 rm64 [m: o64 0f 1b /3] X64,UNDOC
|
|
HINT_NOP28 rm16 [m: o16 0f 1b /4] P6,UNDOC
|
|
HINT_NOP28 rm32 [m: o32 0f 1b /4] P6,UNDOC
|
|
HINT_NOP28 rm64 [m: o64 0f 1b /4] X64,UNDOC
|
|
HINT_NOP29 rm16 [m: o16 0f 1b /5] P6,UNDOC
|
|
HINT_NOP29 rm32 [m: o32 0f 1b /5] P6,UNDOC
|
|
HINT_NOP29 rm64 [m: o64 0f 1b /5] X64,UNDOC
|
|
HINT_NOP30 rm16 [m: o16 0f 1b /6] P6,UNDOC
|
|
HINT_NOP30 rm32 [m: o32 0f 1b /6] P6,UNDOC
|
|
HINT_NOP30 rm64 [m: o64 0f 1b /6] X64,UNDOC
|
|
HINT_NOP31 rm16 [m: o16 0f 1b /7] P6,UNDOC
|
|
HINT_NOP31 rm32 [m: o32 0f 1b /7] P6,UNDOC
|
|
HINT_NOP31 rm64 [m: o64 0f 1b /7] X64,UNDOC
|
|
HINT_NOP32 rm16 [m: o16 0f 1c /0] P6,UNDOC
|
|
HINT_NOP32 rm32 [m: o32 0f 1c /0] P6,UNDOC
|
|
HINT_NOP32 rm64 [m: o64 0f 1c /0] X64,UNDOC
|
|
HINT_NOP33 rm16 [m: o16 0f 1c /1] P6,UNDOC
|
|
HINT_NOP33 rm32 [m: o32 0f 1c /1] P6,UNDOC
|
|
HINT_NOP33 rm64 [m: o64 0f 1c /1] X64,UNDOC
|
|
HINT_NOP34 rm16 [m: o16 0f 1c /2] P6,UNDOC
|
|
HINT_NOP34 rm32 [m: o32 0f 1c /2] P6,UNDOC
|
|
HINT_NOP34 rm64 [m: o64 0f 1c /2] X64,UNDOC
|
|
HINT_NOP35 rm16 [m: o16 0f 1c /3] P6,UNDOC
|
|
HINT_NOP35 rm32 [m: o32 0f 1c /3] P6,UNDOC
|
|
HINT_NOP35 rm64 [m: o64 0f 1c /3] X64,UNDOC
|
|
HINT_NOP36 rm16 [m: o16 0f 1c /4] P6,UNDOC
|
|
HINT_NOP36 rm32 [m: o32 0f 1c /4] P6,UNDOC
|
|
HINT_NOP36 rm64 [m: o64 0f 1c /4] X64,UNDOC
|
|
HINT_NOP37 rm16 [m: o16 0f 1c /5] P6,UNDOC
|
|
HINT_NOP37 rm32 [m: o32 0f 1c /5] P6,UNDOC
|
|
HINT_NOP37 rm64 [m: o64 0f 1c /5] X64,UNDOC
|
|
HINT_NOP38 rm16 [m: o16 0f 1c /6] P6,UNDOC
|
|
HINT_NOP38 rm32 [m: o32 0f 1c /6] P6,UNDOC
|
|
HINT_NOP38 rm64 [m: o64 0f 1c /6] X64,UNDOC
|
|
HINT_NOP39 rm16 [m: o16 0f 1c /7] P6,UNDOC
|
|
HINT_NOP39 rm32 [m: o32 0f 1c /7] P6,UNDOC
|
|
HINT_NOP39 rm64 [m: o64 0f 1c /7] X64,UNDOC
|
|
HINT_NOP40 rm16 [m: o16 0f 1d /0] P6,UNDOC
|
|
HINT_NOP40 rm32 [m: o32 0f 1d /0] P6,UNDOC
|
|
HINT_NOP40 rm64 [m: o64 0f 1d /0] X64,UNDOC
|
|
HINT_NOP41 rm16 [m: o16 0f 1d /1] P6,UNDOC
|
|
HINT_NOP41 rm32 [m: o32 0f 1d /1] P6,UNDOC
|
|
HINT_NOP41 rm64 [m: o64 0f 1d /1] X64,UNDOC
|
|
HINT_NOP42 rm16 [m: o16 0f 1d /2] P6,UNDOC
|
|
HINT_NOP42 rm32 [m: o32 0f 1d /2] P6,UNDOC
|
|
HINT_NOP42 rm64 [m: o64 0f 1d /2] X64,UNDOC
|
|
HINT_NOP43 rm16 [m: o16 0f 1d /3] P6,UNDOC
|
|
HINT_NOP43 rm32 [m: o32 0f 1d /3] P6,UNDOC
|
|
HINT_NOP43 rm64 [m: o64 0f 1d /3] X64,UNDOC
|
|
HINT_NOP44 rm16 [m: o16 0f 1d /4] P6,UNDOC
|
|
HINT_NOP44 rm32 [m: o32 0f 1d /4] P6,UNDOC
|
|
HINT_NOP44 rm64 [m: o64 0f 1d /4] X64,UNDOC
|
|
HINT_NOP45 rm16 [m: o16 0f 1d /5] P6,UNDOC
|
|
HINT_NOP45 rm32 [m: o32 0f 1d /5] P6,UNDOC
|
|
HINT_NOP45 rm64 [m: o64 0f 1d /5] X64,UNDOC
|
|
HINT_NOP46 rm16 [m: o16 0f 1d /6] P6,UNDOC
|
|
HINT_NOP46 rm32 [m: o32 0f 1d /6] P6,UNDOC
|
|
HINT_NOP46 rm64 [m: o64 0f 1d /6] X64,UNDOC
|
|
HINT_NOP47 rm16 [m: o16 0f 1d /7] P6,UNDOC
|
|
HINT_NOP47 rm32 [m: o32 0f 1d /7] P6,UNDOC
|
|
HINT_NOP47 rm64 [m: o64 0f 1d /7] X64,UNDOC
|
|
HINT_NOP48 rm16 [m: o16 0f 1e /0] P6,UNDOC
|
|
HINT_NOP48 rm32 [m: o32 0f 1e /0] P6,UNDOC
|
|
HINT_NOP48 rm64 [m: o64 0f 1e /0] X64,UNDOC
|
|
HINT_NOP49 rm16 [m: o16 0f 1e /1] P6,UNDOC
|
|
HINT_NOP49 rm32 [m: o32 0f 1e /1] P6,UNDOC
|
|
HINT_NOP49 rm64 [m: o64 0f 1e /1] X64,UNDOC
|
|
HINT_NOP50 rm16 [m: o16 0f 1e /2] P6,UNDOC
|
|
HINT_NOP50 rm32 [m: o32 0f 1e /2] P6,UNDOC
|
|
HINT_NOP50 rm64 [m: o64 0f 1e /2] X64,UNDOC
|
|
HINT_NOP51 rm16 [m: o16 0f 1e /3] P6,UNDOC
|
|
HINT_NOP51 rm32 [m: o32 0f 1e /3] P6,UNDOC
|
|
HINT_NOP51 rm64 [m: o64 0f 1e /3] X64,UNDOC
|
|
HINT_NOP52 rm16 [m: o16 0f 1e /4] P6,UNDOC
|
|
HINT_NOP52 rm32 [m: o32 0f 1e /4] P6,UNDOC
|
|
HINT_NOP52 rm64 [m: o64 0f 1e /4] X64,UNDOC
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HINT_NOP53 rm16 [m: o16 0f 1e /5] P6,UNDOC
|
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HINT_NOP53 rm32 [m: o32 0f 1e /5] P6,UNDOC
|
|
HINT_NOP53 rm64 [m: o64 0f 1e /5] X64,UNDOC
|
|
HINT_NOP54 rm16 [m: o16 0f 1e /6] P6,UNDOC
|
|
HINT_NOP54 rm32 [m: o32 0f 1e /6] P6,UNDOC
|
|
HINT_NOP54 rm64 [m: o64 0f 1e /6] X64,UNDOC
|
|
HINT_NOP55 rm16 [m: o16 0f 1e /7] P6,UNDOC
|
|
HINT_NOP55 rm32 [m: o32 0f 1e /7] P6,UNDOC
|
|
HINT_NOP55 rm64 [m: o64 0f 1e /7] X64,UNDOC
|
|
HINT_NOP56 rm16 [m: o16 0f 1f /0] P6,UNDOC
|
|
HINT_NOP56 rm32 [m: o32 0f 1f /0] P6,UNDOC
|
|
HINT_NOP56 rm64 [m: o64 0f 1f /0] X64,UNDOC
|
|
HINT_NOP57 rm16 [m: o16 0f 1f /1] P6,UNDOC
|
|
HINT_NOP57 rm32 [m: o32 0f 1f /1] P6,UNDOC
|
|
HINT_NOP57 rm64 [m: o64 0f 1f /1] X64,UNDOC
|
|
HINT_NOP58 rm16 [m: o16 0f 1f /2] P6,UNDOC
|
|
HINT_NOP58 rm32 [m: o32 0f 1f /2] P6,UNDOC
|
|
HINT_NOP58 rm64 [m: o64 0f 1f /2] X64,UNDOC
|
|
HINT_NOP59 rm16 [m: o16 0f 1f /3] P6,UNDOC
|
|
HINT_NOP59 rm32 [m: o32 0f 1f /3] P6,UNDOC
|
|
HINT_NOP59 rm64 [m: o64 0f 1f /3] X64,UNDOC
|
|
HINT_NOP60 rm16 [m: o16 0f 1f /4] P6,UNDOC
|
|
HINT_NOP60 rm32 [m: o32 0f 1f /4] P6,UNDOC
|
|
HINT_NOP60 rm64 [m: o64 0f 1f /4] X64,UNDOC
|
|
HINT_NOP61 rm16 [m: o16 0f 1f /5] P6,UNDOC
|
|
HINT_NOP61 rm32 [m: o32 0f 1f /5] P6,UNDOC
|
|
HINT_NOP61 rm64 [m: o64 0f 1f /5] X64,UNDOC
|
|
HINT_NOP62 rm16 [m: o16 0f 1f /6] P6,UNDOC
|
|
HINT_NOP62 rm32 [m: o32 0f 1f /6] P6,UNDOC
|
|
HINT_NOP62 rm64 [m: o64 0f 1f /6] X64,UNDOC
|
|
HINT_NOP63 rm16 [m: o16 0f 1f /7] P6,UNDOC
|
|
HINT_NOP63 rm32 [m: o32 0f 1f /7] P6,UNDOC
|
|
HINT_NOP63 rm64 [m: o64 0f 1f /7] X64,UNDOC
|