mirror of
https://github.com/netwide-assembler/nasm.git
synced 2024-11-21 03:14:19 +08:00
a5c31197f5
We are starting to have to worry about running short on available bytecodes, especially where we encode the operand number in the byte code. Thus, compile a table of bytecode usage and include as a comment in insnsb.c. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
798 lines
20 KiB
Perl
Executable File
798 lines
20 KiB
Perl
Executable File
#!/usr/bin/perl
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#
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# insns.pl produce insnsa.c, insnsd.c, insnsi.h, insnsn.c from insns.dat
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#
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# The Netwide Assembler is copyright (C) 1996 Simon Tatham and
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# Julian Hall. All rights reserved. The software is
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# redistributable under the license given in the file "LICENSE"
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# distributed in the NASM archive.
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# Opcode prefixes which need their own opcode tables
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# LONGER PREFIXES FIRST!
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@disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
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# This should match MAX_OPERANDS from nasm.h
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$MAX_OPERANDS = 5;
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# Add VEX prefixes
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@vexlist = ();
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for ($m = 0; $m < 32; $m++) {
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for ($lp = 0; $lp < 8; $lp++) {
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push(@vexlist, sprintf("VEX%02X%01X", $m, $lp));
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}
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}
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@disasm_prefixes = (@vexlist, @disasm_prefixes);
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@bytecode_count = (0) x 256;
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print STDERR "Reading insns.dat...\n";
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@args = ();
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undef $output;
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foreach $arg ( @ARGV ) {
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if ( $arg =~ /^\-/ ) {
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if ( $arg =~ /^\-([abdin])$/ ) {
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$output = $1;
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} else {
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die "$0: Unknown option: ${arg}\n";
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}
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} else {
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push (@args, $arg);
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}
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}
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$fname = "insns.dat" unless $fname = $args[0];
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open (F, $fname) || die "unable to open $fname";
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%dinstables = ();
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@bytecode_list = ();
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$line = 0;
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$insns = 0;
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while (<F>) {
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$line++;
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chomp;
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next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
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unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
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warn "line $line does not contain four fields\n";
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next;
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}
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@fields = ($1, $2, $3, $4);
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($formatted, $nd) = format_insn(@fields);
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if ($formatted) {
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$insns++;
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$aname = "aa_$fields[0]";
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push @$aname, $formatted;
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}
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if ( $fields[0] =~ /cc$/ ) {
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# Conditional instruction
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$k_opcodes_cc{$fields[0]}++;
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} else {
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# Unconditional instruction
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$k_opcodes{$fields[0]}++;
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}
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if ($formatted && !$nd) {
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push @big, $formatted;
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my @sseq = startseq($fields[2]);
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foreach $i (@sseq) {
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if (!defined($dinstables{$i})) {
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$dinstables{$i} = [];
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}
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push(@{$dinstables{$i}}, $#big);
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}
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}
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}
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close F;
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#
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# Generate the bytecode array. At this point, @bytecode_list contains
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# the full set of bytecodes.
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#
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# Sort by descending length
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@bytecode_list = sort { scalar(@$b) <=> scalar(@$a) } @bytecode_list;
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@bytecode_array = ();
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%bytecode_pos = ();
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$bytecode_next = 0;
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foreach $bl (@bytecode_list) {
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my $h = hexstr(@$bl);
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next if (defined($bytecode_pos{$h}));
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push(@bytecode_array, $bl);
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while ($h ne '') {
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$bytecode_pos{$h} = $bytecode_next;
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$h = substr($h, 2);
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$bytecode_next++;
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}
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}
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undef @bytecode_list;
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@opcodes = sort keys(%k_opcodes);
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@opcodes_cc = sort keys(%k_opcodes_cc);
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if ( !defined($output) || $output eq 'b') {
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print STDERR "Writing insnsb.c...\n";
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open B, ">insnsb.c";
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print B "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print B "#include \"nasm.h\"\n";
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print B "#include \"insns.h\"\n\n";
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print B "const uint8_t nasm_bytecodes[$bytecode_next] = {\n";
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$p = 0;
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foreach $bl (@bytecode_array) {
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printf B " /* %5d */ ", $p;
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foreach $d (@$bl) {
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printf B "%#o,", $d;
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$p++;
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}
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printf B "\n";
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}
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print B "};\n";
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print B "\n";
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print B "/*\n";
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print B " * Bytecode frequencies (including reuse):\n";
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print B " *\n";
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for ($i = 0; $i < 32; $i++) {
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print B " *";
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for ($j = 0; $j < 256; $j += 32) {
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print B " |" if ($j);
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printf B " %3o:%4d", $i+$j, $bytecode_count[$i+$j];
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}
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print B "\n";
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}
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print B " */\n";
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close B;
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}
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if ( !defined($output) || $output eq 'a' ) {
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print STDERR "Writing insnsa.c...\n";
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open A, ">insnsa.c";
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print A "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print A "#include \"nasm.h\"\n";
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print A "#include \"insns.h\"\n\n";
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foreach $i (@opcodes, @opcodes_cc) {
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print A "static const struct itemplate instrux_${i}[] = {\n";
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$aname = "aa_$i";
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foreach $j (@$aname) {
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print A " ", codesubst($j), "\n";
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}
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print A " ITEMPLATE_END\n};\n\n";
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}
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print A "const struct itemplate * const nasm_instructions[] = {\n";
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foreach $i (@opcodes, @opcodes_cc) {
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print A " instrux_${i},\n";
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}
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print A "};\n";
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close A;
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}
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if ( !defined($output) || $output eq 'd' ) {
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print STDERR "Writing insnsd.c...\n";
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open D, ">insnsd.c";
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print D "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print D "#include \"nasm.h\"\n";
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print D "#include \"insns.h\"\n\n";
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print D "static const struct itemplate instrux[] = {\n";
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$n = 0;
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foreach $j (@big) {
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printf D " /* %4d */ %s\n", $n++, codesubst($j);
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}
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print D "};\n";
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foreach $h (sort(keys(%dinstables))) {
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next if ($h eq ''); # Skip pseudo-instructions
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print D "\nstatic const struct itemplate * const itable_${h}[] = {\n";
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foreach $j (@{$dinstables{$h}}) {
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print D " instrux + $j,\n";
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}
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print D "};\n";
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}
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@prefix_list = ();
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foreach $h (@disasm_prefixes, '') {
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for ($c = 0; $c < 256; $c++) {
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$nn = sprintf("%s%02X", $h, $c);
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if ($is_prefix{$nn} || defined($dinstables{$nn})) {
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# At least one entry in this prefix table
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push(@prefix_list, $h);
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$is_prefix{$h} = 1;
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last;
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}
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}
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}
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foreach $h (@prefix_list) {
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print D "\n";
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print D "static " unless ($h eq '');
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print D "const struct disasm_index ";
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print D ($h eq '') ? 'itable' : "itable_$h";
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print D "[256] = {\n";
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for ($c = 0; $c < 256; $c++) {
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$nn = sprintf("%s%02X", $h, $c);
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if ($is_prefix{$nn}) {
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die "$fname: ambiguous decoding of $nn\n"
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if (defined($dinstables{$nn}));
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printf D " { itable_%s, -1 },\n", $nn;
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} elsif (defined($dinstables{$nn})) {
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printf D " { itable_%s, %u },\n",
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$nn, scalar(@{$dinstables{$nn}});
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} else {
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printf D " { NULL, 0 },\n";
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}
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}
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print D "};\n";
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}
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print D "\nconst struct disasm_index * const itable_VEX[32][8] = {\n ";
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for ($m = 0; $m < 32; $m++) {
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print D " {\n";
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for ($lp = 0; $lp < 8; $lp++) {
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$vp = sprintf("VEX%02X%01X", $m, $lp);
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if ($is_prefix{$vp}) {
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printf D " itable_%s,\n", $vp;
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} else {
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print D " NULL,\n";
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}
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}
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print D " },";
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}
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print D "\n};\n";
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close D;
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}
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if ( !defined($output) || $output eq 'i' ) {
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print STDERR "Writing insnsi.h...\n";
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open I, ">insnsi.h";
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print I "/* This file is auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print I "/* This file in included by nasm.h */\n\n";
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print I "/* Instruction names */\n\n";
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print I "#ifndef NASM_INSNSI_H\n";
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print I "#define NASM_INSNSI_H 1\n\n";
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print I "enum opcode {\n";
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$maxlen = 0;
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foreach $i (@opcodes, @opcodes_cc) {
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print I "\tI_${i},\n";
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$len = length($i);
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$len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
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$maxlen = $len if ( $len > $maxlen );
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}
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print I "\tI_none = -1\n";
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print I "\n};\n\n";
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print I "#define MAX_INSLEN ", $maxlen, "\n";
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print I "#define FIRST_COND_OPCODE I_", $opcodes_cc[0], "\n\n";
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print I "#endif /* NASM_INSNSI_H */\n";
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close I;
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}
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if ( !defined($output) || $output eq 'n' ) {
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print STDERR "Writing insnsn.c...\n";
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open N, ">insnsn.c";
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print N "/* This file is auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print N "#include \"tables.h\"\n\n";
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print N "const char * const nasm_insn_names[] = {";
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$first = 1;
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foreach $i (@opcodes, @opcodes_cc) {
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print N "," if ( !$first );
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$first = 0;
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$ilower = $i;
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$ilower =~ s/cc$//; # Remove conditional cc suffix
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$ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
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print N "\n\t\"${ilower}\"";
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}
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print N "\n};\n";
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close N;
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}
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printf STDERR "Done: %d instructions\n", $insns;
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# Count primary bytecodes, for statistics
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sub count_bytecodes(@) {
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my $skip = 0;
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foreach my $bc (@_) {
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if ($skip) {
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$skip--;
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next;
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}
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$bytecode_count[$bc]++;
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if ($bc >= 01 && $bc <= 03) {
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$skip = $bc;
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} elsif (($bc & ~03) == 010) {
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$skip = 1;
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} elsif (($bc & ~013) == 0144) {
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$skip = 1;
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} elsif ($bc == 0172) {
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$skip = 1;
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} elsif ($bc >= 0260 && $bc <= 0270) {
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$skip = 2;
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} elsif ($bc == 0330) {
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$skip = 1;
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}
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}
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}
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sub format_insn(@) {
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my ($opcode, $operands, $codes, $flags) = @_;
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my $num, $nd = 0;
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my @bytecode;
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return (undef, undef) if $operands eq "ignore";
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# format the operands
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$operands =~ s/:/|colon,/g;
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$operands =~ s/mem(\d+)/mem|bits$1/g;
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$operands =~ s/mem/memory/g;
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$operands =~ s/memory_offs/mem_offs/g;
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$operands =~ s/imm(\d+)/imm|bits$1/g;
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$operands =~ s/imm/immediate/g;
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$operands =~ s/rm(\d+)/rm_gpr|bits$1/g;
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$operands =~ s/(mmx|xmm|ymm)rm/rm_$1/g;
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$operands =~ s/\=([0-9]+)/same_as|$1/g;
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if ($operands eq 'void') {
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@ops = ();
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} else {
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@ops = split(/\,/, $operands);
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}
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$num = scalar(@ops);
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while (scalar(@ops) < $MAX_OPERANDS) {
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push(@ops, '0');
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}
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$operands = join(',', @ops);
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$operands =~ tr/a-z/A-Z/;
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# format the flags
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$flags =~ s/,/|IF_/g;
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$flags =~ s/(\|IF_ND|IF_ND\|)//, $nd = 1 if $flags =~ /IF_ND/;
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$flags = "IF_" . $flags;
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@bytecode = (decodify($codes), 0);
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push(@bytecode_list, [@bytecode]);
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$codes = hexstr(@bytecode);
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count_bytecodes(@bytecode);
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("{I_$opcode, $num, {$operands}, \@\@CODES-$codes\@\@, $flags},", $nd);
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}
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#
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# Look for @@CODES-xxx@@ sequences and replace them with the appropriate
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# offset into nasm_bytecodes
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#
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sub codesubst($) {
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my($s) = @_;
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my $n;
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while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
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my $pos = $bytecode_pos{$1};
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if (!defined($pos)) {
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die "$fname: no position assigned to byte code $1\n";
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}
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$s = $` . "nasm_bytecodes+${pos}" . "$'";
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}
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return $s;
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}
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sub addprefix ($@) {
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my ($prefix, @list) = @_;
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my $x;
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my @l = ();
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foreach $x (@list) {
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push(@l, sprintf("%s%02X", $prefix, $x));
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}
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return @l;
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}
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#
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# Turn a code string into a sequence of bytes
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#
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sub decodify($) {
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# Although these are C-syntax strings, by convention they should have
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# only octal escapes (for directives) and hexadecimal escapes
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# (for verbatim bytes)
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my($codestr) = @_;
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if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
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return byte_code_compile($1);
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}
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my $c = $codestr;
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my @codes = ();
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while ($c ne '') {
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if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
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push(@codes, hex $1);
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$c = $2;
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next;
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} elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
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push(@codes, oct $1);
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$c = $2;
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next;
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} else {
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die "$fname: unknown code format in \"$codestr\"\n";
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}
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}
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return @codes;
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}
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# Turn a numeric list into a hex string
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sub hexstr(@) {
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my $s = '';
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my $c;
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foreach $c (@_) {
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$s .= sprintf("%02X", $c);
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}
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return $s;
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}
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# Here we determine the range of possible starting bytes for a given
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# instruction. We need only consider the codes:
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# \1 \2 \3 mean literal bytes, of course
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# \4 \5 \6 \7 mean PUSH/POP of segment registers: special case
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# \1[0123] mean byte plus register value
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# \330 means byte plus condition code
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# \0 or \340 mean give up and return empty set
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# \17[234] skip is4 control byte
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# \26x \270 skip VEX control bytes
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sub startseq($) {
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my ($codestr) = @_;
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my $word, @range;
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my @codes = ();
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my $c = $codestr;
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my $c0, $c1, $i;
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my $prefix = '';
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@codes = decodify($codestr);
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while ($c0 = shift(@codes)) {
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$c1 = $codes[0];
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if ($c0 == 01 || $c0 == 02 || $c0 == 03) {
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# Fixed byte string
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my $fbs = $prefix;
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while (1) {
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if ($c0 == 01 || $c0 == 02 || $c0 == 03) {
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while ($c0--) {
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$fbs .= sprintf("%02X", shift(@codes));
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}
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} else {
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last;
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}
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$c0 = shift(@codes);
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}
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foreach $pfx (@disasm_prefixes) {
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if (substr($fbs, 0, length($pfx)) eq $pfx) {
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$prefix = $pfx;
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$fbs = substr($fbs, length($pfx));
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last;
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}
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}
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if ($fbs ne '') {
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return ($prefix.substr($fbs,0,2));
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}
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unshift(@codes, $c0);
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} elsif ($c0 == 04) {
|
|
return addprefix($prefix, 0x07, 0x17, 0x1F);
|
|
} elsif ($c0 == 05) {
|
|
return addprefix($prefix, 0xA1, 0xA9);
|
|
} elsif ($c0 == 06) {
|
|
return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
|
|
} elsif ($c0 == 07) {
|
|
return addprefix($prefix, 0xA0, 0xA8);
|
|
} elsif ($c0 >= 010 && $c0 <= 013) {
|
|
return addprefix($prefix, $c1..($c1+7));
|
|
} elsif (($c0 & ~013) == 0144) {
|
|
return addprefix($prefix, $c1, $c1|2);
|
|
} elsif ($c0 == 0330) {
|
|
return addprefix($prefix, $c1..($c1+15));
|
|
} elsif ($c0 == 0 || $c0 == 0340) {
|
|
return $prefix;
|
|
} elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
|
|
my $m,$wlp,$vxp;
|
|
$m = shift(@codes);
|
|
$wlp = shift(@codes);
|
|
$prefix .= sprintf('VEX%02X%01X', $m, $wlp & 7);
|
|
} elsif ($c0 >= 0172 && $c0 <= 174) {
|
|
shift(@codes); # Skip is4 control byte
|
|
} else {
|
|
# We really need to be able to distinguish "forbidden"
|
|
# and "ignorable" codes here
|
|
}
|
|
}
|
|
return $prefix;
|
|
}
|
|
|
|
#
|
|
# This function takes a series of byte codes in a format which is more
|
|
# typical of the Intel documentation, and encode it.
|
|
#
|
|
# The format looks like:
|
|
#
|
|
# [operands: opcodes]
|
|
#
|
|
# The operands word lists the order of the operands:
|
|
#
|
|
# r = register field in the modr/m
|
|
# m = modr/m
|
|
# v = VEX "v" field
|
|
# d = DREX "dst" field
|
|
# i = immediate
|
|
# s = register field of is4/imz2 field
|
|
# - = implicit (unencoded) operand
|
|
#
|
|
# For an operand that should be filled into more than one field,
|
|
# enter it as e.g. "r+v".
|
|
#
|
|
sub byte_code_compile($) {
|
|
my($str) = @_;
|
|
my $opr;
|
|
my $opc;
|
|
my @codes = ();
|
|
my $litix = undef;
|
|
my %oppos = ();
|
|
my $i;
|
|
my $op, $oq;
|
|
|
|
unless ($str =~ /^(([^\s:]*)\:|)\s*(.*\S)\s*$/) {
|
|
die "$fname: $line: cannot parse: [$str]\n";
|
|
}
|
|
$opr = "\L$2";
|
|
$opc = "\L$3";
|
|
|
|
my $op = 0;
|
|
for ($i = 0; $i < length($opr); $i++) {
|
|
my $c = substr($opr,$i,1);
|
|
if ($c eq '+') {
|
|
$op--;
|
|
} else {
|
|
$oppos{$c} = $op++;
|
|
}
|
|
}
|
|
|
|
$prefix_ok = 1;
|
|
foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
|
|
if ($op eq 'o16') {
|
|
push(@codes, 0320);
|
|
} elsif ($op eq 'o32') {
|
|
push(@codes, 0321);
|
|
} elsif ($op eq 'o64') { # 64-bit operand size requiring REX.W
|
|
push(@codes, 0324);
|
|
} elsif ($op eq 'o64nw') { # Implied 64-bit operand size (no REX.W)
|
|
push(@codes, 0323);
|
|
} elsif ($op eq 'a16') {
|
|
push(@codes, 0310);
|
|
} elsif ($op eq 'a32') {
|
|
push(@codes, 0311);
|
|
} elsif ($op eq 'a64') {
|
|
push(@codes, 0313);
|
|
} elsif ($op eq '!osp') {
|
|
push(@codes, 0364);
|
|
} elsif ($op eq '!asp') {
|
|
push(@codes, 0365);
|
|
} elsif ($op eq 'rex.l') {
|
|
push(@codes, 0334);
|
|
} elsif ($op eq 'repe') {
|
|
push(@codes, 0335);
|
|
} elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
|
|
# 66/F2/F3 prefix used as an opcode extension, or np = no prefix
|
|
if ($op eq '66') {
|
|
push(@codes, 0361);
|
|
} elsif ($op eq 'f2') {
|
|
push(@codes, 0362);
|
|
} elsif ($op eq 'f3') {
|
|
push(@codes, 0363);
|
|
} else {
|
|
push(@codes, 0360);
|
|
}
|
|
} elsif ($op =~ /^[0-9a-f]{2}$/) {
|
|
if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes) {
|
|
$codes[$litix]++;
|
|
push(@codes, hex $op);
|
|
} else {
|
|
$litix = scalar(@codes);
|
|
push(@codes, 01, hex $op);
|
|
}
|
|
$prefix_ok = 0;
|
|
} elsif ($op eq '/r') {
|
|
if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
|
|
die "$fname: $line: $op requires r and m operands\n";
|
|
}
|
|
push(@codes, 0100 + ($oppos{'m'} << 3) + $oppos{'r'});
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ m:^/([0-7])$:) {
|
|
if (!defined($oppos{'m'})) {
|
|
die "$fname: $line: $op requires m operand\n";
|
|
}
|
|
push(@codes, 0200 + ($oppos{'m'} << 3) + $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^vex(|\..*)$/) {
|
|
my ($m,$w,$l,$p) = (undef,2,undef,0);
|
|
my $has_nds = 0;
|
|
foreach $oq (split(/\./, $op)) {
|
|
if ($oq eq 'vex') {
|
|
# prefix
|
|
} elsif ($oq eq '128' || $oq eq 'l0') {
|
|
$l = 0;
|
|
} elsif ($oq eq '256' || $oq eq 'l1') {
|
|
$l = 1;
|
|
} elsif ($oq eq 'w0') {
|
|
$w = 0;
|
|
} elsif ($oq eq 'w1') {
|
|
$w = 1;
|
|
} elsif ($oq eq 'wx') {
|
|
$w = 2;
|
|
} elsif ($oq eq 'ww') {
|
|
$w = 3;
|
|
} elsif ($oq eq '66') {
|
|
$p = 1;
|
|
} elsif ($oq eq 'f3') {
|
|
$p = 2;
|
|
} elsif ($oq eq 'f2') {
|
|
$p = 3;
|
|
} elsif ($oq eq '0f') {
|
|
$m = 1;
|
|
} elsif ($oq eq '0f38') {
|
|
$m = 2;
|
|
} elsif ($oq eq '0f3a') {
|
|
$m = 3;
|
|
} elsif ($oq =~ /^m([0-9]+)$/) {
|
|
$m = $1+0;
|
|
} elsif ($oq eq 'nds' || $oq eq 'ndd') {
|
|
if (!defined($oppos{'v'})) {
|
|
die "$fname: $line: vex.$oq without 'v' operand\n";
|
|
}
|
|
$has_nds = 1;
|
|
} else {
|
|
die "$fname: $line: undefined VEX subcode: $oq\n";
|
|
}
|
|
}
|
|
if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
|
|
die "$fname: $line: missing fields in VEX specification\n";
|
|
}
|
|
if (defined($oppos{'v'}) && !$has_nds) {
|
|
die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
|
|
}
|
|
push(@codes, defined($oppos{'v'}) ? 0260+$oppos{'v'} : 0270,
|
|
$m, ($w << 3)+($l << 2)+$p);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^\/drex([01])$/) {
|
|
my $oc0 = $1;
|
|
if (!defined($oppos{'d'})) {
|
|
die "$fname: $line: DREX without a 'd' operand\n";
|
|
}
|
|
# Note the use of *unshift* here, as opposed to *push*.
|
|
# This is because NASM want this byte code at the start of
|
|
# the instruction sequence, but the AMD documentation puts
|
|
# this at (roughly) the position of the drex byte itself.
|
|
# This allows us to match the AMD documentation and still
|
|
# do the right thing.
|
|
unshift(@codes, 0160+$oppos{'d'}+($oc0 ? 4 : 0));
|
|
} elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) {
|
|
if (!defined($oppos{'i'})) {
|
|
die "$fname: $line: $op without 'i' operand\n";
|
|
}
|
|
if ($op eq 'ib,s') { # Signed imm8
|
|
push(@codes, 014+$oppos{'i'});
|
|
} elsif ($op eq 'ib') { # imm8
|
|
push(@codes, 020+$oppos{'i'});
|
|
} elsif ($op eq 'ib,u') { # Unsigned imm8
|
|
push(@codes, 024+$oppos{'i'});
|
|
} elsif ($op eq 'iw') { # imm16
|
|
push(@codes, 030+$oppos{'i'});
|
|
} elsif ($op eq 'ibx') { # imm8 sign-extended to opsize
|
|
push(@codes, 0274+$oppos{'i'});
|
|
} elsif ($op eq 'iwd') { # imm16 or imm32, depending on opsize
|
|
push(@codes, 034+$oppos{'i'});
|
|
} elsif ($op eq 'id') { # imm32
|
|
push(@codes, 040+$oppos{'i'});
|
|
} elsif ($op eq 'idx') { # imm32 extended to 64 bits
|
|
push(@codes, 0254+$oppos{'i'});
|
|
} elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize
|
|
push(@codes, 044+$oppos{'i'});
|
|
} elsif ($op eq 'rel8') {
|
|
push(@codes, 050+$oppos{'i'});
|
|
} elsif ($op eq 'iq') {
|
|
push(@codes, 054+$oppos{'i'});
|
|
} elsif ($op eq 'rel16') {
|
|
push(@codes, 060+$oppos{'i'});
|
|
} elsif ($op eq 'rel') { # 16 or 32 bit relative operand
|
|
push(@codes, 064+$oppos{'i'});
|
|
} elsif ($op eq 'rel32') {
|
|
push(@codes, 070+$oppos{'i'});
|
|
} elsif ($op eq 'seg') {
|
|
push(@codes, 074+$oppos{'i'});
|
|
} elsif ($op eq 'ibw') { # imm16 that can be bytified
|
|
if (!defined($s_pos)) {
|
|
die "$fname: $line: $op without a +s byte\n";
|
|
}
|
|
$codes[$s_pos] += 0144;
|
|
push(@codes, 0140+$oppos{'i'});
|
|
} elsif ($op eq 'ibd') { # imm32 that can be bytified
|
|
if (!defined($s_pos)) {
|
|
die "$fname: $line: $op without a +s byte\n";
|
|
}
|
|
$codes[$s_pos] += 0154;
|
|
push(@codes, 0150+$oppos{'i'});
|
|
} elsif ($op eq 'ibd,s') {
|
|
# imm32 that can be bytified, sign extended to 64 bits
|
|
if (!defined($s_pos)) {
|
|
die "$fname: $line: $op without a +s byte\n";
|
|
}
|
|
$codes[$s_pos] += 0154;
|
|
push(@codes, 0250+$oppos{'i'});
|
|
}
|
|
$prefix_ok = 0;
|
|
} elsif ($op eq '/is4') {
|
|
if (!defined($oppos{'s'})) {
|
|
die "$fname: $line: $op without 's' operand\n";
|
|
}
|
|
if (defined($oppos{'i'})) {
|
|
push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
|
|
} else {
|
|
push(@codes, 0174, $oppos{'s'});
|
|
}
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^\/is4\=([0-9]+)$/) {
|
|
my $imm = $1;
|
|
if (!defined($oppos{'s'})) {
|
|
die "$fname: $line: $op without 's' operand\n";
|
|
}
|
|
if ($imm < 0 || $imm > 15) {
|
|
die "$fname: $line: invalid imm4 value for $op: $imm\n";
|
|
}
|
|
push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
|
|
if (!defined($oppos{'i'})) {
|
|
die "$fname: $line: $op without 'i' operand\n";
|
|
}
|
|
$s_pos = scalar @codes;
|
|
push(@codes, $oppos{'i'}, hex $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
|
|
push(@codes, 0330, hex $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
|
|
# Escape to enter literal bytecodes
|
|
push(@codes, oct $1);
|
|
} else {
|
|
die "$fname: $line: unknown operation: $op\n";
|
|
}
|
|
}
|
|
|
|
return @codes;
|
|
}
|