H. Peter Anvin 637b9cc581 Correct /is4 encoding for EVEX instructions ...

For EVEX instructions, /is4 can contain a fifth register bit, encoded
in bit 3 of the imm8.  Properly generate this case, and simplifiy the
/is4 generation code somewhat.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

Cherry picked and ported from nasm-2.12.xx commit
976ba730622ae7c2d5e88d4fb4477ff96c1cd3f4.

Resolved Conflicts:
	asm/assemble.c

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..

assemble.c

Correct /is4 encoding for EVEX instructions

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assemble.h

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directiv.dat

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directiv.pl

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eval.c

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eval.h

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exprlib.c

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float.c

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float.h

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labels.c

Merge branch 'nasm-2.12.xx'

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listing.c

New backend interface - assembler internals #1

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listing.h

New backend interface - assembler internals #1

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nasm.c

New backend interface - assembler internals #1

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parser.c

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parser.h

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phash.pl

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pptok.dat

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pptok.pl

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preproc-nop.c

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preproc.c

Merge tag 'nasm-2.12.02'

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preproc.h

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quote.c

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quote.h

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rdstrnum.c

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segalloc.c

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stdscan.c

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stdscan.h

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strfunc.c

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tokens.dat

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tokhash.pl

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