mirror of
https://github.com/netwide-assembler/nasm.git
synced 2024-12-15 09:09:58 +08:00
9f31c84405
For VEX instructions created *after* the corresponding EVEX
instructions, we need the user to either explicitly declare them {vex}
or specifying "cpu latevex".
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
135 lines
3.7 KiB
C
135 lines
3.7 KiB
C
#ifndef NASM_IFLAG_H
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#define NASM_IFLAG_H
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#include "compiler.h"
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#include "ilog2.h"
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#include "iflaggen.h"
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#define IF_GENBIT(bit) (UINT32_C(1) << ((bit) & 31))
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static inline int ifcomp(uint32_t a, uint32_t b)
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{
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return (a > b) - (a < b);
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}
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static inline bool iflag_test(const iflag_t *f, unsigned int bit)
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{
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return !!(f->field[bit >> 5] & IF_GENBIT(bit));
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}
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static inline void iflag_set(iflag_t *f, unsigned int bit)
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{
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f->field[bit >> 5] |= IF_GENBIT(bit);
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}
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static inline void iflag_clear(iflag_t *f, unsigned int bit)
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{
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f->field[bit >> 5] &= ~IF_GENBIT(bit);
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}
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static inline void iflag_clear_all(iflag_t *f)
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{
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memset(f, 0, sizeof(*f));
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}
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static inline void iflag_set_all(iflag_t *f)
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{
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memset(f, ~0, sizeof(*f));
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}
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#define iflag_for_each_field(v) for ((v) = 0; (v) < IF_FIELD_COUNT; (v)++)
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static inline int iflag_cmp(const iflag_t *a, const iflag_t *b)
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{
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int i;
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/* This is intentionally a reverse loop! */
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for (i = IF_FIELD_COUNT-1; i >= 0; i--) {
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if (a->field[i] == b->field[i])
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continue;
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return ifcomp(a->field[i], b->field[i]);
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}
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return 0;
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}
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#define IF_GEN_HELPER(name, op) \
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static inline iflag_t iflag_##name(const iflag_t *a, const iflag_t *b) \
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{ \
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unsigned int i; \
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iflag_t res; \
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\
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iflag_for_each_field(i) \
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res.field[i] = a->field[i] op b->field[i]; \
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\
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return res; \
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}
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IF_GEN_HELPER(xor, ^)
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/* Some helpers which are to work with predefined masks */
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#define IF_SMASK (IFM_SB|IFM_SW|IFM_SD|IFM_SQ|IFM_SO|IFM_SY|IFM_SZ|IFM_SIZE|IFM_ANYSIZE)
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#define IF_ARMASK (IFM_AR0|IFM_AR1|IFM_AR2|IFM_AR3|IFM_AR4)
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#define _itemp_smask(idx) (insns_flags[(idx)].field[0] & IF_SMASK)
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#define _itemp_armask(idx) (insns_flags[(idx)].field[0] & IF_ARMASK)
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#define _itemp_arg(idx) ((_itemp_armask(idx) >> IF_AR0) - 1)
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#define itemp_smask(itemp) _itemp_smask((itemp)->iflag_idx)
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#define itemp_arg(itemp) _itemp_arg((itemp)->iflag_idx)
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#define itemp_armask(itemp) _itemp_armask((itemp)->iflag_idx)
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/*
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* IF_ANY is the highest CPU level by definition
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*/
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#define IF_CPU_LEVEL_MASK ((IFM_ANY << 1) - 1)
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static inline int iflag_cmp_cpu(const iflag_t *a, const iflag_t *b)
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{
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return ifcomp(a->field[IF_CPU_FIELD], b->field[IF_CPU_FIELD]);
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}
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static inline uint32_t _iflag_cpu_level(const iflag_t *a)
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{
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return a->field[IF_CPU_FIELD] & IF_CPU_LEVEL_MASK;
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}
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static inline int iflag_cmp_cpu_level(const iflag_t *a, const iflag_t *b)
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{
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return ifcomp(_iflag_cpu_level(a), _iflag_cpu_level(b));
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}
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/* Returns true if the CPU level is at least a certain value */
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static inline bool iflag_cpu_level_ok(const iflag_t *a, unsigned int bit)
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{
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return _iflag_cpu_level(a) >= IF_GENBIT(bit);
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}
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static inline void iflag_set_all_features(iflag_t *a)
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{
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uint32_t *p = &a->field[IF_FEATURE_FIELD];
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memset(p, -1, IF_FEATURE_NFIELDS * sizeof(uint32_t));
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}
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static inline iflag_t _iflag_pfmask(const iflag_t *a)
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{
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iflag_t r;
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iflag_clear_all(&r);
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if (iflag_test(a, IF_CYRIX))
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iflag_set(&r, IF_CYRIX);
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if (iflag_test(a, IF_AMD))
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iflag_set(&r, IF_AMD);
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return r;
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}
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#define iflag_pfmask(itemp) _iflag_pfmask(&insns_flags[(itemp)->iflag_idx])
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#endif /* NASM_IFLAG_H */
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