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e56c2dc5b7
Break the instruction processing if there are impossible combinations of Sx flags and operand sizes. If the intent is to always require explicit sizes, use the SX flag. The INSERTPS instruction pattern was explicitly wrong, the rest of these are nuisance fixes. TODO: fix the disassembler to be able to exclude patterns where these bits don't matter. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
15 lines
197 B
NASM
15 lines
197 B
NASM
_start:
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movd ecx,xmm0
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movd [foo],xmm0
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movd dword [foo],xmm0
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movdqa xmm1,xmm0
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movdqa [foo],xmm0
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movdqa oword [foo],xmm0
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cmppd xmm2,xmm3,8
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cmppd xmm2,xmm3,byte 8
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section .bss
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foo: reso 1
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