mirror of
https://github.com/netwide-assembler/nasm.git
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5b39461178
Distinguish instructions which have once been valid (OBSOLETE) from those that never saw the light of day (NEVER). Futhermore, flag instructions which devolve to an architectural noop from those with undefined behavior and possibly recycled opcodes. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
1064 lines
33 KiB
Perl
Executable File
1064 lines
33 KiB
Perl
Executable File
#!/usr/bin/perl
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## --------------------------------------------------------------------------
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##
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## Copyright 1996-2017 The NASM Authors - All Rights Reserved
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## See the file AUTHORS included with the NASM distribution for
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## the specific copyright holders.
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##
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## Redistribution and use in source and binary forms, with or without
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## modification, are permitted provided that the following
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## conditions are met:
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##
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## * Redistributions of source code must retain the above copyright
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## notice, this list of conditions and the following disclaimer.
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## * Redistributions in binary form must reproduce the above
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## copyright notice, this list of conditions and the following
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## disclaimer in the documentation and/or other materials provided
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## with the distribution.
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##
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## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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## DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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## CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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## NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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## LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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## EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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##
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## --------------------------------------------------------------------------
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#
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# insns.pl
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#
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# Parse insns.dat and produce generated source code files
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require 'x86/insns-iflags.ph';
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# Opcode prefixes which need their own opcode tables
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# LONGER PREFIXES FIRST!
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@disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
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# This should match MAX_OPERANDS from nasm.h
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$MAX_OPERANDS = 5;
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# Add VEX/XOP prefixes
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@vex_class = ( 'vex', 'xop', 'evex' );
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$vex_classes = scalar(@vex_class);
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@vexlist = ();
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%vexmap = ();
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for ($c = 0; $c < $vex_classes; $c++) {
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$vexmap{$vex_class[$c]} = $c;
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for ($m = 0; $m < 32; $m++) {
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for ($p = 0; $p < 4; $p++) {
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push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $p));
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}
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}
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}
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@disasm_prefixes = (@vexlist, @disasm_prefixes);
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@bytecode_count = (0) x 256;
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print STDERR "Reading insns.dat...\n";
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@args = ();
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undef $output;
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foreach $arg ( @ARGV ) {
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if ( $arg =~ /^\-/ ) {
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if ( $arg =~ /^\-([abdin]|f[hc])$/ ) {
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$output = $1;
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} else {
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die "$0: Unknown option: ${arg}\n";
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}
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} else {
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push (@args, $arg);
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}
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}
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die if (scalar(@args) != 2); # input output
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($fname, $oname) = @args;
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open(F, '<', $fname) || die "unable to open $fname";
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%dinstables = ();
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@bytecode_list = ();
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$line = 0;
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$insns = 0;
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$n_opcodes = $n_opcodes_cc = 0;
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while (<F>) {
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$line++;
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chomp;
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next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
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unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
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warn "line $line does not contain four fields\n";
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next;
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}
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@fields = ($1, $2, $3, $4);
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@field_list = ([@fields, 0]);
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if ($fields[1] =~ /\*/) {
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# This instruction has relaxed form(s)
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if ($fields[2] !~ /^\[/) {
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warn "line $line has an * operand but uses raw bytecodes\n";
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next;
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}
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$opmask = 0;
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@ops = split(/,/, $fields[1]);
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for ($oi = 0; $oi < scalar @ops; $oi++) {
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if ($ops[$oi] =~ /\*$/) {
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if ($oi == 0) {
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warn "line $line has a first operand with a *\n";
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next;
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}
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$opmask |= 1 << $oi;
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}
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}
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for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
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if (($oi & ~$opmask) == 0) {
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my @xops = ();
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my $omask = ~$oi;
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for ($oj = 0; $oj < scalar(@ops); $oj++) {
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if ($omask & 1) {
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push(@xops, $ops[$oj]);
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}
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$omask >>= 1;
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}
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push(@field_list, [$fields[0], join(',', @xops),
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$fields[2], $fields[3], $oi]);
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}
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}
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}
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foreach $fptr (@field_list) {
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@fields = @$fptr;
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($formatted, $nd) = format_insn(@fields);
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if ($formatted) {
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$insns++;
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$aname = "aa_$fields[0]";
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push @$aname, $formatted;
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}
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if ( $fields[0] =~ /cc$/ ) {
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# Conditional instruction
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if (!defined($k_opcodes_cc{$fields[0]})) {
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$k_opcodes_cc{$fields[0]} = $n_opcodes_cc++;
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}
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} else {
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# Unconditional instruction
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if (!defined($k_opcodes{$fields[0]})) {
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$k_opcodes{$fields[0]} = $n_opcodes++;
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}
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}
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if ($formatted && !$nd) {
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push @big, $formatted;
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my @sseq = startseq($fields[2], $fields[4]);
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foreach $i (@sseq) {
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if (!defined($dinstables{$i})) {
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$dinstables{$i} = [];
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}
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push(@{$dinstables{$i}}, $#big);
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}
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}
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}
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}
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close F;
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#
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# Generate the bytecode array. At this point, @bytecode_list contains
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# the full set of bytecodes.
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#
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# Sort by descending length
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@bytecode_list = sort { scalar(@$b) <=> scalar(@$a) } @bytecode_list;
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@bytecode_array = ();
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%bytecode_pos = ();
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$bytecode_next = 0;
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foreach $bl (@bytecode_list) {
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my $h = hexstr(@$bl);
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next if (defined($bytecode_pos{$h}));
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push(@bytecode_array, $bl);
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while ($h ne '') {
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$bytecode_pos{$h} = $bytecode_next;
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$h = substr($h, 2);
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$bytecode_next++;
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}
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}
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undef @bytecode_list;
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@opcodes = sort { $k_opcodes{$a} <=> $k_opcodes{$b} } keys(%k_opcodes);
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@opcodes_cc = sort { $k_opcodes_cc{$a} <=> $k_opcodes_cc{$b} } keys(%k_opcodes_cc);
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if ( $output eq 'b') {
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print STDERR "Writing $oname...\n";
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open(B, '>', $oname);
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print B "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print B "#include \"nasm.h\"\n";
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print B "#include \"insns.h\"\n\n";
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print B "const uint8_t nasm_bytecodes[$bytecode_next] = {\n";
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$p = 0;
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foreach $bl (@bytecode_array) {
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printf B " /* %5d */ ", $p;
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foreach $d (@$bl) {
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printf B "%#o,", $d;
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$p++;
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}
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printf B "\n";
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}
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print B "};\n";
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print B "\n";
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print B "/*\n";
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print B " * Bytecode frequencies (including reuse):\n";
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print B " *\n";
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for ($i = 0; $i < 32; $i++) {
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print B " *";
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for ($j = 0; $j < 256; $j += 32) {
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print B " |" if ($j);
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printf B " %3o:%4d", $i+$j, $bytecode_count[$i+$j];
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}
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print B "\n";
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}
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print B " */\n";
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close B;
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}
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if ( $output eq 'a' ) {
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print STDERR "Writing $oname...\n";
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open(A, '>', $oname);
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print A "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print A "#include \"nasm.h\"\n";
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print A "#include \"insns.h\"\n\n";
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foreach $i (@opcodes, @opcodes_cc) {
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print A "static const struct itemplate instrux_${i}[] = {\n";
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$aname = "aa_$i";
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foreach $j (@$aname) {
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print A " ", codesubst($j), "\n";
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}
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print A " ITEMPLATE_END\n};\n\n";
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}
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print A "const struct itemplate * const nasm_instructions[] = {\n";
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foreach $i (@opcodes, @opcodes_cc) {
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print A " instrux_${i},\n";
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}
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print A "};\n";
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close A;
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}
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if ( $output eq 'd' ) {
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print STDERR "Writing $oname...\n";
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open(D, '>', $oname);
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print D "/* This file auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print D "#include \"nasm.h\"\n";
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print D "#include \"insns.h\"\n\n";
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print D "static const struct itemplate instrux[] = {\n";
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$n = 0;
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foreach $j (@big) {
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printf D " /* %4d */ %s\n", $n++, codesubst($j);
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}
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print D "};\n";
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foreach $h (sort(keys(%dinstables))) {
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next if ($h eq ''); # Skip pseudo-instructions
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print D "\nstatic const struct itemplate * const itable_${h}[] = {\n";
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foreach $j (@{$dinstables{$h}}) {
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print D " instrux + $j,\n";
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}
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print D "};\n";
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}
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@prefix_list = ();
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foreach $h (@disasm_prefixes, '') {
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for ($c = 0; $c < 256; $c++) {
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$nn = sprintf("%s%02X", $h, $c);
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if ($is_prefix{$nn} || defined($dinstables{$nn})) {
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# At least one entry in this prefix table
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push(@prefix_list, $h);
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$is_prefix{$h} = 1;
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last;
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}
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}
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}
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foreach $h (@prefix_list) {
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print D "\n";
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print D "static " unless ($h eq '');
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print D "const struct disasm_index ";
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print D ($h eq '') ? 'itable' : "itable_$h";
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print D "[256] = {\n";
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for ($c = 0; $c < 256; $c++) {
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$nn = sprintf("%s%02X", $h, $c);
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if ($is_prefix{$nn}) {
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die "$fname:$line: ambiguous decoding of $nn\n"
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if (defined($dinstables{$nn}));
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printf D " /* 0x%02x */ { itable_%s, -1 },\n", $c, $nn;
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} elsif (defined($dinstables{$nn})) {
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printf D " /* 0x%02x */ { itable_%s, %u },\n", $c,
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$nn, scalar(@{$dinstables{$nn}});
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} else {
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printf D " /* 0x%02x */ { NULL, 0 },\n", $c;
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}
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}
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print D "};\n";
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}
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printf D "\nconst struct disasm_index * const itable_vex[NASM_VEX_CLASSES][32][4] =\n";
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print D "{\n";
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for ($c = 0; $c < $vex_classes; $c++) {
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print D " {\n";
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for ($m = 0; $m < 32; $m++) {
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print D " { ";
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for ($p = 0; $p < 4; $p++) {
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$vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $p);
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printf D "%-15s",
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($is_prefix{$vp} ? sprintf("itable_%s,", $vp) : 'NULL,');
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}
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print D "},\n";
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}
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print D " },\n";
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}
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print D "};\n";
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close D;
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}
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if ( $output eq 'i' ) {
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print STDERR "Writing $oname...\n";
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open(I, '>', $oname);
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print I "/* This file is auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print I "/* This file in included by nasm.h */\n\n";
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print I "/* Instruction names */\n\n";
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print I "#ifndef NASM_INSNSI_H\n";
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print I "#define NASM_INSNSI_H 1\n\n";
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print I "enum opcode {\n";
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$maxlen = 0;
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foreach $i (@opcodes, @opcodes_cc) {
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print I "\tI_${i},\n";
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$len = length($i);
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$len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
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$maxlen = $len if ( $len > $maxlen );
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}
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print I "\tI_none = -1\n";
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print I "};\n\n";
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print I "#define MAX_INSLEN ", $maxlen, "\n";
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print I "#define NASM_VEX_CLASSES ", $vex_classes, "\n";
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print I "#define NO_DECORATOR\t{", join(',',(0) x $MAX_OPERANDS), "}\n";
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print I "#define FIRST_COND_OPCODE I_", $opcodes_cc[0], "\n\n";
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print I "#endif /* NASM_INSNSI_H */\n";
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close I;
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}
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if ( $output eq 'n' ) {
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print STDERR "Writing $oname...\n";
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open(N, '>', $oname);
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print N "/* This file is auto-generated from insns.dat by insns.pl" .
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" - don't edit it */\n\n";
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print N "#include \"tables.h\"\n\n";
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print N "const char * const nasm_insn_names[] = {";
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$first = 1;
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foreach $i (@opcodes, @opcodes_cc) {
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print N "," if ( !$first );
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$first = 0;
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$ilower = $i;
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$ilower =~ s/cc$//; # Remove conditional cc suffix
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$ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
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print N "\n\t\"${ilower}\"";
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}
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print N "\n};\n";
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close N;
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}
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if ( $output eq 'fh') {
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write_iflaggen_h();
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}
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if ( $output eq 'fc') {
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write_iflag_c();
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}
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printf STDERR "Done: %d instructions\n", $insns;
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# Count primary bytecodes, for statistics
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sub count_bytecodes(@) {
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my $skip = 0;
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foreach my $bc (@_) {
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if ($skip) {
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$skip--;
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next;
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}
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$bytecode_count[$bc]++;
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if ($bc >= 01 && $bc <= 04) {
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$skip = $bc;
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} elsif (($bc & ~03) == 010) {
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$skip = 1;
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} elsif (($bc & ~013) == 0144) {
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$skip = 1;
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} elsif ($bc == 0172 || $bc == 0173) {
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$skip = 1;
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} elsif (($bc & ~3) == 0260 || $bc == 0270) { # VEX
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$skip = 2;
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} elsif (($bc & ~3) == 0240 || $bc == 0250) { # EVEX
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$skip = 3;
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} elsif ($bc == 0330) {
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$skip = 1;
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}
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}
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}
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sub format_insn($$$$$) {
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my ($opcode, $operands, $codes, $flags, $relax) = @_;
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my $nd = 0;
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my ($num, $flagsindex);
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my @bytecode;
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my ($op, @ops, $opp, @opx, @oppx, @decos, @opevex);
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return (undef, undef) if $operands eq "ignore";
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# format the operands
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$operands =~ s/\*//g;
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$operands =~ s/:/|colon,/g;
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@ops = ();
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@decos = ();
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if ($operands ne 'void') {
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foreach $op (split(/,/, $operands)) {
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@opx = ();
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@opevex = ();
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foreach $opp (split(/\|/, $op)) {
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@oppx = ();
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if ($opp =~ s/^(b(32|64)|mask|z|er|sae)$//) {
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push(@opevex, $1);
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}
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if ($opp =~ s/(?<!\d)(8|16|32|64|80|128|256|512)$//) {
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push(@oppx, "bits$1");
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}
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$opp =~ s/^mem$/memory/;
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$opp =~ s/^memory_offs$/mem_offs/;
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$opp =~ s/^imm$/immediate/;
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$opp =~ s/^([a-z]+)rm$/rm_$1/;
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$opp =~ s/^rm$/rm_gpr/;
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$opp =~ s/^reg$/reg_gpr/;
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# only for evex insns, high-16 regs are allowed
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if ($codes !~ /(^|\s)evex\./) {
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$opp =~ s/^(rm_[xyz]mm)$/$1_l16/;
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$opp =~ s/^([xyz]mm)reg$/$1_l16/;
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}
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push(@opx, $opp, @oppx) if $opp;
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}
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$op = join('|', @opx);
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push(@ops, $op);
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push(@decos, (@opevex ? join('|', @opevex) : '0'));
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}
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}
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$num = scalar(@ops);
|
|
while (scalar(@ops) < $MAX_OPERANDS) {
|
|
push(@ops, '0');
|
|
push(@decos, '0');
|
|
}
|
|
$operands = join(',', @ops);
|
|
$operands =~ tr/a-z/A-Z/;
|
|
|
|
$decorators = "{" . join(',', @decos) . "}";
|
|
if ($decorators =~ /^{(0,)+0}$/) {
|
|
$decorators = "NO_DECORATOR";
|
|
}
|
|
$decorators =~ tr/a-z/A-Z/;
|
|
|
|
# expand and uniqify the flags
|
|
my %flags;
|
|
foreach my $flag (split(',', $flags)) {
|
|
if ($flag eq 'ND') {
|
|
$nd = 1;
|
|
} elsif ($flag eq 'X64') {
|
|
# X64 is shorthand for "LONG,X86_64"
|
|
$flags{'LONG'}++;
|
|
$flags{'X86_64'}++;
|
|
} elsif ($flag ne '') {
|
|
$flags{$flag}++;
|
|
}
|
|
|
|
if ($flag eq 'NEVER' || $flag eq 'NOP') {
|
|
# These flags imply OBSOLETE
|
|
$flags{'OBSOLETE'}++;
|
|
}
|
|
}
|
|
|
|
if ($codes =~ /evex\./) {
|
|
$flags{'EVEX'}++;
|
|
} elsif ($codes =~ /(vex|xop)\./) {
|
|
$flags{'VEX'}++;
|
|
}
|
|
|
|
$flagsindex = insns_flag_index(keys %flags);
|
|
die "$fname:$line: error in flags $flags" unless (defined($flagsindex));
|
|
|
|
@bytecode = (decodify($codes, $relax), 0);
|
|
push(@bytecode_list, [@bytecode]);
|
|
$codes = hexstr(@bytecode);
|
|
count_bytecodes(@bytecode);
|
|
|
|
("{I_$opcode, $num, {$operands}, $decorators, \@\@CODES-$codes\@\@, $flagsindex},", $nd);
|
|
}
|
|
|
|
#
|
|
# Look for @@CODES-xxx@@ sequences and replace them with the appropriate
|
|
# offset into nasm_bytecodes
|
|
#
|
|
sub codesubst($) {
|
|
my($s) = @_;
|
|
my $n;
|
|
|
|
while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
|
|
my $pos = $bytecode_pos{$1};
|
|
if (!defined($pos)) {
|
|
die "$fname:$line: no position assigned to byte code $1\n";
|
|
}
|
|
$s = $` . "nasm_bytecodes+${pos}" . "$'";
|
|
}
|
|
return $s;
|
|
}
|
|
|
|
sub addprefix ($@) {
|
|
my ($prefix, @list) = @_;
|
|
my $x;
|
|
my @l = ();
|
|
|
|
foreach $x (@list) {
|
|
push(@l, sprintf("%s%02X", $prefix, $x));
|
|
}
|
|
|
|
return @l;
|
|
}
|
|
|
|
#
|
|
# Turn a code string into a sequence of bytes
|
|
#
|
|
sub decodify($$) {
|
|
# Although these are C-syntax strings, by convention they should have
|
|
# only octal escapes (for directives) and hexadecimal escapes
|
|
# (for verbatim bytes)
|
|
my($codestr, $relax) = @_;
|
|
|
|
if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
|
|
return byte_code_compile($1, $relax);
|
|
}
|
|
|
|
my $c = $codestr;
|
|
my @codes = ();
|
|
|
|
unless ($codestr eq 'ignore') {
|
|
while ($c ne '') {
|
|
if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
|
|
push(@codes, hex $1);
|
|
$c = $2;
|
|
next;
|
|
} elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
|
|
push(@codes, oct $1);
|
|
$c = $2;
|
|
next;
|
|
} else {
|
|
die "$fname:$line: unknown code format in \"$codestr\"\n";
|
|
}
|
|
}
|
|
}
|
|
|
|
return @codes;
|
|
}
|
|
|
|
# Turn a numeric list into a hex string
|
|
sub hexstr(@) {
|
|
my $s = '';
|
|
my $c;
|
|
|
|
foreach $c (@_) {
|
|
$s .= sprintf("%02X", $c);
|
|
}
|
|
return $s;
|
|
}
|
|
|
|
# Here we determine the range of possible starting bytes for a given
|
|
# instruction. We need only consider the codes:
|
|
# \[1234] mean literal bytes, of course
|
|
# \1[0123] mean byte plus register value
|
|
# \330 means byte plus condition code
|
|
# \0 or \340 mean give up and return empty set
|
|
# \34[4567] mean PUSH/POP of segment registers: special case
|
|
# \17[234] skip is4 control byte
|
|
# \26x \270 skip VEX control bytes
|
|
# \24x \250 skip EVEX control bytes
|
|
sub startseq($$) {
|
|
my ($codestr, $relax) = @_;
|
|
my $word;
|
|
my @codes = ();
|
|
my $c = $codestr;
|
|
my($c0, $c1, $i);
|
|
my $prefix = '';
|
|
|
|
@codes = decodify($codestr, $relax);
|
|
|
|
while (defined($c0 = shift(@codes))) {
|
|
$c1 = $codes[0];
|
|
if ($c0 >= 01 && $c0 <= 04) {
|
|
# Fixed byte string
|
|
my $fbs = $prefix;
|
|
while (defined($c0)) {
|
|
if ($c0 >= 01 && $c0 <= 04) {
|
|
while ($c0--) {
|
|
$fbs .= sprintf("%02X", shift(@codes));
|
|
}
|
|
} else {
|
|
last;
|
|
}
|
|
$c0 = shift(@codes);
|
|
}
|
|
|
|
foreach $pfx (@disasm_prefixes) {
|
|
if (substr($fbs, 0, length($pfx)) eq $pfx) {
|
|
$prefix = $pfx;
|
|
$fbs = substr($fbs, length($pfx));
|
|
last;
|
|
}
|
|
}
|
|
|
|
if ($fbs ne '') {
|
|
return ($prefix.substr($fbs,0,2));
|
|
}
|
|
|
|
unshift(@codes, $c0);
|
|
} elsif ($c0 >= 010 && $c0 <= 013) {
|
|
return addprefix($prefix, $c1..($c1+7));
|
|
} elsif (($c0 & ~013) == 0144) {
|
|
return addprefix($prefix, $c1, $c1|2);
|
|
} elsif ($c0 == 0330) {
|
|
return addprefix($prefix, $c1..($c1+15));
|
|
} elsif ($c0 == 0 || $c0 == 0340) {
|
|
return $prefix;
|
|
} elsif (($c0 & ~3) == 0260 || $c0 == 0270 ||
|
|
($c0 & ~3) == 0240 || $c0 == 0250) {
|
|
my($c,$m,$wlp);
|
|
$m = shift(@codes);
|
|
$wlp = shift(@codes);
|
|
$c = ($m >> 6);
|
|
$m = $m & 31;
|
|
$prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 3);
|
|
if ($c0 < 0260) {
|
|
my $tuple = shift(@codes);
|
|
}
|
|
} elsif ($c0 >= 0172 && $c0 <= 173) {
|
|
shift(@codes); # Skip is4 control byte
|
|
} else {
|
|
# We really need to be able to distinguish "forbidden"
|
|
# and "ignorable" codes here
|
|
}
|
|
}
|
|
return $prefix;
|
|
}
|
|
|
|
# EVEX tuple types offset is 0300. e.g. 0301 is for full vector(fv).
|
|
sub tupletype($) {
|
|
my ($tuplestr) = @_;
|
|
my %tuple_codes = (
|
|
'' => 000,
|
|
'fv' => 001,
|
|
'hv' => 002,
|
|
'fvm' => 003,
|
|
't1s8' => 004,
|
|
't1s16' => 005,
|
|
't1s' => 006,
|
|
't1f32' => 007,
|
|
't1f64' => 010,
|
|
't2' => 011,
|
|
't4' => 012,
|
|
't8' => 013,
|
|
'hvm' => 014,
|
|
'qvm' => 015,
|
|
'ovm' => 016,
|
|
'm128' => 017,
|
|
'dup' => 020,
|
|
);
|
|
|
|
if (defined $tuple_codes{$tuplestr}) {
|
|
return 0300 + $tuple_codes{$tuplestr};
|
|
} else {
|
|
die "$fname:$line: undefined tuple type : $tuplestr\n";
|
|
}
|
|
}
|
|
|
|
#
|
|
# This function takes a series of byte codes in a format which is more
|
|
# typical of the Intel documentation, and encode it.
|
|
#
|
|
# The format looks like:
|
|
#
|
|
# [operands: opcodes]
|
|
#
|
|
# The operands word lists the order of the operands:
|
|
#
|
|
# r = register field in the modr/m
|
|
# m = modr/m
|
|
# v = VEX "v" field
|
|
# i = immediate
|
|
# s = register field of is4/imz2 field
|
|
# - = implicit (unencoded) operand
|
|
# x = indeX register of mib. 014..017 bytecodes are used.
|
|
#
|
|
# For an operand that should be filled into more than one field,
|
|
# enter it as e.g. "r+v".
|
|
#
|
|
sub byte_code_compile($$) {
|
|
my($str, $relax) = @_;
|
|
my $opr;
|
|
my $opc;
|
|
my @codes = ();
|
|
my $litix = undef;
|
|
my %oppos = ();
|
|
my $i;
|
|
my ($op, $oq);
|
|
my $opex;
|
|
|
|
my %imm_codes = (
|
|
'ib' => 020, # imm8
|
|
'ib,u' => 024, # Unsigned imm8
|
|
'iw' => 030, # imm16
|
|
'ib,s' => 0274, # imm8 sign-extended to opsize or bits
|
|
'iwd' => 034, # imm16 or imm32, depending on opsize
|
|
'id' => 040, # imm32
|
|
'id,s' => 0254, # imm32 sign-extended to 64 bits
|
|
'iwdq' => 044, # imm16/32/64, depending on addrsize
|
|
'rel8' => 050,
|
|
'iq' => 054,
|
|
'rel16' => 060,
|
|
'rel' => 064, # 16 or 32 bit relative operand
|
|
'rel32' => 070,
|
|
'seg' => 074,
|
|
);
|
|
my %plain_codes = (
|
|
'o16' => 0320, # 16-bit operand size
|
|
'o32' => 0321, # 32-bit operand size
|
|
'odf' => 0322, # Operand size is default
|
|
'o64' => 0324, # 64-bit operand size requiring REX.W
|
|
'o64nw' => 0323, # Implied 64-bit operand size (no REX.W)
|
|
'a16' => 0310,
|
|
'a32' => 0311,
|
|
'adf' => 0312, # Address size is default
|
|
'a64' => 0313,
|
|
'!osp' => 0364,
|
|
'!asp' => 0365,
|
|
'f2i' => 0332, # F2 prefix, but 66 for operand size is OK
|
|
'f3i' => 0333, # F3 prefix, but 66 for operand size is OK
|
|
'mustrep' => 0336,
|
|
'mustrepne' => 0337,
|
|
'rex.l' => 0334,
|
|
'norexb' => 0314,
|
|
'norexx' => 0315,
|
|
'norexr' => 0316,
|
|
'norexw' => 0317,
|
|
'repe' => 0335,
|
|
'nohi' => 0325, # Use spl/bpl/sil/dil even without REX
|
|
'nof3' => 0326, # No REP 0xF3 prefix permitted
|
|
'norep' => 0331, # No REP prefix permitted
|
|
'wait' => 0341, # Needs a wait prefix
|
|
'resb' => 0340,
|
|
'np' => 0360, # No prefix
|
|
'jcc8' => 0370, # Match only if Jcc possible with single byte
|
|
'jmp8' => 0371, # Match only if JMP possible with single byte
|
|
'jlen' => 0373, # Length of jump
|
|
'hlexr' => 0271,
|
|
'hlenl' => 0272,
|
|
'hle' => 0273,
|
|
|
|
# This instruction takes XMM VSIB
|
|
'vsibx' => 0374,
|
|
'vm32x' => 0374,
|
|
'vm64x' => 0374,
|
|
|
|
# This instruction takes YMM VSIB
|
|
'vsiby' => 0375,
|
|
'vm32y' => 0375,
|
|
'vm64y' => 0375,
|
|
|
|
# This instruction takes ZMM VSIB
|
|
'vsibz' => 0376,
|
|
'vm32z' => 0376,
|
|
'vm64z' => 0376,
|
|
);
|
|
|
|
unless ($str =~ /^(([^\s:]*)\:*([^\s:]*)\:|)\s*(.*\S)\s*$/) {
|
|
die "$fname:$line: cannot parse: [$str]\n";
|
|
}
|
|
$opr = lc($2);
|
|
$tuple = lc($3); # Tuple type for AVX512
|
|
$opc = lc($4);
|
|
|
|
$op = 0;
|
|
for ($i = 0; $i < length($opr); $i++) {
|
|
my $c = substr($opr,$i,1);
|
|
if ($c eq '+') {
|
|
$op--;
|
|
} else {
|
|
if ($relax & 1) {
|
|
$op--;
|
|
}
|
|
$relax >>= 1;
|
|
$oppos{$c} = $op++;
|
|
}
|
|
}
|
|
$tup = tupletype($tuple);
|
|
|
|
my $last_imm = 'h';
|
|
my $prefix_ok = 1;
|
|
foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
|
|
my $pc = $plain_codes{$op};
|
|
|
|
if (defined $pc) {
|
|
# Plain code
|
|
push(@codes, $pc);
|
|
} elsif ($prefix_ok && $op =~ /^(66|f2|f3)$/) {
|
|
# 66/F2/F3 prefix used as an opcode extension
|
|
if ($op eq '66') {
|
|
push(@codes, 0361);
|
|
} elsif ($op eq 'f2') {
|
|
push(@codes, 0332);
|
|
} else {
|
|
push(@codes, 0333);
|
|
}
|
|
} elsif ($op =~ /^[0-9a-f]{2}$/) {
|
|
if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
|
|
$codes[$litix] < 4) {
|
|
$codes[$litix]++;
|
|
push(@codes, hex $op);
|
|
} else {
|
|
$litix = scalar(@codes);
|
|
push(@codes, 01, hex $op);
|
|
}
|
|
$prefix_ok = 0;
|
|
} elsif ($op eq '/r') {
|
|
if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
|
|
die "$fname:$line: $op requires r and m operands\n";
|
|
}
|
|
$opex = (($oppos{'m'} & 4) ? 06 : 0) |
|
|
(($oppos{'r'} & 4) ? 05 : 0);
|
|
push(@codes, $opex) if ($opex);
|
|
# if mib is composed with two separate operands - ICC style
|
|
push(@codes, 014 + ($oppos{'x'} & 3)) if (defined($oppos{'x'}));
|
|
push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ m:^/([0-7])$:) {
|
|
if (!defined($oppos{'m'})) {
|
|
die "$fname:$line: $op requires m operand\n";
|
|
}
|
|
push(@codes, 06) if ($oppos{'m'} & 4);
|
|
push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^(vex|xop)(|\..*)$/) {
|
|
my $vexname = $1;
|
|
my $c = $vexmap{$vexname};
|
|
my ($m,$w,$l,$p) = (undef,2,undef,0);
|
|
my $has_nds = 0;
|
|
my @subops = split(/\./, $op);
|
|
shift @subops; # Drop prefix
|
|
foreach $oq (@subops) {
|
|
if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz') {
|
|
$l = 0;
|
|
} elsif ($oq eq '256' || $oq eq 'l1') {
|
|
$l = 1;
|
|
} elsif ($oq eq 'lig') {
|
|
$l = 2;
|
|
} elsif ($oq eq 'w0') {
|
|
$w = 0;
|
|
} elsif ($oq eq 'w1') {
|
|
$w = 1;
|
|
} elsif ($oq eq 'wig') {
|
|
$w = 2;
|
|
} elsif ($oq eq 'ww') {
|
|
$w = 3;
|
|
} elsif ($oq eq 'p0') {
|
|
$p = 0;
|
|
} elsif ($oq eq '66' || $oq eq 'p1') {
|
|
$p = 1;
|
|
} elsif ($oq eq 'f3' || $oq eq 'p2') {
|
|
$p = 2;
|
|
} elsif ($oq eq 'f2' || $oq eq 'p3') {
|
|
$p = 3;
|
|
} elsif ($oq eq '0f') {
|
|
$m = 1;
|
|
} elsif ($oq eq '0f38') {
|
|
$m = 2;
|
|
} elsif ($oq eq '0f3a') {
|
|
$m = 3;
|
|
} elsif ($oq =~ /^m([0-9]+)$/) {
|
|
$m = $1+0;
|
|
} elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
|
|
if (!defined($oppos{'v'})) {
|
|
die "$fname:$line: $vexname.$oq without 'v' operand\n";
|
|
}
|
|
$has_nds = 1;
|
|
} else {
|
|
die "$fname:$line: undefined \U$vexname\E subcode: $oq\n";
|
|
}
|
|
}
|
|
if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
|
|
die "$fname:$line: missing fields in \U$vexname\E specification\n";
|
|
}
|
|
if (defined($oppos{'v'}) && !$has_nds) {
|
|
die "$fname:$line: 'v' operand without ${vexname}.nds or ${vexname}.ndd\n";
|
|
}
|
|
my $minmap = ($c == 1) ? 8 : 0; # 0-31 for VEX, 8-31 for XOP
|
|
if ($m < $minmap || $m > 31) {
|
|
die "$fname:$line: Only maps ${minmap}-31 are valid for \U${vexname}\n";
|
|
}
|
|
push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
|
|
($c << 6)+$m, ($w << 4)+($l << 2)+$p);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^(evex)(|\..*)$/) {
|
|
my $c = $vexmap{$1};
|
|
my ($m,$w,$l,$p) = (undef,2,undef,0);
|
|
my $has_nds = 0;
|
|
my @subops = split(/\./, $op);
|
|
shift @subops; # Drop prefix
|
|
foreach $oq (@subops) {
|
|
if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz' || $oq eq 'lig') {
|
|
$l = 0;
|
|
} elsif ($oq eq '256' || $oq eq 'l1') {
|
|
$l = 1;
|
|
} elsif ($oq eq '512' || $oq eq 'l2') {
|
|
$l = 2;
|
|
} elsif ($oq eq 'w0') {
|
|
$w = 0;
|
|
} elsif ($oq eq 'w1') {
|
|
$w = 1;
|
|
} elsif ($oq eq 'wig') {
|
|
$w = 2;
|
|
} elsif ($oq eq 'ww') {
|
|
$w = 3;
|
|
} elsif ($oq eq 'p0') {
|
|
$p = 0;
|
|
} elsif ($oq eq '66' || $oq eq 'p1') {
|
|
$p = 1;
|
|
} elsif ($oq eq 'f3' || $oq eq 'p2') {
|
|
$p = 2;
|
|
} elsif ($oq eq 'f2' || $oq eq 'p3') {
|
|
$p = 3;
|
|
} elsif ($oq eq '0f') {
|
|
$m = 1;
|
|
} elsif ($oq eq '0f38') {
|
|
$m = 2;
|
|
} elsif ($oq eq '0f3a') {
|
|
$m = 3;
|
|
} elsif ($oq =~ /^m([0-9]+)$/) {
|
|
$m = $1+0;
|
|
} elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
|
|
if (!defined($oppos{'v'})) {
|
|
die "$fname:$line: evex.$oq without 'v' operand\n";
|
|
}
|
|
$has_nds = 1;
|
|
} else {
|
|
die "$fname:$line: undefined EVEX subcode: $oq\n";
|
|
}
|
|
}
|
|
if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
|
|
die "$fname:$line: missing fields in EVEX specification\n";
|
|
}
|
|
if (defined($oppos{'v'}) && !$has_nds) {
|
|
die "$fname:$line: 'v' operand without evex.nds or evex.ndd\n";
|
|
}
|
|
if ($m > 15) {
|
|
die "$fname:$line: Only maps 0-15 are valid for EVEX\n";
|
|
}
|
|
push(@codes, defined($oppos{'v'}) ? 0240+($oppos{'v'} & 3) : 0250,
|
|
($c << 6)+$m, ($w << 4)+($l << 2)+$p, $tup);
|
|
$prefix_ok = 0;
|
|
} elsif (defined $imm_codes{$op}) {
|
|
if ($op eq 'seg') {
|
|
if ($last_imm lt 'i') {
|
|
die "$fname:$line: seg without an immediate operand\n";
|
|
}
|
|
} else {
|
|
$last_imm++;
|
|
if ($last_imm gt 'j') {
|
|
die "$fname:$line: too many immediate operands\n";
|
|
}
|
|
}
|
|
if (!defined($oppos{$last_imm})) {
|
|
die "$fname:$line: $op without '$last_imm' operand\n";
|
|
}
|
|
push(@codes, 05) if ($oppos{$last_imm} & 4);
|
|
push(@codes, $imm_codes{$op} + ($oppos{$last_imm} & 3));
|
|
$prefix_ok = 0;
|
|
} elsif ($op eq '/is4') {
|
|
if (!defined($oppos{'s'})) {
|
|
die "$fname:$line: $op without 's' operand\n";
|
|
}
|
|
if (defined($oppos{'i'})) {
|
|
push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
|
|
} else {
|
|
push(@codes, 05) if ($oppos{'s'} & 4);
|
|
push(@codes, 0174+($oppos{'s'} & 3));
|
|
}
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^\/is4\=([0-9]+)$/) {
|
|
my $imm = $1;
|
|
if (!defined($oppos{'s'})) {
|
|
die "$fname:$line: $op without 's' operand\n";
|
|
}
|
|
if ($imm < 0 || $imm > 15) {
|
|
die "$fname:$line: invalid imm4 value for $op: $imm\n";
|
|
}
|
|
push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
|
|
push(@codes, 0330, hex $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^([0-9a-f]{2})\+r$/) {
|
|
if (!defined($oppos{'r'})) {
|
|
die "$fname:$line: $op without 'r' operand\n";
|
|
}
|
|
push(@codes, 05) if ($oppos{'r'} & 4);
|
|
push(@codes, 010 + ($oppos{'r'} & 3), hex $1);
|
|
$prefix_ok = 0;
|
|
} elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
|
|
# Escape to enter literal bytecodes
|
|
push(@codes, oct $1);
|
|
} else {
|
|
die "$fname:$line: unknown operation: $op\n";
|
|
}
|
|
}
|
|
|
|
return @codes;
|
|
}
|