Add special operators to allow the use of floating-point constants in
contexts other than DW/DD/DQ/DT/DO.
As part of this checkin, make MAX_KEYWORD generated by tokhash.pl,
since it knows what all the keywords are so it can tell which one is
the longest.
Implement oword, reso, do, as well as the SO flag to instructions. No
instructions are actually flagged with SO yet, but this allows us to
specify 128-bit sizes in instruction patterns.
This checkin completes what is required to actually generate SSE5
instructions. No support in the disassembler yet.
This checkin covers:
- Support for actually generating DREX prefixes.
- Support for matching operand "operand X must match Y"
Add the SSSE3, SSE4.1 and SSE4.2 instruction sets. Change \332 to be
a literal 0xF2 prefix, by analog with \333 for 0xF3 prefix (the
previous \332 flag changed to \335). This is necessary to get the REX
prefix in the right place for instructions that use it.
We are going to have to go in and change existing instruction patterns
which use these, as well.
Support r/m operands for non-integer operands types, i.e. mmx or xmm
operands. This allows mmx and xmm operands to be written more
compactly, speeding up the assembler.
We have a lot of enumerations; by declaring fields as such, we make it
easier when debugging, since the debugger can display the enumerations
in cleartext. However, make sure exceptional values (like -1) are
included in the enumeration, since the compiler otherwise may not
include it in the valid range of the enumeration.
Implement "REL" and "ABS" modifiers for offsets in 64-bit mode. This
replaces "rip+XXX" type addressing. The infrastructure to set the default
mode is there, but there is nothing to throw the switch just yet.
Get rid of magic open-coded register numbers. We now keep track of
a total of three different kinds of register numbers: the register
enumeration (regs.h), the x86 register value, and the register flags.
That has all the information we need.
Additionally, do massive revamping of the EA generation code and the
REX generation logic.
64-bit support for ndisasm. This is very much an initial attempt, and
there are guaranteed to be bugs in the code. However, some *very*
preliminary testing seems to indicate it's not completely off-base.
64-bit support required some major changes to regs.dat; clean some of
it up (re-introduce patterns, where appropriate) and allow a single
register to belong to multiple disassembly classes; also keep track
of the x86 register number again.
Apparently configure was generating config.h, and nothing ever actually
included it. Include it in nasm.h as well as compiler.h, and in
rdoff/rdlar.h which uses these macros.
There appears to be no use of HAVE_* macros in any file that doesn't
have nasm.h included; in fact, so far the only use has been in
rdoff/rdlar.h.
a) Automatically generate dependencies for all Makefiles;
b) Move register definitions to a separate .dat file;
c) Add support for "unimplemented but there in theory" registers.
