The CMPSW/CMPSD/CMPSQ instructions were broken by checkin
a30cc07224 due to an incorrect removal
of \1 (should only have been removed after \144-147 and \154-157). I
have verified that no other instructions were affected.
Avoid redundant error messages:
./nasm
nasm: error: no input file specified
nasm: fatal: file `' is both input and output file
type `nasm -h' for help
... which is more than a wee bit confusing to the user.
Clean up remaining build warnings. None of this should affect code
operations. The only warnings which were actually relevant might have
been the ones in ldrdf.c, but it's not clear if anyone ever uses that.
- Correct the building on the disassembler decision tree.
- Handle SSE instructions with F2 prefix (\332) correctly.
- Mark instructions which are now used as prefixes with ND.
(In a future version when we have better CPU version handling,
we should probably build the decision tree at runtime based on
the selected CPU feature sets.)
- Sanitize the handling of \144-147 and \154-157 in both the assembler
and disassembler. They take an opcode byte as argument; don't
pretend they don't.
Support the zero-operand form of floating-point instructions. Note
that in most cases, the form generated is actually the "popping" form,
e.g. "FADD" becomes "FADDP st0,st1". This is in accordance with the
Intel documentation. "FADDP" is also supported.
Fix one missed change from "type" to "size". May want to look through
all the other backends as well for similar issues.
This would generate the wrong section lengths, with obviously bad results.
Add gcc-style -Wxxx -Wno-xxx warning selection as an alternative to
-w+xxx/-w-xxx.
Add "all" as an alias for all (actual) warnings.
Add "error" to treat warnings as errors.
Our size arguments are 64-bit values, but we don't need that range for
anywhere where we need a switch. OpenWatcom can't deal with them
(sigh), so cast them to (int) for now.
Address data is always int64_t even if the size itself is smaller;
this was broken on bigendian hosts (still need testing!)
Create simple "write sized object" macros.
Un-special-case "xchg rax,rax"; allow it to be encoded as 48 90 for
orthogonality's sake. It's a no-op, to be sure, but so are many other
instructions.
"xchg eax,eax" is still special-cased in 64-bit mode since it is not a
no-op; unadorned opcode 90 is now simply "nop" and nothing else.
Make the disassembler detect unused REX.W and display them as an "o64"
prefix.
Fix alignment handling in the Mach-O format. The patch is from the
bug report, mangled to apply to the current source base. I have no
way to test this, so I'm going to have to assume it's correct.
More correct -- but not fully correct -- handing of 64-bit addressing
in ndisasm. In particular, we need to generate "a32" versus "dword"
where applicable.
