nasm64developer reported that we have no LWP support yet.
Add this feature.
Reported-by: nasm64developer <nasm64developer@users.sf.net>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
nasm64developer reported a few nits in XOP
instruction templates. Plain typo in specification
(http://support.amd.com/us/Processor_TechDocs/43479.pdf)
and opcode errors.
Reported-by: nasm64developer <nasm64developer@users.sf.net>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
nasm64developer reported that VFNMADDSD and VFNMADDSS
have "m" and "s" operands swapped in instruction templates
file.
Reported-by: nasm64developer <nasm64developer@users.sf.net>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Commit 2ddcd03900
did bind symbols (in case of omitted SECTION directive)
to .text section but break COMMON binding.
Fix it.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
We should explicitly check if we can hold the sync
point, otherwise we may wrap the array index and
reach incorrect value (if we're lucky).
So instead we make the index "almost" unlmited.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
During conversion of size of memory operands into
explicit form the compatibility with 2.07 has been
broken (for a small set of instructions). Lets restore
it. Details below.
This is due to specifics of our "fuzzy logic" algorithm.
For example consider the user wrote an instruction like
VCVTTPD2DQ xmm0,[eax]
the last operand is memory reference. But template contains
the following two items (written in simplified form)
VCVTTPD2DQ xmmreg,mem128
VCVTTPD2DQ xmmreg,mem256
So this is impossible to find out what _exactly_ user meant:
either reference to 128 bit value in memory or 256 bit.
As a solution we've been using IF_Sx modifier written in
template which allows to choose "by-default" template
and break the tie.
Reported-by: Victor van den Elzen <victor.vde@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
In case if SECTION directive is omitted but the real
code exist we form .text section by default and put compiled
code here. In turn labels are not handled in a same manner.
So lets bind them to text section by default as well.
[ BR: 2835192 ]
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Frank reported:
|
| From the "expert questions" forum comes this:
|
| ---------------------
| By: jasper_neumann
|
| How can I delegate %undef?
|
| In the example below the assembler (called with "nasm.exe -t -f rdf q.asm")
| bemoans my code, displays
|
| "q.asm:19: error: interminable macro recursion"
|
| and hangs.
|
| q.asm
| -----
| bits 32
| CPU P4
|
| %macro my_def 2
| %xdefine %1 esp+%2
| %endmacro
|
| %macro my_undef 1
| %undef %1
| %endmacro
|
| global check_it
| check_it:
| my_def x,4
| mov eax,[x]
| my_undef x
|
| my_def x,8
| add eax,[x]
| my_undef x
| ret
|
So in case of interminable macro recursion we should break
the expansion procedure that way to not return back and start
expand macro again.
This address a part of the original problem.
Nasm64developer pointed out:
|
| Btw, after you manage to fix this recursion problem, the code
| in question still faces the same fundamental issue -- the arg
| to the my_undef invocations (i.e. x) gets expanded first; thus
| the %undef inside the macro sees esp+4 and esp+8 instead
| of x, and fails. What you'd need is a means to prevent the ex-
| pansion -- look for e.g. %# in 4.1.4 of the manual.txt which is
| attached to SF #1842438; it implements exactly that -- I once
| filed SF #829879 for this feature.
|
In turn Keith Kanios said:
|
| Anon is also correct in that we would need a special directive to instruct
| the delay of macro expansion, although I don't see this as critical or even
| high priority at the moment. The intermediate solution for this is, don't
| use indirection if it is not needed... an inline %undef should be
| sufficient.
|
Reported-by: Frank Kotler <fbkotler@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Reviewed-by: Keith Kanios <keith@kanios.net>
Due to previous commit an indent by tab (occasionally) brought in.
Fix it as well. No change on binary level.
We're not that far from NASM release so it's a bit unpleasant
manner to push in such trivial change. But since it's the previous
commit dependent -- I dare to push it.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Even the non-DREX SSE5 instructions appear to have been either
obsoleted or replaced with XOP varieties. The only exception are the
ROUNDxx instructions, which are really SSE4.1 instructions and which
were simply duplicates.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Merge elfcommon.h, elf32.h, elf64.h into
single elf.h -- we do support both elf32
and elf64 anyway. Let put them into common
place.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
It's useful to protect our self from some
errors at build time.
For this sake we should use nasm_build_assert
if needed.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
We may throw out j variable (since we break anyway)
and don't assign asize for free (since we don't
use it after).
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
