It doesn't seem worth >200 lines of C and Perl to save ~50 lines in insns.dat.
In order to make this work I had to rename sbyte16/sbyte32 so that
they can take an ordinary size suffix (their size suffix was formerly
treated specially).
This fixes one disassembly bug: 48C7C000000080 disassembles to mov
rax,0x80000000, which reassembles to B800000080, which loads a
different value.
Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Fix warnings like this:
output/outelf32.c:2120:33: warning: equality comparison with extraneous
parentheses [-Wparentheses-equality]
if ((match->section == index)) {
~~~~~~~~~~~~~~~^~~~~~~~
output/outelf32.c:2120:33: note: remove extraneous parentheses around the
comparison to silence this warning
if ((match->section == index)) {
~ ^ ~
output/outelf32.c:2120:33: note: use '=' to turn this equality comparison into
an assignment
if ((match->section == index)) {
^~
=
1 warning generated.
Signed-off-by: Andrew Nayenko <resver@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
AMD CPUs do support SVM instructions in 32-bit mode thus drop X64
restriction from instructions template where appropriate.
Signed-off-by: Andrew Nayenko <resver@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
In long mode relative offsets are always 32 bits sign-extended to 64
bits and absolute near addresses are always 64 bits, regardless of the
operand size.
Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
This adds "np" to a bunch of SSE-style instructions that should have
it, "norep" (which was implemented but unused) on quasi-SSE instructions
that use F2 and F3 as instruction extensions but 66 for operand size,
"nof3" (newly implemented) on a few instructions, "norexw" on some
instructions that have only 32-bit and 64-bit versions, and one NOLONG.
It also removes some incorrect "np"s, changes some "f3"s to "f3i"s,
and fixes the decoding of the XCHG/NOP/PAUSE mess: F390 is always
PAUSE even when rex.b=1 (at least according to XED).
Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
In commit f1fe4fdeab I occasionally
made a \Space after \BackSlash being a sign of line continuation.
Fix it.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
One day the elf output routines would be abstracted
enough to be merged in one file. This patch simply
removes some differences from elf32/64 code.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
This patch changes get_closest_section_symbol_by_offset
logic to lookup only the closest symbols which are at
or before the supplied offset.
Signed-off-by: Keith Kanios <keith@kanios.net>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Allow the form:
mov <rm>,byte 1
... to generate the explicit byte form. An unfortunate side effect is
that disassembly is ugly; this could be fixed by making a special byte
code that acts the same for the assembler but disassembles specially.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Remove the SB flag from the rm,imm forms of the shift/rotate
instructions; presumably the intent was to mark the immediate as a
byte immediate, but it instead caused the memory operand to be
accepted without a size, but generate the incorrect code as a result.
Note: it would be good to modify the UNITY filter so that the explicit
form:
shl eax,byte 1
... forces the imm form rather than the ,1 form.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
In this path the opflags bits are completely reworked
in a sake of simplier extension. Inparticular for Knights
Corener instructions we will need new registers and new
sizes.
What's done
- all bits are grouped in sequences, and start using OP_
macros, thus if one need to extend some field -- just
tune up @shift and @bits where needed
- the #define we use in code are OR'ed in symbols, this
should be a way more convenient to deal with instead of
pure hex numbers.
The tests are passed but more eyes needed to review this
rather big and intrusive patch. The reason why it's done
in one single path -- for revertability in one command.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
This patch introduces two macros
- OP_GENMASK, to generate masks in opflags
- OP_GENBIT, to generate bit at specified position
we will use them with extended 64 bits opflags.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Quote filenames for Make when generated for filenames internally.
Only skip quoting when using the -MT option (rather than -MQ).
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Soon we will need to encode 512 bits values
thus there is no space left in our opflags_t
which is 32 bitfield.
Extend it to 64 bits width.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
