It can be hard to find errors inside potentially nested macros.
Show the mmacro expansion stack when printing diagnostics.
Note that a list file doesn't help for errors that are detected
before the code-generation pass.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Issue a specific suppressible warning if we encounter the PTR keyword.
This usually indicates someone mistakenly using MASM syntax in NASM.
This introduces a generic infrastructure for issuing warnings for such
keywords.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Get rid of the completely pointless "debuginfo" parameter to
ofmt->cleanup(). Most backends completely ignore it, and the two that
care (obj, ieee) can simply test dfmt instead.
Also, dfmt is never NULL, so any test for a NULL dfmt is bogus.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
When a local label was seen, the debug backend would not receive the
full label name! In order to both simplify the code and avoid this
kind of discrepancy again, make both the output and debug format calls
from a common static function.
However, none of the current debug format backends want to see NASM
special symbols (that start with .. but not ..@) so filter those from
the debug backend.
Finally, fix an incorrect comment in nasm.h: the debug format is
called *after* the output format.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Jim Kukunas <james.t.kukunas@linux.intel.com>
For consistency with ofmt/dfmt, change the listing structure
to "struct lfmt" and "lfmt" and move it to listing.h.
From master branch commit 8ac25aa020
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Move ofmt->current_dfmt into a separate global variable. This
should allow us to make ofmt readonly and removes some additional
gratuitious differences between backends.
From master branch checkin a7bc15dd0a
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
We pass around a whole bunch of function pointers in arguments,
which then just get stashed in static variables. Clean this mess
up and in particular handle the error management in the preprocessor
using nasm_set_verror() which already exists.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
From master branch checkin 130736c0cf
Resolved Conflicts:
nasm.c
preproc-nop.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
In order to make it more likely to compile cleanly with "C90 plus long
long" style compilers, remove existing constructs (mostly commas at
the end of enums) that aren't compliant.
Ironically enough this was most likely an unintentional omission in
C90...
From master branch checkin 7214d18b40
Resolved Conflicts:
output/outelf32.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Remove the --allow-64-bits relocation, and instead make it a
suppressible warning in the case of a zero-extended relocation, and an
error in the case of a sign-extended relocation.
Relocations which can be losslessly represented in the output format
do not issue any diagnostic at all, as there is no problem in that
case.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The fix for BR 3392278:
aa29b1d93f assemble.c: Don't drop rex prefix from instruction itself
... would cause multiple REX prefixes to be emitted for some
instructions. Create a new flag to indicate that REX has already been
emitted, which can be cleared for each instance of an instruction.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
In mib operands, users' intention should be preserved.
e.g.) [eax + eax*1] and [eax*2] must be distinguished and encoded differently.
So a new EA flag EAF_MIB for mib operands is added.
And a new EA hint EAH_SUMMED for the case of [eax+eax*4] being parsed
as [eax*5] is also added.
NOSPLIT specifier does not have an effect in mib, so [nosplit eax + eax*1]
will be encoded as [eax, eax] rather than [eax*2] as in a regular EA.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
bnd and nobnd prifixes can be used for each instruction line to
direct whether bnd registers should be preserved or not.
And those are also added as options for DEFAULT directive.
Once bnd is set with default, DEFAULT BND, all bnd-prefix
available instructions are prefixed with bnd. To override it,
nobnd prefix can be used.
In the other way, DEFAULT NOBND can disable DEFAULT BND and
have nasm encode in the normal way.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Allow specifying {vex3} or {vex2} (the latter is currently always
redundant, unless we end up with instructions at some point can be
specified with legacy prefixes or VEX) to select a specific encoding
of VEX-encoded instructions.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
As recommended by the community, a comma-separated decorators ({k1,z})
and nested braces ({{k1},{z}}) are dropped out. So only standard syntax
is supported from now.
This rework made source code neat and easy to maintain. Most of the codes
for handling corner cases are removed.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Disassembler can translate EVEX prefix, count up to 32 vector registers
and recognize new ZMM / opmask registers.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
The broadcasting decorator {1to##} must describe exactly how many times
the memory element is repeated in order to clearly match the correct
instruction format.
For example,
vaddpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} ; good
vaddpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to16} ; fail qword * 16 = 1024b
vaddps zmm30,zmm29,DWORD [rcx]{1to16} ; good
vaddps zmm30,zmm29,DWORD [rcx]{1to8} ; fail dword * 8 = 256b
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
BND prefix is used for adding bounds checking protection
across flow control changes such as call, ret, jmp and jcc calls.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
If SAE is set, VL(vector length) is implied to be 512.
EVEX.L'L (=EVEX.RC) is set to 00b by default.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Fixed or purged some old comments and added a comment for a previous patch.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
It was not so straight forward to find the postion of operand that has
a broadcasting, embedded rounding mode or SAE (Suppress All Exceptions)
decorator out from operands types or bytecode.
Remebering the postion of the operand of interest in the parser reduces
the burden that assembler looks through the operands.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Increased the size of data type for instruction flags from 32bits to 64bits.
And a new type (iflags_t) is defined for better maintainability.
Bigger data type is needed because more instruction set types are coming
but there were not enough space for them. Since they are not bit masks,
only one instruction set is allowed for each instruction.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
When an instruction allows broadcasting, the memory element size is
different from the size of normal memory operation.
This information is provided in a decoflags field, so it should try to
match those properties before it fails.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
AVX-512 introduced new syntax using braces for decorators.
Opmask, broadcat, rounding control use this new syntax.
http://software.intel.com/sites/default/files/319433-015.pdf
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Thus if someone need to rework this code he won't need
to jump between files trying to figure out where enum
and opcodes lay.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Add general support in the function parser for "integer functions"
(actually implemented as special unary operators, then wrapped in
macros) and implement a family of integer logarithms. The only
difference is the behavior on a non-power-of-two argument:
ilog2[e] -- throw an error
ilog2w -- throw a warning
ilog2f -- round down to power of 2
ilog2c -- round up to power of 2
This is useful for back-converting from masks to bit values.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This implements the mechanism for XACQUIRE/XRELEASE. It does not
include the necessary annotations in insns.dat.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
insn->prefixes might contain not only values from
'enum prefixes' but from 'enum reg_enum' as well so
make it generic 'int' instead.
This calms down the compiler about enum's mess and
eliminates a wrong assumption that we always have
values by particular type in this field.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
- a number of tabs to space conversion
- redundant spaces removed
- structure elements alignment
No functional changes.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
The DREX encoding never hit production silicon, and has been replaced
by VEX/XOP encoding, so remove support for it.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
There is no need to hide this structure into a type.
The former preproc_ops is a way more descriptive.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
__OUTPUT_FORMAT__ must consist of shortname of output format
or its alias, otherwise userspace ABI gets broken.
For example source code still can refer to __OUTPUT_FORMAT__=elf,
instead of __OUTPUT_FORMAT__=elf32.
BR3246990
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Move the #include of regs.h to the top with the other includes, and
make is_register() -- being a boolean predicate -- return bool.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>