Commit Graph

1084 Commits

Author SHA1 Message Date
Andy Polyakov
95cd596352 doc: document Win32/64 SEH extensions
Document COFF extensions for Windows SEH
2008-05-27 14:03:09 -07:00
Andy Polyakov
082dbb471f outcoff.c: remove dead code, add check for imagerel
Remove commented-out (dead) code, add check that the imagerel
references are valid.
2008-05-27 14:01:25 -07:00
H. Peter Anvin
f9ca812cf8 avx.bin: clean up screwy whitespace 2008-05-26 22:52:57 -07:00
H. Peter Anvin
62449a6ce0 VCVTPD2PS, VCVTPD2DQ, VCVTTPD2DQ mem need explicit op size (BR 1974170)
BR 1974170: VCVTPD2PS, VCVTPD2DQ, VCVTTPD2DQ with a memory operand are
ambiguous without a specific operand size, so force one to be added.

Split the instruction pattern due to our current clunky handling of
MMX/XMM/YMM registers together with sizes.  Fix in the future, please!
2008-05-26 22:48:51 -07:00
H. Peter Anvin
4a49b6770f Fix parameters to VCVTPD2DQ (BR 1974159) 2008-05-26 22:42:02 -07:00
H. Peter Anvin
bb4aad4a1f regs.pl: add comments to regflags.c and regvals.c
Add comments to regflags.c and regvals.c, to make it easier to spot
errors.
2008-05-26 19:32:52 -07:00
H. Peter Anvin
4c2529dd77 Fix register numbers for ymm1-15!
ymm1-15 were incorrectly listed as starting at register number 0, with
obviously disastrous consequences...
2008-05-26 19:23:01 -07:00
H. Peter Anvin
9435283319 ndisasm: the high bit of is4 bytes is ignored in 32-bit mode
Mask the high bit of is4 bytes in 32-bit mode.  Provide a generic
"regmask" variable that we can use for equivalent purposes as needed.
2008-05-26 12:03:55 -07:00
H. Peter Anvin
ba5224d096 macros.pl: more readable comments 2008-05-26 11:39:00 -07:00
H. Peter Anvin
d2ff0ea5d5 Add some comments to the output of macros.pl
Add some comments to the output of macros.pl, which might make it a
little bit easier to debug issues if there should be any.
2008-05-26 11:21:25 -07:00
H. Peter Anvin
5b76fa26c9 preproc.c: prevent the compiler from reducing enum pp_token_type
The compiler is free to store enum pp_token_type into any size integer
small enough to contain all the values up to 2^n-1 for the smallest n
which contains all the values.  Force it to size it to integer size,
since we use it to hold macro positional parameters.
2008-05-26 11:14:38 -07:00
H. Peter Anvin
c4147f1fcc NASM 2.03rc1 2008-05-25 22:29:00 -07:00
H. Peter Anvin
ffd41fe111 CHANGES entry for %? and %?? 2008-05-25 22:11:36 -07:00
H. Peter Anvin
ca4f36cc2c Document %? and %?? 2008-05-25 22:09:17 -07:00
H. Peter Anvin
ce2233bb9f Implement %? and %?? for mmacros
Same as before, but for mmacros this time
2008-05-25 21:57:00 -07:00
H. Peter Anvin
6c81f0a390 Implement %? and %?? for smacros
%?	- substitute the macro name as invoked
%??	- substitute the macro name as defined

In particular:

%idefine keyword $%?

... can be used to make a new keyword "disappear".
2008-05-25 21:46:17 -07:00
H. Peter Anvin
1df0b9ee2d phash: canonicalize order, fix handling of ignored duplicates
Canonicalize the order of the prehash entries, so we don't have to
worry about looking up both pairs of edges.

When we find a collision that we decide to ignore, there is no point
in adding the same edge into the array again; instead, just skip the
current edge.
2008-05-25 18:44:44 -07:00
H. Peter Anvin
14f9ea2925 phash: allow collisions if the hash target is the same
If the hash target is the same value, we can permit collisions.  This
isn't relevant for the current applications of the hash generator, but
is useful for cases where one have a number of sources for the same
target.  It's easy to check, either way.
2008-05-25 18:17:49 -07:00
H. Peter Anvin
c593173e11 phash: massively speed up the perfect hash generator
Make the perfect hash generator about 200x faster by using a very
simple custom graph adjacency representation instead of using
Graph::Undirected.
2008-05-25 18:10:57 -07:00
H. Peter Anvin
216fea010d Fix mnemnonics for SSE5 PCOMU instructions 2008-05-25 09:25:47 -07:00
H. Peter Anvin
8cb2ae916b Fix mnemonics for VTESTP[SD] (BR 1971570)
Incorrectly entered as VPTEST* due to illogical placement in the manual.
2008-05-24 22:15:56 -07:00
H. Peter Anvin
7aacbeb537 Fix the VPSHUF*W instructions (BR 1971567)
The VPSHUF*W instructions had both wrong mnemonics and opcodes.
2008-05-24 22:13:33 -07:00
H. Peter Anvin
05430f64b5 Fix typo in VPCMPESTRM instruction (BR 1971565)
The VPCMPESTRM instruction was typoed.
2008-05-24 22:11:44 -07:00
H. Peter Anvin
ee71120a63 Add VCVTSI2SS (BR 1971564)
The VCVTSI2SS instruction was missing.
2008-05-24 22:09:51 -07:00
H. Peter Anvin
f2c10aee70 Fix immediate for PCLMULHQ* instructions (BR 1971555)
The immediate for the PCLMULHQ* instructions was wrong.
2008-05-24 22:07:03 -07:00
H. Peter Anvin
89031ff5d2 Remove imm from specific versions of VCMPxx
For the versions of VCMPxx which already embed their condition code,
we do not want an extra immediate argument.

Todo: fix bytecode compiler to complain more about these.
2008-05-24 22:04:23 -07:00
H. Peter Anvin
d0da1c7202 Add VLDQQU as an alias for 256-bit VLDDQU (BR 1971539)
Accept VLDQQU as an alias for VLDDQU when used with 256-bit values.
2008-05-24 21:58:59 -07:00
H. Peter Anvin
6c8042c0eb VFMSUBADDP[SD], not VFMADDSUBS[SD] (BR 1971573)
There are VFMSUBADDP instructions, but there are no VFMADDSUBS
instructions.
2008-05-24 21:54:09 -07:00
H. Peter Anvin
e3ad2ecdfe Add note about SEH support
Still need documentation from someone who actually knows anything
about how this works.
2008-05-23 21:51:21 -07:00
Andy Polyakov
94cd4dd113 Win64: IMAGEREL references (SEH support for Win64)
Guess what, SEH again, but in Win64 context, which is completely
different matter from Win32. At lowest level this one boils down to
putting so called imagerel references, or in practical terms
relocations of type ADDR32NB, 0x0003, into .pdata and .xdata
segments. Two possibilities. 1. implement say 'wrt ..imagerel' or 'wrt
..imagebase'. 2. silently enforce ADDR32NB relocations in .pdata and
.xdata segments.
2008-05-23 19:45:39 -07:00
H. Peter Anvin
45b7431a0c Make SAFESEH syntax error ERR_NONFATAL
Incorrect use of SAFESEH is more suited for ERR_NONFATAL than ERR_FATAL
2008-05-23 18:38:51 -07:00
Andy Polyakov
4401cc79a2 Support for Win32 safeseh (BR 195417)
This is basically not a bug report, but a feature request.

It's desired to be able to link .obj modules compiled with 'nasm -f
win32' with Microsoft 'link /safeseh'. As well as to register symbols
(commonly subroutine's entry points or even external symbols) as "safe
handlers." In order to achieve this, several points are required.

First of all, object module has to have absolute symbol named @feat.00
with value of 1. This can actually be achived by adding 'absolute 1'
and '@feat.00:' to source code, but it's desirable that it's
autogenerated for win32 modules.

Handler registration is essentially symbol's *index* in current
module's symbol table in .sxdata, segment with 0x200 segment flags, an
"info" segment. It's also essential that symbol has type 0x20 (see
below). All this is depicted in following framgents of 'objdump -xD'
output:

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .sxdata       00000004  00000000  00000000  0000003c  2**2
                  CONTENTS, READONLY, DEBUGGING

SYMBOL TABLE:
...
[  5](sec -1)(fl 0x00)(ty   0)(scl   3) (nx 0) 0x00000001 @feat.00
[  6](sec  0)(fl 0x00)(ty  20)(scl   2) (nx 0) 0x00000000 _handler
...
<.sxdata>
0: 06 00 00 00

Note [6] and (ty 20) in _handle line in SYMBOL TABLE. "06 00 00 00" in
.sxdata is little-endian 6, _handler's index. This is what makes up
"registration." It's impossible to achieve this with current nasm
facilities and it's probably appropriate to introduce a directive for
it, 'safeseh _handler' is probably most natural choice.
2008-05-23 18:37:52 -07:00
H. Peter Anvin
e6a5cb536a doc: another reference to DY 2008-05-23 18:24:03 -07:00
H. Peter Anvin
1b4b42599f CHANGES since 2.02, so far... 2008-05-23 18:03:26 -07:00
H. Peter Anvin
a69749581d Document DY, RESY and YWORD 2008-05-23 17:58:01 -07:00
H. Peter Anvin
dd84acedcc AVX FMA: Instruction table for the AVX FMA instructions
This adds the AVX FMA instructions to the instruction table, which
should complete the AVX work.
2008-05-23 17:46:08 -07:00
H. Peter Anvin
55ca614e62 AVX: Remaining AVX instructions (still need FMA)
Implement the remaining set of AVX instructions
2008-05-23 17:27:15 -07:00
H. Peter Anvin
69d648800e insns.pl: better error messages, handle no-operand instructions better
Better error messages, and allow "void" instructions to omit the
operand colon.
2008-05-23 17:25:54 -07:00
H. Peter Anvin
2ee4c67e7d AVX instruction table through "P"
AVX instruction table through the letter P in the manual
2008-05-23 17:03:30 -07:00
H. Peter Anvin
ea2832c7f3 fmtinsns.pl: handle compiler fields; do some case mangling
Handle compiler-generated fields, and at least try to do some case
mangling.
2008-05-23 16:59:59 -07:00
H. Peter Anvin
072771e4a5 Use hash tables even for context-sensitive macros
Normally, contexts aren't used with a large number of macros, but in
case someone does, do use hash tables for those as well.  This
simplifies the code somewhat, since *all* handling of macros is now
done via hash tables.

Future note: consider if it wouldn't be better to allow struct
hash_table to be allocated by the caller, instead of being allocated
by the hash table routine.
2008-05-22 13:17:51 -07:00
H. Peter Anvin
bd420c7095 Add tokens vex.ww and vex.wx; vex.wx is the default
Add vex.ww (for VEX.W follows REX.W) and vex.wx (for VEX.W is a don't
care); vex.wx is the default since that seems to match existing usage
better.
2008-05-22 11:24:35 -07:00
H. Peter Anvin
7c71949931 AVX: instruction table up to PE
Complete the instruction table up to and including PE (document
319433-002, start next on page 5-330).
2008-05-21 23:21:57 -07:00
H. Peter Anvin
283ba9103e AVX: instruction table through M
Implement the AVX instruction table through the letter M.
2008-05-21 18:10:09 -07:00
H. Peter Anvin
2637aca805 insns.pl: error if we have a 'v' operand and no vex.nds/ndd
Although redundant, the presence of a 'v' operand should match the
existence of a nds or ndd flag on vex; this should help catch typos.
2008-05-21 18:09:17 -07:00
H. Peter Anvin
a69ce1d19d insnsn.c: cleaner to *not* separate out conditional instructions
The disassembler code gets cleaner if we do *not* separate out the
conditional instructions; instead, rely on the fact that the
conditionals are always at the end and use FIRST_COND_OPCODE as a
barrier.
2008-05-21 15:09:31 -07:00
H. Peter Anvin
895f56b611 Add legacy blendvpd to avx.asm, as a disassembler test. 2008-05-21 15:03:26 -07:00
H. Peter Anvin
982a7bd3dd Implement aliases for specific SSE5 compare operations
Implement aliases for specific SSE5 compare operations, per BR 1930630.
2008-05-21 15:02:30 -07:00
H. Peter Anvin
eaf3d491ad insns.dat: reimplement SSE5 compares using the bytecode compiler
Use the bytecode compiler for the SSE5 compare instructions.  While we
are at it, give it correct flags.
2008-05-21 14:45:46 -07:00
H. Peter Anvin
f89b305c32 insns.pl: match AMD documentation for DREX syntax
Adjust the compiler to give a syntax for DREX instructions that
matches the AMD documentation.
2008-05-21 14:44:42 -07:00