Don't do an out-of-range check for the operands, even
temporarily. Setting the operand pointer to NULL will help catch
errors when accessing non-operands, too.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add MOVSX[D] -> CBW/CWDE/CDQE optimization patterns when the suitable
form of the AX register are referenced.
Add MOVZX reg64,rm32 pattern which converts to a 32-bit MOV.
Add MOVZXD reg64,rm32 alias pattern for consistency.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
.dat versus .dax is annoying for tab completion, change the extension
for the preprocessed insns.dat to .xda.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
For the instructions ending in -x because they don't modify the flags,
also accept {nf}. Add 2-operand relaxed versions like for most other
instructions, too.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Make sure to get the right type for the disassembly tables. This is
now a fixed-depth tree, so there is no reason to use union types or
anything along those lines.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the generation of tables for disassembly to be map-based. This
also makes the code a bit more regular.
This is the first step at catching up with APX support in the
disassembler.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
These are mostly structured. Leave this as an explicit processing
step, at least until the correctness of these flags have been fully
verified; perhaps after that as well.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Merge a bunch of common code in the handling of modr/m
generation. Make the handing of compressed disp8 simpler and more
transparent by exporting a the shift factor for the compressed
immediate in ea_data. For the case of no compression, the shift factor
is simply 0; there is no need to distinguish "compressed" from
"uncompressed".
The tidied up version of the disp8 code is simple enough that it makes
more sense to inline it.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The {nf} and {zu} prefixes (or suffixes) can be used on a number of
instructions without actually change the encodings (either they don't
touch the flags at all, or they write a 32- or 64-bit register
already.)
Make this a bit more flexible, by adding an FL instruction flag for
the instructions which actually touch the flags, and a ZU instruction
flag for the instructions which zero the upper half.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
For the instruction space that are explicitly excluded by REX2, add
NOAPX tags. This was done with an automated script.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Implement the JMPABS instruction, which can also be specified as JMP
ABS for consistency. Since ABS is already a keyword, this does not
pollute the namespace.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
EVEX encoding is really messy, with the 4th register bit in one of
several places depending on which type of register it is. It seems to
work now.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
a
Support generating code for APX instruction and add support for the
{nf} prefix.
No disassembler support yet, and only a handful instructions encoded.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
We use this all over the place, so make these general. The sign
extension function existed as signed_bits(), but that is an awfully
confusing name.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the byte code format and the byte code compiler to be able to
generate various kinds of APX-format instructions.
THE NEW BYTE CODES ARE NOT YET IMPLEMENTED IN THE ASSEMBLER OR
DISASSEMBLER.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
{dfv=} is basically a constant (immediate). Treat it as such during
parsing, except that if "naked" (not in an expression), it has special
matching properties and does not need a terminal comma.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
If TOKEN_BRCCONST are used in an expression (including simply wrapping
them in parentheses), then just treat them as integers. This makes
things like ({dfv=cf}|{dfv=of}) work.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the handling of {dfv=} to a more general "braced constant"
expression, to be tagged with an instruction flag to make sure they
match the instruction in question.
This really ought to be an operand flag, but the opflags are precious;
as the CCMP/CTEST instructions can also take an immediate it probably
is necessary to invent a "special immediate" operand type that can
fold these together.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The {dfv=} prefix sequences for the CCMP and CTEST instructions need
special handling in the parser. This means a fair bit of new magic in
the handler of the parser, but it just adds to the fun.
Try to make this as general as possible, so we can use it for other
things.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The handling of "path" and "fullpath" was inconsistent, resulting in a
lot of missing dependencies regardless if a separate build directory
was in use.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The parser state does not just necessarily include the position of the
buffer, but make it possible to maintain additional state.
Furthermore, add an explicit ability to push back a token.
All of this might make it easier at some point in the future to keep
track of horizontal position, although that will require lots of
changes to the preprocessor.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Clean up the handling of prefixes in general. Allow a set of braced
prefixes to follow the instruction; this is required for things like
{dfv=} but might also be a nicer syntax for things like {rex}.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Doing the register range flags by hand is a bit more work than
necessary when dealing with APX, so auto-generate the flags for ranges
{0, 1-15, 16+} using 3 bits.
In theory we could handle even more automagically by splitting ranges
up further: the existing ranges are sets of {0, 1, 2, 3, 4-5, 6-7,
8-15, 16-31} which would require 7 bits, although it would remove most
of the subclass bits for registers; it would require separating the
subclass bits for EAs from the ones for registers (which might be a
good idea anyway...)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
At least three files (asm/assemble.c, disasm/disasm.c, and
x86/insns.pl) depend on the bytecode defintions. It makes a lot more
sense for them to live in an explicit documentation file in the x86/
directory.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Provide common indentation configuration for the source files.
For more information, visit https://editorconfig.org/.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Update and improve the build from source documentation, including add
an auto-generated list of Perl build dependencies.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
There is no point in using "only" unless there is another
qualifier. The "only" is specifically to prevent older parsers from
unconditionally applying a section with qualifiers.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The help output has gotten way too long to be shown on a single
command line. It can of course be piped to a pager, but to be a little
nicer to the user, break it up into subtopics that can be individually
displayed. --help all (-h all) can still show all the help information
as a single data dump.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add Obsoletes tags: nasm-rdoff; old nasm-doc.
Add a few BuildRequires: tags.
Update License: tag to match SPDX.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
