Commit Graph

666 Commits

Author SHA1 Message Date
Charles Crayne
bfff95a6c0 modified: misc/release to fix bug in removing .git 2007-09-20 21:12:33 -07:00
H. Peter Anvin
40838f1f6e Merge branch 'master' of git+ssh://repo.or.cz/srv/git/nasm 2007-09-19 21:41:43 -07:00
H. Peter Anvin
d9a979559e Update manual pages
Update manual pages to include 64-bit support, and remove section
about sync point limits in ndisasm.
2007-09-19 21:41:27 -07:00
H. Peter Anvin
8d024e7965 Remove limit on number of sync points
Make it possible for ndisasm to allocate more memory for sync points
as needed.
2007-09-19 21:41:02 -07:00
H. Peter Anvin
87f252aaa5 Make nasm_malloc() et al available from inside ndisasm
Clean up nasmlib to remove functions irrelevant for ndisasm; make
nasm_malloc() etc usable inside ndisasm.
2007-09-19 21:40:37 -07:00
Frank Kotler
4ff711889f Version 0.99.03 2007-09-19 21:07:32 -04:00
Frank Kotler
240ffe8cc4 Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm 2007-09-19 21:06:59 -04:00
H. Peter Anvin
eb49a4e1d4 Merge commit 'origin/sse5' 2007-09-19 16:22:03 -07:00
H. Peter Anvin
b4b4317878 test/Makefile: make a bit more useful 2007-09-19 16:15:22 -07:00
H. Peter Anvin
bf9a24f464 Slightly optimize the interface to nasm_token_hash()
Instead of returning -1 from nasm_token_hash, set tv->t_type to
TOKEN_ID and return TOKEN_ID, since that's what stdscan.c wants to do
with it anyway.  This allows us to simply tailcall nasm_token_hash().
2007-09-18 22:54:40 -07:00
Frank Kotler
577f5ea592 Merge branch 'master' of git+ssh://fbkotler@repo.or.cz/srv/git/nasm 2007-09-19 01:34:55 -04:00
H. Peter Anvin
69db8c6963 Merge commit 'origin/master' into sse5 2007-09-18 22:23:42 -07:00
H. Peter Anvin
9b0d41ddd4 elf64: fix 32-bit truncations
Fix 32-bit truncations, as evidenced by the following test program:

    mov rax, 8080808080808080h
2007-09-18 22:22:49 -07:00
H. Peter Anvin
8084f105a2 Document Infinity and NaN
Add __Infinity__, __QNaN__, and __SNaN__ to the documentation.
2007-09-18 22:08:04 -07:00
H. Peter Anvin
f48bc6fb48 Support generating NaNs and infinities
Support generating NaNs and infinities as part of floating-point
constants.
2007-09-18 21:55:56 -07:00
H. Peter Anvin
5107d672a0 Update documentation
Document new floating-point capabilities, and clean up the discussion
about BITS 64 and REX prefixes.
2007-09-18 19:12:26 -07:00
H. Peter Anvin
72ac77bb0b Simple test for hexadecimal floating-point numbers
Very trivial test for hexadecimal floating-point numbers
2007-09-18 18:37:36 -07:00
H. Peter Anvin
26976a187f Fix error-reporting in hexadecimal floating-point numbers 2007-09-18 18:33:17 -07:00
H. Peter Anvin
fe2177fe42 Support C99-style hexadecimal floating point.
Add support for C99-style hexadecimal floating point.  The format is
0x <hexadecimal mantissa> p <binary exponent>.  0x1.0e+1 thus is the
same as 2.0.
2007-09-18 18:31:26 -07:00
H. Peter Anvin
e31747e95b Unify all standard IEEE floating-point formats; add 128-bit
Unify all the standard IEEE formats into one function, add support for
IEEE standard 128-bit floating point numbers.

The 80-bit format is still special since it explicitly represents the
integer portion.
2007-09-18 17:50:34 -07:00
H. Peter Anvin
cfbe7c3cc2 Fix handling of DO; support unary + for floating-point numbers
Floating-point users generally expect to be able to use a unary plus.
Fix support for the DO instruction in several places.
2007-09-18 17:49:09 -07:00
H. Peter Anvin
141d7cf68d Support 16-bit IEEE floating point; used in SSE5
SSE5 supports standard IEEE 16-bit floating point, so we should
support that too.
2007-09-18 16:39:03 -07:00
H. Peter Anvin
510a2508e6 Merge commit 'origin/master' into sse5 2007-09-18 15:43:40 -07:00
H. Peter Anvin
eef59fc328 Add NOP with argument to the instruction list
0F 1F /0 is documented as an EA-taking NOP since the P6.
0F 18..1F + EA are all "hinting nops" (instructions which, when
unimplemented, have no effect rather than #UD) but 0F 1F /0
specifically has no operation whatsoever.
2007-09-18 15:43:08 -07:00
H. Peter Anvin
76815bf60b Remove 0FC2 from list of instruction prefixes
0FC2 is not really an instruction prefix; it's the opcode for
CMPPS/CMPSS, which takes a control immediate which Intel chose to have
opcode aliases for.  However, we can't dispatch on a tail byte, so
it's useless.
2007-09-18 15:24:38 -07:00
H. Peter Anvin
19e2010536 Speed up the disassembler by allowing prefixed instruction tables
Modify the disassembler so that we can have separate instruction
tables for prefixed instructions.  As it was, all instructions which
started with 0F were linearly searched, and that is by now more than
half the instruction set.
2007-09-18 15:08:20 -07:00
H. Peter Anvin
0edc309505 Document oword, do and reso
Document oword and the associated do and reso pseudoinstructions.
2007-09-18 13:45:12 -07:00
H. Peter Anvin
41c9f6fde0 Implement "oword" (128 bits) as a first-class size
Implement oword, reso, do, as well as the SO flag to instructions.  No
instructions are actually flagged with SO yet, but this allows us to
specify 128-bit sizes in instruction patterns.
2007-09-18 13:01:32 -07:00
H. Peter Anvin
5255fd1f36 Change the token prehash function for better convergence
Combining arithmetric (add) and bitwise (xor) mixing seems to give
better result than either.

With the new prehash function, we find a valid hash much quicker.
2007-09-18 12:38:07 -07:00
H. Peter Anvin
3ce3715fba SSE5 instruction table
Implement the full SSE5 instruction table.
2007-09-18 12:23:21 -07:00
Frank Kotler
24196047b5 add "const" to output/outdbg.c
apparently we missed that when updating "const" in other files
2007-09-18 02:06:09 -04:00
H. Peter Anvin
7786c364b4 Disassembler support for SSE5 instructions
Support for the SSE5 instruction format in the disassembler.

Also adds some comments to insnsd.c for easier debugging.
2007-09-17 18:45:44 -07:00
H. Peter Anvin
0a80739c46 insns.dat: All SSE5 instructions are AMD
SSE5 is an AMD-defined instruction set, so tag those AMD.
2007-09-17 17:27:46 -07:00
H. Peter Anvin
cf5180a955 Actually generate SSE5 instructions
This checkin completes what is required to actually generate SSE5
instructions.  No support in the disassembler yet.

This checkin covers:

- Support for actually generating DREX prefixes.
- Support for matching operand "operand X must match Y"
2007-09-17 17:25:27 -07:00
H. Peter Anvin
401c07e20d Initial support for generating DREX suffixes
Initial support for generating DREX suffixes.  Not used yet.  No
disassembler support yet, and no support for "operand X must match
operand Y."
2007-09-17 16:55:04 -07:00
H. Peter Anvin
8f94f988f0 Fix a few instances of missing renumbers
parser.c: change hard-coded argument count 3 to MAX_ARGUMENTS
assemble.c: change a few missed code renumbers
2007-09-17 16:31:33 -07:00
H. Peter Anvin
19315e012f Enable IF_AR3
Enable IF_AR3, which was incorrectly disabled in a previous checkin.
2007-09-17 16:20:45 -07:00
H. Peter Anvin
18b78815b9 Merge commit 'origin/master' into sse5 2007-09-17 15:49:53 -07:00
H. Peter Anvin
7eb4a38793 Initial support for four arguments per instruction
For SSE5, we will need to support four arguments per instruction.
2007-09-17 15:49:30 -07:00
H. Peter Anvin
2dba5c218d CLFLUSH: Neither an x64 instruction nor AMD
CLFLUSH was introduced at least in Katmai, if not sooner.  It's
available in all modes.
2007-09-17 15:48:32 -07:00
H. Peter Anvin
3a7edd73a3 Sort dependency lists
Sort the dependency lists generated by "mkdep.pl", to make sure that
re-running "make alldeps" doesn't change anything unless there has
been real dependency changes.  The previous version could produce
different output between runs and across platforms.
2007-09-17 13:56:26 -07:00
H. Peter Anvin
b8af9aa522 Cleaner way to handle MSVC's _snprintf() underscore damage
Some versions of MSVC have snprintf() and vsnprintf() only with a
leading underscore.  Handle that a bit more cleanly.
2007-09-17 13:53:14 -07:00
H. Peter Anvin
2ced2ec370 test/r13.asm: test special-casing of rbp and r13 in 64-bit mode
Test that we correctly special-case the modr/m generation for r13 in
64-bit mode.
2007-09-17 13:19:25 -07:00
H. Peter Anvin
2f3c4c056e Additional documentation for 64-bit programming
Flesh out the documentation for 64-bit programming a little bit; in
particular, include links to the ABI documentation for various
platforms.
2007-09-17 13:03:33 -07:00
H. Peter Anvin
b9957462d6 INSTALL: MSVC++ compilation instructions
Update compilation instructions for MSVC++, and point out that it's
not just Unix systems which can use the GNU instructions -- it also
applies to MacOS X and Windows with either Cygwin or MinGW.
2007-09-16 22:27:07 -07:00
H. Peter Anvin
39afbce9d4 make alldeps: change Mkfiles/Makefile.* to Mkfiles/*.mak
The previous checkin switched to the naming scheme *.mak to be able to
be more descriptive.  Thus, change "make alldeps" accordingly.
2007-09-16 22:17:29 -07:00
H. Peter Anvin
e8bfecf275 Fix Makefile for MSVC++ 2005, delete obsolete Makefiles
New Makefile for MSVC++ 2005, delete old unmaintained Makefiles.
2007-09-16 22:16:24 -07:00
H. Peter Anvin
21d6be423f Minor fixes needed to compile with MSVC++ 2005
Minor fixes to make it possible to compile with MS Visual C++ 2005.
Unfortunately, MSVC++ is not fully C99 compliant; in particular, it
doesn't handle interspersed declarations and other code.  Furthermore,
it chokes on some expressions in outelf64.c, which fortunately can be
easily substituted with simpler expressions.
2007-09-16 22:15:34 -07:00
H. Peter Anvin
9e8e948f86 Run "make alldeps" 2007-09-16 18:35:02 -07:00
H. Peter Anvin
97a234782d Switch the preprocessor over to using the hash table library
Switch the preprocessor over to using the hash table library.  On my
system, this improves the runtime of the output of test/pref/macro.pl
from over 600 seconds to 7 seconds.

Macros have an odd mix of case-sensitive and case-insensitive
behaviour, plus there are matching parameters for arguments, etc.  As
a result, we use case-insensitive hash tables and use a linked list to
store all the possible isomorphs.
2007-09-16 18:04:57 -07:00