Commit Graph

173 Commits

Author SHA1 Message Date
H. Peter Anvin
89f78f5010 Merge branch 'nasm-2.11.xx'
Resolved Conflicts:
	assemble.c

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 08:30:40 -07:00
H. Peter Anvin
0a9250c2ab BR 3392279: Fix duplicated REX prefixes
The fix for BR 3392278:

aa29b1d93f assemble.c: Don't drop rex prefix from instruction itself

... would cause multiple REX prefixes to be emitted for some
instructions.  Create a new flag to indicate that REX has already been
emitted, which can be cleared for each instance of an instruction.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 08:24:21 -07:00
Cyrill Gorcunov
5b144751ee Rename REX_REAL to REX_MASK
"Real" doesn't reflect the meaning of this
macro -- it rather represents a rex prefix mask.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-05-09 14:38:58 +04:00
Jin Kyu Song
4360ba28f0 mib: Handle MIB EA in a different way from regular EA's
In mib operands, users' intention should be preserved.
e.g.) [eax + eax*1] and [eax*2] must be distinguished and encoded differently.

So  a new EA flag EAF_MIB for mib operands is added.
And a new EA hint EAH_SUMMED for the case of [eax+eax*4] being parsed
as [eax*5] is also added.

NOSPLIT specifier does not have an effect in mib, so [nosplit eax + eax*1]
will be encoded as [eax, eax] rather than [eax*2] as in a regular EA.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-11 16:56:19 -08:00
Jin Kyu Song
b287ff0ddb bnd: Add a new nobnd prefix
bnd and nobnd prifixes can be used for each instruction line to
direct whether bnd registers should be preserved or not.

And those are also added as options for DEFAULT directive.
Once bnd is set with default, DEFAULT BND, all bnd-prefix
available instructions are prefixed with bnd. To override it,
nobnd prefix can be used.

In the other way, DEFAULT NOBND can disable DEFAULT BND and
have nasm encode in the normal way.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-04 20:10:08 -08:00
H. Peter Anvin
621a69ac5c Add {vex3} and {vex2} prefixes by analogy with {evex}
Allow specifying {vex3} or {vex2} (the latter is currently always
redundant, unless we end up with instructions at some point can be
specified with legacy prefixes or VEX) to select a specific encoding
of VEX-encoded instructions.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-11-28 12:21:11 -08:00
Jin Kyu Song
487f352b62 stdscan: Rework curly brace parsing routines
As recommended by the community, a comma-separated decorators ({k1,z})
and nested braces ({{k1},{z}}) are dropped out. So only standard syntax
is supported from now.

This rework made source code neat and easy to maintain. Most of the codes
for handling corner cases are removed.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-11-27 15:43:33 -08:00
Jin Kyu Song
4a8dc019ef disasm: Add basic AVX512 support
Disassembler can translate EVEX prefix, count up to 32 vector registers
and recognize new ZMM / opmask registers.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-11-20 11:29:42 -08:00
Jin Kyu Song
25c2212586 match: Check the number of elements in broadcasting operands
The broadcasting decorator {1to##} must describe exactly how many times
the memory element is repeated in order to clearly match the correct
instruction format.

For example,
    vaddpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8}   ; good
    vaddpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to16}  ; fail qword * 16 = 1024b

    vaddps zmm30,zmm29,DWORD [rcx]{1to16}	 ; good
    vaddps zmm30,zmm29,DWORD [rcx]{1to8}	 ; fail dword * 8 = 256b

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-11-20 11:29:42 -08:00
Jin Kyu Song
945b1b8f36 AVX-512: Add {evex} instruction prefix
For instructions that can be encoded either in VEX or EVEX,
{evex} forces nasm to encode in EVEX.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-11-20 11:29:42 -08:00
Jin Kyu Song
0304109b3d MPX: Add BND prefix for branch instructions
BND prefix is used for adding bounds checking protection
across flow control changes such as call, ret, jmp and jcc calls.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-11-20 11:29:42 -08:00
Jin Kyu Song
c47ef9490b AVX-512: Fix rounding mode value in EVEX prefix with SAE
If SAE is set, VL(vector length) is implied to be 512.
EVEX.L'L (=EVEX.RC) is set to 00b by default.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-09-07 11:50:11 +04:00
Jin Kyu Song
daafcbae77 AVX-512: Remove trailing space and align columns
Cosmetic change

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-29 10:03:28 +04:00
Jin Kyu Song
6d16d2836d AVX-512: Fix comments
Fixed or purged some old comments and added a comment for a previous patch.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-29 10:03:09 +04:00
Jin Kyu Song
e3a06b9d0a AVX-512: Remember the position of operand with broadcast or embedded rounding
It was not so straight forward to find the postion of operand that has
a broadcasting, embedded rounding mode or SAE (Suppress All Exceptions)
decorator out from operands types or bytecode.
Remebering the postion of the operand of interest in the parser reduces
the burden that assembler looks through the operands.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-29 10:03:02 +04:00
Jin Kyu Song
9bb987d8e0 AVX-512: Change the data type for instruction flags
Increased the size of data type for instruction flags from 32bits to 64bits.
And a new type (iflags_t) is defined for better maintainability.

Bigger data type is needed because more instruction set types are coming
but there were not enough space for them. Since they are not bit masks,
only one instruction set is allowed for each instruction.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-28 09:37:21 +04:00
Jin Kyu Song
d4760c19b5 AVX-512: Add ZWORD keyword
ZWORD (512 bits) keyword is added

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-22 19:37:44 +04:00
Jin Kyu Song
4d1fc3f1a0 AVX-512: Fix instruction match function
When an instruction allows broadcasting, the memory element size is
different from the size of normal memory operation.
This information is provided in a decoflags field, so it should try to
match those properties before it fails.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-22 19:37:37 +04:00
Jin Kyu Song
cc1dc9de53 AVX-512: Add EVEX encoding and new instructions
EVEX encoding support includes 32 vector regs (XMM/YMM/ZMM),
opmask, broadcasting, embedded rounding mode,
suppress all exceptions, compressed displacement.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-16 09:06:15 +04:00
Jin Kyu Song
72018a2b43 AVX-512: Add support for parsing braces
AVX-512 introduced new syntax using braces for decorators.
Opmask, broadcat, rounding control use this new syntax.

http://software.intel.com/sites/default/files/319433-015.pdf

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-08-06 09:37:52 +04:00
Cyrill Gorcunov
525ef26359 ea_type: Fix typo in comment
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-07-14 18:45:48 +04:00
Cyrill Gorcunov
83e6924e1a Move conditional opcodes close to enum ccode definition
Thus if someone need to rework this code he won't need
to jump between files trying to figure out where enum
and opcodes lay.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-03-03 14:34:31 +04:00
Cyrill Gorcunov
3539225609 Align enum prefixes members
It's a way easier to read.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-02-15 02:06:24 +04:00
H. Peter Anvin
290b4cb3a4 eval: add general support for "integer functions" and add ilog2*()
Add general support in the function parser for "integer functions"
(actually implemented as special unary operators, then wrapped in
macros) and implement a family of integer logarithms.  The only
difference is the behavior on a non-power-of-two argument:

	ilog2[e]	-- throw an error
	ilog2w		-- throw a warning
	ilog2f		-- round down to power of 2
	ilog2c		-- round up to power of 2

This is useful for back-converting from masks to bit values.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-05-31 10:25:37 -07:00
Cyrill Gorcunov
b5e8fec848 preproc: Move NOP preprocessor into separate file
No need to carry it in nasm.c, let it be more modular.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2012-05-07 11:34:27 +04:00
Cyrill Gorcunov
0b78bff510 preproc: Split get rid of global preproc methods
This will allow to hook on updated preprocessor
without breaking existing one.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2012-05-07 01:57:55 +04:00
H. Peter Anvin
9fa2e72997 Add support for UTF-16BE and UTF-32BE
Add support for bigendian UTF-16 and UTF-32, and (for symmetry) add
explicitly littleendian operators.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-25 15:29:37 -08:00
H. Peter Anvin
4ecd5d79fc HLE: Implement the basic mechanism for XACQUIRE/XRELEASE
This implements the mechanism for XACQUIRE/XRELEASE.  It does not
include the necessary annotations in insns.dat.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-24 21:57:17 -08:00
H. Peter Anvin
10da41e328 HLE: Split the LOCK and REP prefix slots
With HLE, the sequence REP LOCK actually makes sense, so support it.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-02-24 20:57:04 -08:00
Cyrill Gorcunov
18914e6330 BR3392198: Fix compilation warning on prefixes
insn->prefixes might contain not only values from
'enum prefixes' but from 'enum reg_enum' as well so
make it generic 'int' instead.

This calms down the compiler about enum's mess and
eliminates a wrong assumption that we always have
values by particular type in this field.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-11-12 11:41:51 +04:00
Cyrill Gorcunov
c026df26c3 Style tuneup of nasm.h
- a number of tabs to space conversion
 - redundant spaces removed
 - structure elements alignment

No functional changes.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-08-28 15:00:26 +04:00
Cyrill Gorcunov
d47e00db4c nasm.h: Reorder tokenval members to drop padding
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-07-17 20:00:30 +04:00
H. Peter Anvin
fc561203fd Remove support for DREX encoding
The DREX encoding never hit production silicon, and has been replaced
by VEX/XOP encoding, so remove support for it.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-07-07 16:58:22 -07:00
Cyrill Gorcunov
86b2ad05f8 preproc: Move Preproc type to preproc_ops structure
There is no need to hide this structure into a type.
The former preproc_ops is a way more descriptive.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-07-02 00:15:24 +04:00
Cyrill Gorcunov
a39912dcd9 Move numvalue herleper into nasmlib.h
No need to duplicate implementation.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-06-25 12:10:40 +04:00
H. Peter Anvin
3089f7ef8a Add support for VSIB instructions
Add support for VSIB instructions, which use vector registers as the
index registers in an EA.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-06-22 18:19:28 -07:00
Cyrill Gorcunov
c1936da942 ofmt: Alias shortname must be used for __OUTPUT_FORMAT__ macro
__OUTPUT_FORMAT__ must consist of shortname of output format
or its alias, otherwise userspace ABI gets broken.

For example source code still can refer to __OUTPUT_FORMAT__=elf,
instead of __OUTPUT_FORMAT__=elf32.

BR3246990

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2011-04-06 18:32:15 +04:00
H. Peter Anvin
ab5bd05d82 Revert "Improve process_ea and introduce -OL"
This reverts commit ac732cb6a5.

Resolved Conflicts:

	doc/nasmdoc.src

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-07-25 12:43:30 -07:00
H. Peter Anvin
b453c866ab nasm.h: move "regs.h" to top; make is_register() a bool
Move the #include of regs.h to the top with the other includes, and
make is_register() -- being a boolean predicate -- return bool.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-07-25 00:17:12 -07:00
Cyrill Gorcunov
a38b86aecf move is_register helper to nasm.h
H. Peter Anvin noted:
 |
 | Could we avoid putting static code that has no dynamic content in
 | dynamically generated files... it just complicates things unnecessarily.
 |
 | The above can move into nasm.h for example.
 |

Good idea.

CC: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2010-07-25 11:09:56 +04:00
Victor van den Elzen
ac732cb6a5 Improve process_ea and introduce -OL
Two fixes:
1. Optimization of [bx+0xFFFF] etc
   0xFFFF is an sbyte under 16-bit semantics,
   so make sure to check it right.

2. Don't optimize displacements in -O0
   Displacements that fit into an sbyte or
   can be removed should *not* be optimized in -O0.

   Implicit zero displacements are still optimized, e.g.:
   [eax] -> 0 bit displacement, [ebp] -> 8 bit displacement.
   However explicit displacements are not optimized:
   [eax+0] -> 32 bit displacement, [ebp+0] -> 32 bit displacement.

Because #2 breaks compatibility with 0.98,
I introduced a new optimization level: -OL, legacy.
2010-07-24 22:00:12 +02:00
H. Peter Anvin
5e2e8b9105 Rename filenames to 8.3 format
Apparently some people still care about compiling native on MS-DOS,
and we don't have a significant number of files which need adjustment.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-06-15 10:47:16 -07:00
H. Peter Anvin
55ae12052c Add support for one-byte relocations
Add OUT_REL1ADR (one-byte relative address) and support for
OUT_ADDRESs with size == 1.  Add support for it in
outbin and outdbg.  *It still needs to be added to other backends*,
both the OUT_REL*ADR and OUT_ADDRESS codepaths need to be handled.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-05-06 15:33:24 -07:00
Cyrill Gorcunov
2ef5c27be7 Rename SEGALIGN to SECTALIGN
"sectalign" is preferred over "segalign"
since it operates over section attributes.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2010-04-21 18:09:54 +04:00
Cyrill Gorcunov
2a587ab1c9 ofmt: Implement null_segalign stubs
Set stubs for all targets

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2010-04-21 01:08:36 +04:00
H. Peter Anvin
f8563f7a98 opflags: more int32_t -> opflags_t conversions
Hopefully this should catch all of them... but please keep an eye out
for any other uses of int32_t for the operand flags.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-10-13 12:29:01 -07:00
Cyrill Gorcunov
1985416b0b nasm.h: introduce is_class macro helper
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2009-10-13 19:41:45 +04:00
Cyrill Gorcunov
1f75420d61 use opflags_t type for operands
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2009-10-13 19:41:41 +04:00
H. Peter Anvin
dbb640b846 Drop efunc and evalfunc as input to the preprocessor
We only ever invoked the preprocessor with fixed values for efunc and
evalfunc, so call nasm_error() and evaluate() directly.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-07-18 18:57:16 -07:00
H. Peter Anvin
605f5155ee Drop the ofmt and errfunc arguments to label definition functions
We never set ofmt and errfunc to anything but the global values.
Dropping them from the label definition function command line
simplifies the code.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-07-18 18:43:58 -07:00