Commit Graph

2847 Commits

Author SHA1 Message Date
Cyrill Gorcunov
4d8dbd98b2 preproc: Convert tabs to spaces
No func cnages

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-06-29 00:52:54 +04:00
Cyrill Gorcunov
6ebe3bcd2e output: outbin -- Fix relocation size
In commit fd52c277dd
we've started handling negative address relocations
but support Elf format only and got a typo in bin
format which leaded to endless cycle of applying
relocation due to negative argument (make test
hangs).

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-06-28 22:31:06 +04:00
H. Peter Anvin
67f0f4d08c Merge branch 'nasm-2.11.xx' 2014-05-21 23:00:31 -07:00
H. Peter Anvin
febd5afc6d doc: Make it clear that --v is only in 2.11.05 and newer
... otherwise people might think it is preferred and use it
unnecessarily.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 23:00:12 -07:00
H. Peter Anvin
89f78f5010 Merge branch 'nasm-2.11.xx'
Resolved Conflicts:
	assemble.c

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 08:30:40 -07:00
H. Peter Anvin
12f7802d60 NASM 2.11.05 2014-05-21 08:29:41 -07:00
H. Peter Anvin
4ac3b025be doc: Document --v and duplicate REX prefix fix
Document changes for 2.11.05.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 08:28:21 -07:00
H. Peter Anvin
0a9250c2ab BR 3392279: Fix duplicated REX prefixes
The fix for BR 3392278:

aa29b1d93f assemble.c: Don't drop rex prefix from instruction itself

... would cause multiple REX prefixes to be emitted for some
instructions.  Create a new flag to indicate that REX has already been
emitted, which can be cleared for each instance of an instruction.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-21 08:24:21 -07:00
H. Peter Anvin
49de44e56d Merge remote-tracking branch 'origin/signrel' 2014-05-09 15:09:43 -07:00
H. Peter Anvin
61c397caab Merge branch 'nasm-2.11.xx' 2014-05-09 15:09:13 -07:00
Cyrill Gorcunov
13558c1e7c options: Add --v option
It's been requested a long ago to handle '--v' option same was as
a regualar '-v'. From initial report

 | NASM and yasm are in many respects compatible but yasm uses --v
 | instead of -v for version.  As often --v is used for version I
 | end up using --v initially in NASM.  This patch allows me to compile
 | Mozilla apps which use yasm with NASM by merely renaming NASM to yasm
 | so that the build environment does not have to be updated (Mozilla
 | would not accept changes to allow use of NASM).

Reported-by: Andy Willis <abwillis1@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-05-09 15:08:28 -07:00
H. Peter Anvin
39aa094f38 NASM 2.11.04 2014-05-09 15:04:42 -07:00
Cyrill Gorcunov
e743843d15 options: Add --v option
It's been requested a long ago to handle '--v' option same was as
a regualar '-v'. From initial report

 | NASM and yasm are in many respects compatible but yasm uses --v
 | instead of -v for version.  As often --v is used for version I
 | end up using --v initially in NASM.  This patch allows me to compile
 | Mozilla apps which use yasm with NASM by merely renaming NASM to yasm
 | so that the build environment does not have to be updated (Mozilla
 | would not accept changes to allow use of NASM).

Reported-by: Andy Willis <abwillis1@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-05-09 22:34:37 +04:00
Cyrill Gorcunov
07f0a8dbc9 debug: Drop LOGALLOC usage
There are special tools (like valgrind and etc)
to track memory leaks, no need for own trivial
tracker.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-05-09 22:22:34 +04:00
Cyrill Gorcunov
5b144751ee Rename REX_REAL to REX_MASK
"Real" doesn't reflect the meaning of this
macro -- it rather represents a rex prefix mask.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-05-09 14:38:58 +04:00
Jin Kyu Song
3a105c3c0e changes: Document bug fixes
- Removed an error checking code for setting evex flags
- Fixed vector length matching bug

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2014-05-07 13:56:04 -07:00
Jin Kyu Song
abdc8bdea2 ndisasm: Match vector length with EVEX.b set
With broadcasting, EVEX.L'L should be matched even when EVEX.b is set.
Only in a case of embedded rounding, EVEX.L'L is ignored in matching
function since it becomes EVEX.RC.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2014-05-05 13:58:51 -07:00
Jin Kyu Song
eb29cf7b31 AVX512: Remove invalid error checking
An offset-only memref can also have an opmask decorator.
e.g.) vmovdqu32 [0xabcd]{k1}, zmm0

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2014-05-05 13:56:36 -07:00
H. Peter Anvin
1179a67a8e NASM 2.11.03 2014-05-05 11:22:02 -07:00
H. Peter Anvin
1a03281365 changes: Document TIMES bug
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-05 11:21:17 -07:00
Cyrill Gorcunov
aa29b1d93f assemble.c: Don't drop rex prefix from instruction itself
emit_rex is supposed to write REX prefix into output stream
if needed, but we happen to drop it off on a first write
which breaks REX required instructions if TIMES directive
is used.

For example the code like

	| times 4		movq	xmm11, xmm11

compiles into

	| 0000000000000000 <.text>:
	|   0:	f3 45 0f 7e db       	movq   %xmm11,%xmm11
	|   5:	f3 0f 7e db          	movq   %xmm3,%xmm3
	|   9:	f3 0f 7e db          	movq   %xmm3,%xmm3
	|   d:	f3 0f 7e db          	movq   %xmm3,%xmm3

instead of proper

	| 0000000000000000 <.text>:
	|   0:	f3 45 0f 7e db       	movq   %xmm11,%xmm11
	|   5:	f3 45 0f 7e db       	movq   %xmm11,%xmm11
	|   a:	f3 45 0f 7e db       	movq   %xmm11,%xmm11
	|   f:	f3 45 0f 7e db       	movq   %xmm11,%xmm11

http://bugzilla.nasm.us/show_bug.cgi?id=3392278

Reported-by: Javier <elpochodelagente@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2014-05-05 11:20:17 -07:00
H. Peter Anvin
429beab924 NASM 2.11.02 2014-02-19 15:50:26 -08:00
H. Peter Anvin
727eb3f8f6 Add CLFLUSHOPT instruction
Add the CLFLUSHOPT instruction from the Intel Instruction Set
Architecture Extensions document version 319433-018 (Feb 2014).

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-02-19 15:40:53 -08:00
H. Peter Anvin
0b7db57deb insns: add XSAVEC, XSAVES and XRSTORS instructions
Add the XSAVEC, XSAVES, and XRSTORS instructions from the Intel SDM
release 253665-050US (Feb 2014).

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-02-19 14:58:42 -08:00
H. Peter Anvin
31f23b05f4 NASM 2.11.01 2014-02-18 14:05:52 -08:00
H. Peter Anvin
f2d2569bb6 changes.src: changelog for 2.11.01
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-02-18 14:05:14 -08:00
H. Peter Anvin
0ace62cb6a outelf: Error out on "section align" without value
If someone specifies "section align" without =value, error out.

Reported-by: Ilya Albrekht <ilya.albrekht@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-02-18 13:30:44 -08:00
H. Peter Anvin
1eef781594 BR 3392275: Don't require xmm0 to be specified when implicit
BR 3392275 complains about xmm0 having to be explicitly included in
the assembly syntax when it is implicit in the encoding.  In the
interest of "be liberal in what you accept", accept either form in the
input.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-02-16 10:25:25 -08:00
Cyrill Gorcunov
d0293d3392 BR3392274: output: Elf -- Don't crash on erronious syntax
Elf align section attribute requires syntax "align=value",
but in case if '=' is missed we pass nil pointer into
atoi function which cause libc to crash.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2014-02-15 18:40:12 +04:00
H. Peter Anvin
af10bfe167 NASM 2.11 2013-12-31 10:40:10 -08:00
H. Peter Anvin
b2fcac9a1d doc: Document DEFAULT BND/NOBND in changes, add use case
Add DEFAULT BND/NOBND to the change history, and explain the use case.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-12-31 10:38:51 -08:00
H. Peter Anvin
be1d052fff changes: Document change in [nosplit reg]
Document that [nosplit reg] as opposed to [nosplit reg*1] will no
longer force an index register.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-12-31 10:35:12 -08:00
Jin Kyu Song
26ddad67ca nosplit: Generate index-only EA only when a multiplier is used.
[nosplit eax] has been encoded as [eax*1+0] since 0.98.34.
But this seems like unexpected behavior.
So only when a register is multiplied, that will be treated
as an index. ([nosplit eax*1] -> [eax*1+0])
Document is updated accordingly.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-18 22:38:44 -08:00
Jin Kyu Song
b0c729baeb mpx: Clean up instruction data
Cleaned up unneccessary size specifiers in the instruction data.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-18 22:37:36 -08:00
Jin Kyu Song
3d06af2bd9 nosplit: Limit the effect of NOSPLIT
[nosplit eax+eax] was encoded [eax*2] previously but
this seems against the user's intention.
So in this case, nosplit is ignored now and [eax+eax] will be
generated.
Document is also updated accordingly.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-18 22:37:30 -08:00
Jin Kyu Song
97f6faec62 mib: Avoid RIP-relative addressing in mib
Using RIP relative for mib operands causes #UD exception.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-18 22:27:47 -08:00
Cyrill Gorcunov
0b900cc7e1 insns: Mark LOADALL, LOADALL286 with ND flag
Otherwise disassembler treat syscall, sysret incorrectly.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-12-13 11:00:43 +04:00
Jin Kyu Song
4360ba28f0 mib: Handle MIB EA in a different way from regular EA's
In mib operands, users' intention should be preserved.
e.g.) [eax + eax*1] and [eax*2] must be distinguished and encoded differently.

So  a new EA flag EAF_MIB for mib operands is added.
And a new EA hint EAH_SUMMED for the case of [eax+eax*4] being parsed
as [eax*5] is also added.

NOSPLIT specifier does not have an effect in mib, so [nosplit eax + eax*1]
will be encoded as [eax, eax] rather than [eax*2] as in a regular EA.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-11 16:56:19 -08:00
H. Peter Anvin
478f2dafff misc/release: Generate manpages
asciidoc/xmlto are not tools we require every users to have, so each
tarball should contain them.  That means the release script needs to
know about them.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-12-11 12:10:27 -08:00
Cyrill Gorcunov
d578b511c9 iflag: Don't use c99 array initialization
It's sad but not all compilers support c99 features, so drop
off IFLAG_INIT helper.

Reported-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-12-10 11:10:19 +04:00
Cyrill Gorcunov
f8d12d5011 insns-iflags: Drop occasionally introduced \Tab's
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-12-07 16:15:03 +04:00
Cyrill Gorcunov
a32e79c658 iflag: \Tabs -> \Space
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-12-07 16:14:00 +04:00
Cyrill Gorcunov
71f71c0dbe iflag: Introduce IFLAG_INIT helper
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
2013-12-07 16:12:07 +04:00
H. Peter Anvin
20df33d2a5 NASM 2.11rc4 2013-12-05 00:06:45 -08:00
Jin Kyu Song
009e54e0a1 doc: Update nasmdoc
Added bnd warning and nobnd prefix. DEFAULT directive section
has got more description about BND-related settings.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-04 20:51:13 -08:00
Jin Kyu Song
b287ff0ddb bnd: Add a new nobnd prefix
bnd and nobnd prifixes can be used for each instruction line to
direct whether bnd registers should be preserved or not.

And those are also added as options for DEFAULT directive.
Once bnd is set with default, DEFAULT BND, all bnd-prefix
available instructions are prefixed with bnd. To override it,
nobnd prefix can be used.

In the other way, DEFAULT NOBND can disable DEFAULT BND and
have nasm encode in the normal way.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-04 20:10:08 -08:00
Jin Kyu Song
bb8cf3fa77 bnd: Show warning when bnd prefix is dropped
When bnd prefix is dropped as jmp is encoded as jmp short,
nasm shows a warning message, which can be suppressed with a new
command line option, -w-bnd.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-04 20:06:23 -08:00
Jin Kyu Song
0873ef5626 pfmask: Limit the preferred mask to the vendor specific flags
In ndisasm, the priority follows the order of instructions in insns.dat.
Other iflags could affect this mechanism when a proper instruction form
had a higher iflag bit set.
The preferred mask bits are now limited to vendor flags (Cyrix and AMD)
and other flags do not affect disassembler any more.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
2013-12-02 18:42:19 -08:00
H. Peter Anvin
50137b8274 doc: Make the bit about mib operands a bit clearer
Clean up the text about what a mib is.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-11-28 21:26:26 -08:00
H. Peter Anvin
ebfa6a6452 doc: Clean up changelog for 2.11
- We don't need to list internal infrastructure improvements.
- We don't list rc releases separately.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2013-11-28 21:24:09 -08:00