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assemble: treat register operands without size as wildcards
Register with no size are a bit special: we don't honor extrinsic register sizes in the first place ("oword xmm1" gives a warning, even), and they should match any xmmrm size. As such, explicitly handle sizeless register operands as a hard match, instead of relying on the fuzzy-matching mechanism to handle them. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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25
assemble.c
25
assemble.c
@ -2005,9 +2005,10 @@ static enum match_result find_match(const struct itemplate **tempp,
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/*
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* Missing operand size and a candidate for fuzzy matching...
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*/
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for (i = 0; i < temp->operands; i++)
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xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
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for (i = 0; i < temp->operands; i++) {
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if ((temp->opd[i] & SAME_AS) == 0)
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xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
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}
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opsizemissing = true;
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}
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if (m > merr)
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@ -2021,6 +2022,14 @@ static enum match_result find_match(const struct itemplate **tempp,
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goto done;
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for (i = 0; i < instruction->operands; i++) {
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/*
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* We ignore extrinsic operand sizes on registers, so we should
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* never try to fuzzy-match on them. This also resolves the case
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* when we have e.g. "xmmrm128" in two different positions.
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*/
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if ((REGISTER & ~instruction->oprs[i].type) == 0)
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continue;
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/* This tests if xsizeflags[i] has more than one bit set */
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if ((xsizeflags[i] & (xsizeflags[i]-1)))
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goto done; /* No luck */
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@ -2144,10 +2153,16 @@ static enum match_result matches(const struct itemplate *itemp,
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} else if (itemp->opd[i] & ~type ||
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((itemp->opd[i] & SIZE_MASK) &&
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((itemp->opd[i] ^ type) & SIZE_MASK))) {
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if ((itemp->opd[i] & ~type & ~SIZE_MASK) || (type & SIZE_MASK))
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if ((itemp->opd[i] & ~type & ~SIZE_MASK) || (type & SIZE_MASK)) {
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return MERR_INVALOP;
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else
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} else if (!(REGISTER & ~type)) {
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/*
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* Note: we don't honor extrinsic operand sizes for registers,
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* so "missing operand size" for a register should be
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* considered a wildcard match rather than an error.
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*/
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opsizemissing = true;
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}
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}
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}
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