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BR 3392421: consider mode decorators in instruction matching

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We have to consider mode decorators when considering instruction
matching, otherwise we end up falling back to VEX encoding if it is
available, losing the decorator.  See BR 3392421.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2017-08-16 21:48:52 -07:00
parent c2834b9abe
commit ff04a9ffe8
1 changed files with 7 additions and 0 deletions
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7
asm/assemble.c
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@ -201,6 +201,7 @@ enum match_result {
MERR_BRNOTHERE,
MERR_BRNUMMISMATCH,
MERR_MASKNOTHERE,
MERR_DECONOTHERE,
MERR_BADCPU,
MERR_BADMODE,
MERR_BADHLE,
@ -748,6 +749,9 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction)
nasm_error(ERR_NONFATAL,
"mask not permitted on this operand");
break;
case MERR_DECONOTHERE:
nasm_error(ERR_NONFATAL, "unsupported mode decorator for instruction");
break;
case MERR_BADCPU:
nasm_error(ERR_NONFATAL, "no instruction for this cpu level");
break;
@ -2304,6 +2308,9 @@ static enum match_result matches(const struct itemplate *itemp,
if (~ideco & deco & OPMASK_MASK)
return MERR_MASKNOTHERE;
if (~ideco & deco & (Z_MASK|STATICRND_MASK|SAE_MASK))
return MERR_DECONOTHERE;
if (itemp->opd[i] & ~type & ~SIZE_MASK) {
return MERR_INVALOP;
} else if (template_opsize) {