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insns.dat: new instructions from the 013 AVX spec
New instructions (ADCX, ADOX, RDSEED) from the 013 AVX spec (Intel® Architecture Instruction Set Extensions Programming Reference). Note: ADCX in 64-bit mode disassembles incorrectly with a 64-bit argument. This still needs to be fixed before a 2.10.02 release. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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@ -2877,6 +2877,15 @@ VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r] AVX,FUTURE
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VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib] AVX,FUTURE
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VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib] AVX,FUTURE
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; Per AVX spec revision 13, document 319433-013
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ADCX reg32,rm32 [rm: 66 0f 38 f6 /r] FUTURE
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ADCX reg64,rm64 [rm: o64 66 0f 38 f6 /r] LONG,FUTURE
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ADOX reg32,rm32 [rm: f3 0f 38 f6 /r] FUTURE
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ADOX reg64,rm64 [rm: o64 f3 0f 38 f6 /r] LONG,FUTURE
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RDSEED reg16 [m: o16 0f c7 /7] FUTURE
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RDSEED reg32 [m: o32 0f c7 /7] FUTURE
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RDSEED reg64 [m: o64 0f c7 /7] LONG,FUTURE
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;# VIA (Centaur) security instructions
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XSTORE void [ 0f a7 c0] PENT,CYRIX
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XCRYPTECB void [ mustrep 0f a7 c8] PENT,CYRIX
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