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Add support for register-number immediates with fixed 4-bit values

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Add support for imm8 bytes which has a register value in the top four
bits and an arbitrary fixed value in the bottom four bits.
This commit is contained in:
H. Peter Anvin 2008-05-06 20:11:14 -07:00
parent e303936391
commit d58656f797
2 changed files with 25 additions and 0 deletions
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12
assemble.c
View File

@ -50,6 +50,8 @@
* \171 - placement of DREX suffix in the absence of an EA
* \172\ab - the register number from operand a in bits 7..4, with
* the 4-bit immediate from operand b in bits 0..3.
* \173\xab - the register number from operand a in bits 7..4, with
* the value b in bits 0..3.
* \2ab - a ModRM, calculated on EA in operand a, with the spare
* field equal to digit b.
* \250..\253 - same as \150..\153, except warn if the 64-bit operand
@ -994,6 +996,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
case 0171:
break;
case 0172:
case 0173:
codes++;
length++;
break;
@ -1590,6 +1593,15 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset++;
break;
case 0173:
c = *codes++;
opx = &ins->oprs[c >> 4];
bytes[0] = regvals[opx->basereg] << 4;
bytes[0] |= c & 15;
out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
offset++;
break;
case 0250:
case 0251:
case 0252:

13
disasm.c
View File

@ -659,6 +659,19 @@ static int matches(const struct itemplate *t, uint8_t *data,
}
break;
case 0173:
{
uint8_t ximm = *data++;
c = *r++;
if ((c ^ ximm) & 15)
return false;
ins->oprs[c >> 4].basereg = ximm >> 4;
ins->oprs[c >> 4].segment |= SEG_RMREG;
}
break;
case4(0200):
case4(0204):
case4(0210):