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https://github.com/netwide-assembler/nasm.git
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Intel FMA: drop relaxed forms
The Intel FMA instructions are destructive, so relaxed forms are not appropriate. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
parent
1d3e304546
commit
d15bb009f6
384
insns.dat
384
insns.dat
@ -2881,198 +2881,198 @@ VPCLMULHQHQDQ xmmreg,xmmreg*,xmmrm [rvm: vex.nds.128.66.0f3a 44 /r 11] AVX,SAN
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VPCLMULQDQ xmmreg,xmmreg*,xmmrm,imm [rvmi: vex.nds.128.66.0f3a 44 /r ib] AVX,SANDYBRIDGE,SO
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VPCLMULQDQ xmmreg,xmmreg*,xmmrm,imm [rvmi: vex.nds.128.66.0f3a 44 /r ib] AVX,SANDYBRIDGE,SO
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;# Intel Fused Multiply-Add instructions (FMA)
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;# Intel Fused Multiply-Add instructions (FMA)
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VFMADD132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO
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VFMADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO
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VFMADD132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY
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VFMADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY
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VFMADD132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO
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VFMADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO
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VFMADD132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY
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VFMADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY
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VFMADD312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO
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VFMADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA,FUTURE,SO
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VFMADD312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY
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VFMADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA,FUTURE,SY
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VFMADD312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO
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VFMADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 98 /r] FMA,FUTURE,SO
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VFMADD312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY
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VFMADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 98 /r] FMA,FUTURE,SY
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VFMADD213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE,SO
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VFMADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE,SO
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VFMADD213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE,SY
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VFMADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE,SY
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VFMADD213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE,SO
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VFMADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE,SO
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VFMADD213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE,SY
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VFMADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE,SY
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VFMADD123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE,SO
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VFMADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a8 /r] FMA,FUTURE,SO
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VFMADD123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE,SY
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VFMADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a8 /r] FMA,FUTURE,SY
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VFMADD123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE,SO
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VFMADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a8 /r] FMA,FUTURE,SO
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VFMADD123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE,SY
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VFMADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a8 /r] FMA,FUTURE,SY
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VFMADD231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE,SO
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VFMADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE,SO
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VFMADD231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE,SY
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VFMADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE,SY
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VFMADD231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE,SO
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VFMADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE,SO
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VFMADD231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE,SY
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VFMADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE,SY
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VFMADD321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE,SO
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VFMADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b8 /r] FMA,FUTURE,SO
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VFMADD321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE,SY
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VFMADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b8 /r] FMA,FUTURE,SY
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VFMADD321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE,SO
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VFMADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b8 /r] FMA,FUTURE,SO
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VFMADD321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE,SY
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VFMADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b8 /r] FMA,FUTURE,SY
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VFMADDSUB132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO
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VFMADDSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO
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VFMADDSUB132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY
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VFMADDSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY
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VFMADDSUB132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO
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VFMADDSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO
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VFMADDSUB132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY
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VFMADDSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY
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VFMADDSUB312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO
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VFMADDSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 96 /r] FMA,FUTURE,SO
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VFMADDSUB312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY
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VFMADDSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 96 /r] FMA,FUTURE,SY
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VFMADDSUB312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO
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VFMADDSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 96 /r] FMA,FUTURE,SO
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VFMADDSUB312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY
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VFMADDSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 96 /r] FMA,FUTURE,SY
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VFMADDSUB213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE,SO
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VFMADDSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE,SO
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VFMADDSUB213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE,SY
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VFMADDSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE,SY
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VFMADDSUB213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE,SO
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VFMADDSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE,SO
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VFMADDSUB213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE,SY
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VFMADDSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE,SY
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VFMADDSUB123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE,SO
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VFMADDSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a6 /r] FMA,FUTURE,SO
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VFMADDSUB123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE,SY
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VFMADDSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a6 /r] FMA,FUTURE,SY
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VFMADDSUB123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE,SO
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VFMADDSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a6 /r] FMA,FUTURE,SO
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VFMADDSUB123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE,SY
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VFMADDSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a6 /r] FMA,FUTURE,SY
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VFMADDSUB231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE,SO
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VFMADDSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE,SO
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VFMADDSUB231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE,SY
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VFMADDSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE,SY
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VFMADDSUB231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE,SO
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VFMADDSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE,SO
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VFMADDSUB231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE,SY
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VFMADDSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE,SY
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VFMADDSUB321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE,SO
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VFMADDSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b6 /r] FMA,FUTURE,SO
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VFMADDSUB321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE,SY
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VFMADDSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b6 /r] FMA,FUTURE,SY
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VFMADDSUB321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE,SO
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VFMADDSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b6 /r] FMA,FUTURE,SO
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VFMADDSUB321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE,SY
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VFMADDSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b6 /r] FMA,FUTURE,SY
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VFMSUB132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO
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VFMSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO
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VFMSUB132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY
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VFMSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY
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VFMSUB132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO
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VFMSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO
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VFMSUB132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY
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VFMSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY
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VFMSUB312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO
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VFMSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9a /r] FMA,FUTURE,SO
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VFMSUB312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY
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VFMSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9a /r] FMA,FUTURE,SY
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VFMSUB312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO
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VFMSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9a /r] FMA,FUTURE,SO
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VFMSUB312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY
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VFMSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9a /r] FMA,FUTURE,SY
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VFMSUB213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE,SO
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VFMSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE,SO
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VFMSUB213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE,SY
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VFMSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE,SY
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VFMSUB213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE,SO
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VFMSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE,SO
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VFMSUB213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE,SY
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VFMSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE,SY
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VFMSUB123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE,SO
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VFMSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 aa /r] FMA,FUTURE,SO
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VFMSUB123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE,SY
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VFMSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 aa /r] FMA,FUTURE,SY
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VFMSUB123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE,SO
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VFMSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 aa /r] FMA,FUTURE,SO
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VFMSUB123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE,SY
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VFMSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 aa /r] FMA,FUTURE,SY
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VFMSUB231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE,SO
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VFMSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE,SO
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VFMSUB231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE,SY
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VFMSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE,SY
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VFMSUB231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE,SO
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VFMSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE,SO
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VFMSUB231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE,SY
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VFMSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE,SY
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VFMSUB321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE,SO
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VFMSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ba /r] FMA,FUTURE,SO
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VFMSUB321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE,SY
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VFMSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ba /r] FMA,FUTURE,SY
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VFMSUB321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE,SO
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VFMSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ba /r] FMA,FUTURE,SO
|
||||||
VFMSUB321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE,SY
|
VFMSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ba /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO
|
VFMSUBADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY
|
VFMSUBADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO
|
VFMSUBADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY
|
VFMSUBADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO
|
VFMSUBADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 97 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY
|
VFMSUBADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 97 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO
|
VFMSUBADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 97 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY
|
VFMSUBADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 97 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE,SO
|
VFMSUBADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE,SY
|
VFMSUBADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE,SO
|
VFMSUBADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE,SY
|
VFMSUBADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE,SO
|
VFMSUBADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE,SY
|
VFMSUBADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 a7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE,SO
|
VFMSUBADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE,SY
|
VFMSUBADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 a7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE,SO
|
VFMSUBADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE,SY
|
VFMSUBADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE,SO
|
VFMSUBADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE,SY
|
VFMSUBADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE,SO
|
VFMSUBADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE,SY
|
VFMSUBADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 b7 /r] FMA,FUTURE,SY
|
||||||
VFMSUBADD321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE,SO
|
VFMSUBADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b7 /r] FMA,FUTURE,SO
|
||||||
VFMSUBADD321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE,SY
|
VFMSUBADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 b7 /r] FMA,FUTURE,SY
|
||||||
VFNMADD132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO
|
VFNMADD132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO
|
||||||
VFNMADD132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY
|
VFNMADD132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY
|
||||||
VFNMADD132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO
|
VFNMADD132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO
|
||||||
VFNMADD132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY
|
VFNMADD132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY
|
||||||
VFNMADD312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO
|
VFNMADD312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SO
|
||||||
VFNMADD312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY
|
VFNMADD312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9c /r] FMA,FUTURE,SY
|
||||||
VFNMADD312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO
|
VFNMADD312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SO
|
||||||
VFNMADD312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY
|
VFNMADD312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9c /r] FMA,FUTURE,SY
|
||||||
VFNMADD213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE,SO
|
VFNMADD213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE,SO
|
||||||
VFNMADD213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE,SY
|
VFNMADD213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE,SY
|
||||||
VFNMADD213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE,SO
|
VFNMADD213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE,SO
|
||||||
VFNMADD213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE,SY
|
VFNMADD213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE,SY
|
||||||
VFNMADD123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE,SO
|
VFNMADD123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ac /r] FMA,FUTURE,SO
|
||||||
VFNMADD123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE,SY
|
VFNMADD123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ac /r] FMA,FUTURE,SY
|
||||||
VFNMADD123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE,SO
|
VFNMADD123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ac /r] FMA,FUTURE,SO
|
||||||
VFNMADD123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE,SY
|
VFNMADD123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ac /r] FMA,FUTURE,SY
|
||||||
VFNMADD231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE,SO
|
VFNMADD231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE,SO
|
||||||
VFNMADD231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE,SY
|
VFNMADD231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE,SY
|
||||||
VFNMADD231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE,SO
|
VFNMADD231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE,SO
|
||||||
VFNMADD231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE,SY
|
VFNMADD231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE,SY
|
||||||
VFNMADD321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE,SO
|
VFNMADD321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bc /r] FMA,FUTURE,SO
|
||||||
VFNMADD321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE,SY
|
VFNMADD321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 bc /r] FMA,FUTURE,SY
|
||||||
VFNMADD321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE,SO
|
VFNMADD321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bc /r] FMA,FUTURE,SO
|
||||||
VFNMADD321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE,SY
|
VFNMADD321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 bc /r] FMA,FUTURE,SY
|
||||||
VFNMSUB132PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO
|
VFNMSUB132PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO
|
||||||
VFNMSUB132PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY
|
VFNMSUB132PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY
|
||||||
VFNMSUB132PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO
|
VFNMSUB132PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO
|
||||||
VFNMSUB132PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY
|
VFNMSUB132PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY
|
||||||
VFNMSUB312PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO
|
VFNMSUB312PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SO
|
||||||
VFNMSUB312PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY
|
VFNMSUB312PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 9e /r] FMA,FUTURE,SY
|
||||||
VFNMSUB312PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO
|
VFNMSUB312PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SO
|
||||||
VFNMSUB312PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY
|
VFNMSUB312PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 9e /r] FMA,FUTURE,SY
|
||||||
VFNMSUB213PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE,SO
|
VFNMSUB213PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE,SO
|
||||||
VFNMSUB213PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE,SY
|
VFNMSUB213PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE,SY
|
||||||
VFNMSUB213PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE,SO
|
VFNMSUB213PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE,SO
|
||||||
VFNMSUB213PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE,SY
|
VFNMSUB213PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE,SY
|
||||||
VFNMSUB123PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE,SO
|
VFNMSUB123PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ae /r] FMA,FUTURE,SO
|
||||||
VFNMSUB123PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE,SY
|
VFNMSUB123PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 ae /r] FMA,FUTURE,SY
|
||||||
VFNMSUB123PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE,SO
|
VFNMSUB123PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ae /r] FMA,FUTURE,SO
|
||||||
VFNMSUB123PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE,SY
|
VFNMSUB123PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 ae /r] FMA,FUTURE,SY
|
||||||
VFNMSUB231PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE,SO
|
VFNMSUB231PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE,SO
|
||||||
VFNMSUB231PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE,SY
|
VFNMSUB231PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE,SY
|
||||||
VFNMSUB231PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE,SO
|
VFNMSUB231PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE,SO
|
||||||
VFNMSUB231PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE,SY
|
VFNMSUB231PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE,SY
|
||||||
VFNMSUB321PS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE,SO
|
VFNMSUB321PS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 be /r] FMA,FUTURE,SO
|
||||||
VFNMSUB321PS ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE,SY
|
VFNMSUB321PS ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w0 be /r] FMA,FUTURE,SY
|
||||||
VFNMSUB321PD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE,SO
|
VFNMSUB321PD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 be /r] FMA,FUTURE,SO
|
||||||
VFNMSUB321PD ymmreg,ymmreg*,ymmrm [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE,SY
|
VFNMSUB321PD ymmreg,ymmreg,ymmrm [rvm: vex.dds.256.66.0f38.w1 be /r] FMA,FUTURE,SY
|
||||||
VFMADD132SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SD
|
VFMADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SD
|
||||||
VFMADD132SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SQ
|
VFMADD132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SQ
|
||||||
VFMADD312SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SD
|
VFMADD312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 99 /r] FMA,FUTURE,SD
|
||||||
VFMADD312SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SQ
|
VFMADD312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 99 /r] FMA,FUTURE,SQ
|
||||||
VFMADD213SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE,SD
|
VFMADD213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE,SD
|
||||||
VFMADD213SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE,SQ
|
VFMADD213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE,SQ
|
||||||
VFMADD123SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE,SD
|
VFMADD123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a9 /r] FMA,FUTURE,SD
|
||||||
VFMADD123SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE,SQ
|
VFMADD123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a9 /r] FMA,FUTURE,SQ
|
||||||
VFMADD231SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE,SD
|
VFMADD231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE,SD
|
||||||
VFMADD231SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE,SQ
|
VFMADD231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE,SQ
|
||||||
VFMADD321SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE,SD
|
VFMADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 b9 /r] FMA,FUTURE,SD
|
||||||
VFMADD321SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE,SQ
|
VFMADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 b9 /r] FMA,FUTURE,SQ
|
||||||
VFMSUB132SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD
|
VFMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD
|
||||||
VFMSUB132SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ
|
VFMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ
|
||||||
VFMSUB312SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD
|
VFMSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD
|
||||||
VFMSUB312SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ
|
VFMSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ
|
||||||
VFMSUB213SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE,SD
|
VFMSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE,SD
|
||||||
VFMSUB213SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE,SQ
|
VFMSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE,SQ
|
||||||
VFMSUB123SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE,SD
|
VFMSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ab /r] FMA,FUTURE,SD
|
||||||
VFMSUB123SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE,SQ
|
VFMSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ab /r] FMA,FUTURE,SQ
|
||||||
VFMSUB231SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE,SD
|
VFMSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE,SD
|
||||||
VFMSUB231SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE,SQ
|
VFMSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE,SQ
|
||||||
VFMSUB321SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE,SD
|
VFMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bb /r] FMA,FUTURE,SD
|
||||||
VFMSUB321SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE,SQ
|
VFMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bb /r] FMA,FUTURE,SQ
|
||||||
VFNMADD132SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD
|
VFNMADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD
|
||||||
VFNMADD132SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ
|
VFNMADD132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ
|
||||||
VFNMADD312SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD
|
VFNMADD312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD
|
||||||
VFNMADD312SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ
|
VFNMADD312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ
|
||||||
VFNMADD213SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE,SD
|
VFNMADD213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE,SD
|
||||||
VFNMADD213SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE,SQ
|
VFNMADD213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE,SQ
|
||||||
VFNMADD123SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE,SD
|
VFNMADD123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 ad /r] FMA,FUTURE,SD
|
||||||
VFNMADD123SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE,SQ
|
VFNMADD123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 ad /r] FMA,FUTURE,SQ
|
||||||
VFNMADD231SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE,SD
|
VFNMADD231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE,SD
|
||||||
VFNMADD231SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE,SQ
|
VFNMADD231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE,SQ
|
||||||
VFNMADD321SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE,SD
|
VFNMADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bd /r] FMA,FUTURE,SD
|
||||||
VFNMADD321SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE,SQ
|
VFNMADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bd /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB132SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD
|
VFNMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD
|
||||||
VFNMSUB132SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ
|
VFNMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB312SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD
|
VFNMSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD
|
||||||
VFNMSUB312SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ
|
VFNMSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB213SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE,SD
|
VFNMSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE,SD
|
||||||
VFNMSUB213SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE,SQ
|
VFNMSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB123SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE,SD
|
VFNMSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 af /r] FMA,FUTURE,SD
|
||||||
VFNMSUB123SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE,SQ
|
VFNMSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 af /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB231SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE,SD
|
VFNMSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE,SD
|
||||||
VFNMSUB231SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE,SQ
|
VFNMSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE,SQ
|
||||||
VFNMSUB321SS xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE,SD
|
VFNMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 bf /r] FMA,FUTURE,SD
|
||||||
VFNMSUB321SD xmmreg,xmmreg*,xmmrm [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE,SQ
|
VFNMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUTURE,SQ
|
||||||
|
|
||||||
;# VIA (Centaur) security instructions
|
;# VIA (Centaur) security instructions
|
||||||
XSTORE void \3\x0F\xA7\xC0 PENT,CYRIX
|
XSTORE void \3\x0F\xA7\xC0 PENT,CYRIX
|
||||||
|
@ -32,13 +32,6 @@ foreach $pi ( sort(keys(%packed_insns)) ) {
|
|||||||
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
||||||
$l, $w, $op),
|
$l, $w, $op),
|
||||||
"FMA,FUTURE,${sx}";
|
"FMA,FUTURE,${sx}";
|
||||||
printf "%-15s %-31s %-8s%-39s %s\n",
|
|
||||||
"\U${pi}${o}${suf}",
|
|
||||||
"${mm}reg,${mm}rm",
|
|
||||||
"[r+vm:",
|
|
||||||
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
|
||||||
$l, $w, $op),
|
|
||||||
"FMA,FUTURE,${sx}";
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -57,17 +50,10 @@ foreach $si ( sort(keys(%scalar_insns)) ) {
|
|||||||
$l = 128;
|
$l = 128;
|
||||||
$mm = 'xmm';
|
$mm = 'xmm';
|
||||||
printf "%-15s %-31s %-8s%-39s %s\n",
|
printf "%-15s %-31s %-8s%-39s %s\n",
|
||||||
"\U${si}${o}${suf}",
|
"\U${si}${o}${suf}",
|
||||||
"${mm}reg,${mm}reg,${mm}rm",
|
"${mm}reg,${mm}reg,${mm}rm",
|
||||||
'[rvm:',
|
'[rvm:',
|
||||||
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
||||||
$l, $w, $op),
|
|
||||||
"FMA,FUTURE,${sx}";
|
|
||||||
printf "%-15s %-31s %-8s%-39s %s\n",
|
|
||||||
"\U${si}${o}${suf}",
|
|
||||||
"${mm}reg,${mm}rm",
|
|
||||||
'[r+vm:',
|
|
||||||
sprintf("vex.dds.%d.66.0f38.w%d %02x /r]",
|
|
||||||
$l, $w, $op),
|
$l, $w, $op),
|
||||||
"FMA,FUTURE,${sx}";
|
"FMA,FUTURE,${sx}";
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user