mirror of
https://github.com/netwide-assembler/nasm.git
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Merge tag 'nasm-2.15.05'
NASM 2.15.05 Resolved Conflicts: asm/preproc.c version Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
commit
cc64861a61
@ -941,7 +941,8 @@ enum text_options {
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OPT_LIMIT,
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OPT_KEEP_ALL,
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OPT_NO_LINE,
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OPT_DEBUG
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OPT_DEBUG,
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OPT_REPRODUCIBLE
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};
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enum need_arg {
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ARG_NO,
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@ -973,6 +974,7 @@ static const struct textargs textopts[] = {
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{"keep-all", OPT_KEEP_ALL, ARG_NO, 0},
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{"no-line", OPT_NO_LINE, ARG_NO, 0},
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{"debug", OPT_DEBUG, ARG_MAYBE, 0},
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{"reproducible", OPT_REPRODUCIBLE, ARG_NO, 0},
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{NULL, OPT_BOGUS, ARG_NO, 0}
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};
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@ -1333,6 +1335,9 @@ static bool process_arg(char *p, char *q, int pass)
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case OPT_DEBUG:
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debug_nasm = param ? strtoul(param, NULL, 10) : debug_nasm+1;
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break;
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case OPT_REPRODUCIBLE:
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reproducible = true;
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break;
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case OPT_HELP:
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help(stdout);
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exit(0);
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@ -2290,6 +2295,8 @@ static void help(FILE *out)
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" --lprefix str prepend the given string to local symbols\n"
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" --lpostfix str append the given string to local symbols\n"
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"\n"
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" --reproducible attempt to produce run-to-run identical output\n"
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"\n"
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" -w+x enable warning x (also -Wx)\n"
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" -w-x disable warning x (also -Wno-x)\n"
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" -w[+-]error promote all warnings to errors (also -Werror)\n"
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|
@ -4872,7 +4872,7 @@ static inline bool pp_concat_match(const Token *t, enum concat_flags mask)
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switch (t->type) {
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case TOKEN_ID:
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ctype = CONCAT_ID; /* Should this include $ and $$? */
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ctype = CONCAT_ID; /* Ought this include $ and $$? */
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break;
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case TOKEN_LOCAL_MACRO:
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ctype = CONCAT_LOCAL_MACRO;
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@ -7,6 +7,14 @@
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The NASM 2 series supports x86-64, and is the production version of NASM
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since 2007.
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\S{cl-2.15.05} Version 2.15.05
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\b Correct \c{%ifid $} and \c{%ifid $$} being treated as true. See
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\k{iftyp}.
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\b Add \c{--reproducible} option to suppress NASM version numbers and
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timestamps in output files. See \k{opt-reproducible}.
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\S{cl-2.15.04} Version 2.15.04
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\b More sensible handling of the case where one single-line macro
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|
@ -982,6 +982,12 @@ If this option is given, all \i\c{%line} directives in the source code
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are ignored. This can be useful for debugging already preprocessed
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code. See \k{line}.
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\S{opt-reproducible} The \i\c{--reproducible} Option
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If this option is given, NASM will not emit information that is
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inherently dependent on the NASM version or different from run to run
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(such as timestamps) into the output file.
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\S{nasmenv} The \i\c{NASMENV} \i{Environment} Variable
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@ -67,6 +67,13 @@ struct compile_time {
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};
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extern struct compile_time official_compile_time;
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/* POSIX timestamp if and only if we are not a reproducible build */
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extern bool reproducible;
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static inline int64_t posix_timestamp(void)
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{
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return reproducible ? 0 : official_compile_time.posix;
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}
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#define NO_SEG INT32_C(-1) /* null segment value */
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#define SEG_ABS 0x40000000L /* mask for far-absolute segments */
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|
@ -1,6 +1,6 @@
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/* ----------------------------------------------------------------------- *
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*
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* Copyright 1996-2016 The NASM Authors - All Rights Reserved
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* Copyright 1996-2020 The NASM Authors - All Rights Reserved
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* See the file AUTHORS included with the NASM distribution for
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* the specific copyright holders.
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*
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@ -44,12 +44,12 @@ extern const char nasm_version[];
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extern const char nasm_date[];
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extern const char nasm_compile_options[];
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extern bool reproducible;
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extern const char *nasm_comment(void);
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extern size_t nasm_comment_len(void);
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extern const char *nasm_signature(void);
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extern size_t nasm_signature_len(void);
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extern int nasm_test_run(void);
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#endif /* NASM_VER_H */
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|
@ -1,6 +1,6 @@
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/* ----------------------------------------------------------------------- *
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*
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* Copyright 1996-2016 The NASM Authors - All Rights Reserved
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* Copyright 1996-2020 The NASM Authors - All Rights Reserved
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* See the file AUTHORS included with the NASM distribution for
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* the specific copyright holders.
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*
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@ -43,46 +43,38 @@ const char nasm_compile_options[] = ""
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#endif
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;
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/* These are used by some backends. */
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static const char __nasm_comment[] =
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"The Netwide Assembler " NASM_VER;
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bool reproducible; /* Reproducible output */
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static const char __nasm_signature[] =
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"NASM " NASM_VER;
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/* These are constant so we could pass regression tests */
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static const char __nasm_comment_const[] ="The Netwide Assembler CONST";
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static const char __nasm_signature_const[] = "NASM CONST";
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int nasm_test_run(void)
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/* These are used by some backends. For a reproducible build,
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* these cannot contain version numbers.
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*/
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static const char * const _nasm_comment[2] =
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{
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return getenv("NASM_TEST_RUN") ? 1 : 0;
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}
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"The Netwide Assembler " NASM_VER,
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"The Netwide Assembler"
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};
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static const char * const _nasm_signature[2] = {
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"NASM " NASM_VER,
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"NASM"
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};
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const char *nasm_comment(void)
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{
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if (!nasm_test_run())
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return __nasm_comment;
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return __nasm_comment_const;
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return _nasm_comment[reproducible];
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}
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size_t nasm_comment_len(void)
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{
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if (!nasm_test_run())
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return strlen(__nasm_comment);
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return strlen(__nasm_comment_const);
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return strlen(nasm_comment());
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}
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const char *nasm_signature(void)
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{
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if (!nasm_test_run())
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return __nasm_signature;
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return __nasm_signature_const;
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return _nasm_signature[reproducible];
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}
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size_t nasm_signature_len(void)
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{
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if (!nasm_test_run())
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return strlen(__nasm_signature);
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return strlen(__nasm_signature_const);
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return strlen(nasm_signature());
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}
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@ -40,6 +40,7 @@
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#include "nctype.h"
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#include <time.h>
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#include "ver.h"
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#include "nasm.h"
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#include "nasmlib.h"
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@ -935,7 +936,7 @@ static void coff_write(void)
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i = IMAGE_FILE_MACHINE_I386;
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fwriteint16_t(i, ofile); /* machine type */
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fwriteint16_t(coff_nsects, ofile); /* number of sections */
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fwriteint32_t(time(NULL), ofile); /* time stamp */
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fwriteint32_t(posix_timestamp(), ofile); /* timestamp */
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fwriteint32_t(sympos, ofile);
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fwriteint32_t(coff_nsyms + initsym, ofile);
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fwriteint16_t(0, ofile); /* no optional header */
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|
131
travis/nasm-t.py
131
travis/nasm-t.py
@ -34,6 +34,50 @@ for cmd in ['run']:
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help = 'Run the selected test only',
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required = False)
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for cmd in ['new']:
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spp = sp.add_parser(cmd, help = 'Add a new test case')
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spp.add_argument('--description',
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dest = 'description', default = "Description of a test",
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help = 'Description of a test',
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required = False)
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spp.add_argument('--id',
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dest = 'id',
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help = 'Test identifier/name',
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required = True)
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spp.add_argument('--format',
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dest = 'format', default = 'bin',
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help = 'Output format',
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required = False)
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spp.add_argument('--source',
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dest = 'source',
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help = 'Source file',
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required = False)
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spp.add_argument('--option',
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dest = 'option',
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default = '-Ox',
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help = 'NASM options',
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required = False)
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spp.add_argument('--ref',
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dest = 'ref',
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help = 'Test reference',
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required = False)
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spp.add_argument('--error',
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dest = 'error',
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help = 'Set to "y" if test is supposed to fail',
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required = False)
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spp.add_argument('--output',
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dest = 'output', default = 'y',
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help = 'Output (compiled) file name (or "y")',
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required = False)
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spp.add_argument('--stdout',
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dest = 'stdout', default = 'y',
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help = 'Filename of stdout file (or "y")',
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required = False)
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spp.add_argument('--stderr',
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dest = 'stderr', default = 'y',
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help = 'Filename of stderr file (or "y")',
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required = False)
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for cmd in ['list']:
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spp = sp.add_parser(cmd, help = 'List test cases')
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@ -44,6 +88,27 @@ for cmd in ['update']:
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help = 'Update the selected test only',
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required = False)
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map_fmt_ext = {
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'bin': '.bin',
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'elf': '.o',
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'elf64': '.o',
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'elf32': '.o',
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'elfx32': '.o',
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'ith': '.ith',
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'srec': '.srec',
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'obj': '.obj',
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'win32': '.obj',
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'win64': '.obj',
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'coff': '.obj',
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'macho': '.o',
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'macho32': '.o',
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'macho64': '.o',
|
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'aout': '.out',
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'aoutb': '.out',
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'as86': '.o',
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'rdf': '.rdf',
|
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}
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|
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args = parser.parse_args()
|
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|
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if args.cmd == None:
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@ -275,7 +340,7 @@ def exec_nasm(desc):
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opts = [args.nasm] + prepare_run_opts(desc)
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|
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nasm_env = os.environ.copy()
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nasm_env['NASM_TEST_RUN'] = 'y'
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nasm_env['NASMENV'] = '--reproducible'
|
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|
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desc_env = desc.get('environ')
|
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if desc_env:
|
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@ -317,6 +382,9 @@ def exec_nasm(desc):
|
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def test_run(desc):
|
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print("=== Running %s ===" % (desc['_test-name']))
|
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|
||||
if 'disable' in desc:
|
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return test_skip(desc['_test-name'], desc["disable"])
|
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|
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pnasm, stdout, stderr = exec_nasm(desc)
|
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if pnasm == None:
|
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return False
|
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@ -369,6 +437,8 @@ def test_update(desc):
|
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|
||||
if 'update' in desc and desc['update'] == 'false':
|
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return test_skip(desc['_test-name'], "No output provided")
|
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if 'disable' in desc:
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return test_skip(desc['_test-name'], desc["disable"])
|
||||
|
||||
pnasm, stdout, stderr = exec_nasm(desc)
|
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if pnasm == None:
|
||||
@ -395,6 +465,65 @@ def test_update(desc):
|
||||
|
||||
return test_updated(desc['_test-name'])
|
||||
|
||||
#
|
||||
# Create a new empty test case
|
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if args.cmd == 'new':
|
||||
#
|
||||
# If no source provided create one
|
||||
# from (ID which is required)
|
||||
if not args.source:
|
||||
args.source = args.id + ".asm"
|
||||
|
||||
#
|
||||
# Emulate "touch" on source file
|
||||
path_asm = args.dir + os.sep + args.source
|
||||
print("\tCreating %s" % (path_asm))
|
||||
open(path_asm, 'a').close()
|
||||
|
||||
#
|
||||
# Fill the test descriptor
|
||||
#
|
||||
# FIXME: We should probably use Jinja
|
||||
path_json = args.dir + os.sep + args.id + ".json"
|
||||
print("\tFilling descriptor %s" % (path_json))
|
||||
with open(path_json, 'wb') as f:
|
||||
f.write("[\n\t{\n".encode("utf-8"))
|
||||
acc = []
|
||||
if args.description:
|
||||
acc.append("\t\t\"description\": \"{}\"".format(args.description))
|
||||
acc.append("\t\t\"id\": \"{}\"".format(args.id))
|
||||
if args.format:
|
||||
acc.append("\t\t\"format\": \"{}\"".format(args.format))
|
||||
acc.append("\t\t\"source\": \"{}\"".format(args.source))
|
||||
if args.option:
|
||||
acc.append("\t\t\"option\": \"{}\"".format(args.option))
|
||||
if args.ref:
|
||||
acc.append("\t\t\"ref\": \"{}\"".format(args.ref))
|
||||
if args.error == 'y':
|
||||
acc.append("\t\t\"error\": \"true\"")
|
||||
f.write(",\n".join(acc).encode("utf-8"))
|
||||
if args.output or args.stdout or args.stderr:
|
||||
acc = []
|
||||
if args.output:
|
||||
if args.output == 'y':
|
||||
if args.format in map_fmt_ext:
|
||||
args.output = args.id + map_fmt_ext[args.format]
|
||||
acc.append("\t\t\t{{ \"output\": \"{}\" }}".format(args.output))
|
||||
if args.stdout:
|
||||
if args.stdout == 'y':
|
||||
args.stdout = args.id + '.stdout'
|
||||
acc.append("\t\t\t{{ \"stdout\": \"{}\" }}".format(args.stdout))
|
||||
if args.stderr:
|
||||
if args.stderr == 'y':
|
||||
args.stderr = args.id + '.stderr'
|
||||
acc.append("\t\t\t{{ \"stderr\": \"{}\" }}".format(args.stderr))
|
||||
f.write(",\n".encode("utf-8"))
|
||||
f.write("\t\t\"target\": [\n".encode("utf-8"))
|
||||
f.write(",\n".join(acc).encode("utf-8"))
|
||||
f.write("\n\t\t]".encode("utf-8"))
|
||||
f.write("\n\t}\n]\n".encode("utf-8"))
|
||||
f.close()
|
||||
|
||||
if args.cmd == 'run':
|
||||
desc_array = []
|
||||
if args.test == None:
|
||||
|
22
travis/test/a64.asm
Normal file
22
travis/test/a64.asm
Normal file
@ -0,0 +1,22 @@
|
||||
bits 64
|
||||
start:
|
||||
invlpga eax, ecx
|
||||
invlpga rax, ecx
|
||||
jecxz start
|
||||
jrcxz start
|
||||
loop start, ecx
|
||||
loop start, rcx
|
||||
loope start, ecx
|
||||
loope start, rcx
|
||||
loopz start, ecx
|
||||
loopz start, rcx
|
||||
loopne start, ecx
|
||||
loopne start, rcx
|
||||
loopnz start, ecx
|
||||
loopnz start, rcx
|
||||
clzero eax
|
||||
clzero rax
|
||||
movdir64b eax, [edi]
|
||||
movdir64b rax, [rdi]
|
||||
umonitor eax
|
||||
umonitor rax
|
1
travis/test/a64.bin.t
Normal file
1
travis/test/a64.bin.t
Normal file
@ -0,0 +1 @@
|
||||
g<EFBFBD><EFBFBD>gك<EFBFBD>ك<EFBFBD>gقّقُgفٌفيgفهفمgـقــgـ<EFBFBD>ـ<EFBFBD>g<EFBFBD><EFBFBD>gf8<EFBFBD>f8<EFBFBD>g<EFBFBD><EFBFBD>ِ<EFBFBD><EFBFBD>ِ
|
18
travis/test/a64.json
Normal file
18
travis/test/a64.json
Normal file
@ -0,0 +1,18 @@
|
||||
[
|
||||
{
|
||||
"description": "Test 64 bit address (-Ox)",
|
||||
"id": "a64",
|
||||
"format": "bin",
|
||||
"source": "a64.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "a64.bin" }
|
||||
]
|
||||
},
|
||||
{
|
||||
"description": "Test 64 bit address (-O0)",
|
||||
"ref": "a64",
|
||||
"option": "-O0",
|
||||
"update": "false"
|
||||
}
|
||||
]
|
@ -1,4 +1,7 @@
|
||||
%ifmacro org
|
||||
org 7c00h
|
||||
%endif
|
||||
|
||||
init_foo:
|
||||
jmp init_bar
|
||||
nop
|
||||
|
Binary file not shown.
36
travis/test/amx.asm
Normal file
36
travis/test/amx.asm
Normal file
@ -0,0 +1,36 @@
|
||||
bits 64
|
||||
|
||||
%macro amx 1
|
||||
%define treg tmm %+ %1
|
||||
|
||||
ldtilecfg [rsi]
|
||||
sttilecfg [rdi]
|
||||
|
||||
tilezero treg
|
||||
|
||||
tileloadd treg, [rax]
|
||||
tileloadd treg, [rax,rdx]
|
||||
tileloadd treg, [rax,rdx*2]
|
||||
|
||||
tileloaddt1 treg, [rax]
|
||||
tileloaddt1 treg, [rax,rdx]
|
||||
tileloaddt1 treg, [rax,rdx*2]
|
||||
|
||||
tdpbf16ps treg, treg, treg
|
||||
tdpbssd treg, treg, treg
|
||||
tdpbusd treg, treg, treg
|
||||
tdpbsud treg, treg, treg
|
||||
tdpbuud treg, treg, treg
|
||||
|
||||
tilestored [rax], treg
|
||||
tilestored [rax,rdx], treg
|
||||
tilestored [rax,rdx*2], treg
|
||||
|
||||
tilerelease
|
||||
%endmacro
|
||||
|
||||
%assign n 0
|
||||
%rep 8
|
||||
amx n
|
||||
%assign n n+1
|
||||
%endrep
|
1
travis/test/amx.bin.t
Normal file
1
travis/test/amx.bin.t
Normal file
@ -0,0 +1 @@
|
||||
ト窗Iト窕Iト窖Iタト窖K ト窖Kト窖KPト窕K ト窕Kト窕KPト窘\タト窖^タト窕^タト窘^タト窗^タト窘K ト窘Kト窘KPト窗Iタト窗Iト窕Iト窖Iネト窖K ト窖Kト窖KPト窕K ト窕Kト窕KPト穩\ノト龝^ノト穢^ノト穩^ノト穡^ノト窘K ト窘Kト窘KPト窗Iタト窗Iト窕Iト窖Iミト窖K ト窖Kト窖KPト窕K ト窕Kト窕KPト稻\メト稾^メト稱^メト稻^メト禀^メト窘K ト窘Kト窘KPト窗Iタト窗Iト窕Iト窖Iリト窖K ト窖Kト窖KPト窕K ト窕Kト窕KPト稈\ロト稍^ロト秣^ロト稈^ロト秡^ロト窘K ト窘Kト窘KPト窗Iタト窗Iト窕Iト窖I狷窖K$ ト窖K$ト窖K$Pト窕K$ ト窕K$ト窕K$Pト禹\萋禺^萋禳^萋禹^萋禮^萋窘K$ ト窘K$ト窘K$Pト窗Iタト窗Iト窕Iト窖I霪窖K, ト窖K,ト窖K,Pト窕K, ト窕K,ト窕K,Pト祿\朗禊^朗祺^朗祿^朗祓^朗窘K, ト窘K,ト窘K,Pト窗Iタト窗Iト窕Iト窖I<EFBFBD>窖K4 ト窖K4ト窖K4Pト窕K4 ト窕K4ト窕K4Pト祀\<EFBFBD>祠^<EFBFBD>礫^<EFBFBD>祀^<EFBFBD>礬^<EFBFBD>窘K4 ト窘K4ト窘K4Pト窗Iタト窗Iト窕Iト窖I<EFBFBD>窖K< ト窖K<ト窖K<Pト窕K< ト窕K<ト窕K<Pト磽\<EFBFBD>ト磴^<EFBFBD>ト磚^<EFBFBD>ト磽^<EFBFBD>ト磧^<EFBFBD>ト窘K< ト窘K<ト窘K<Pト窗Iタ
|
12
travis/test/amx.json
Normal file
12
travis/test/amx.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test AMX instructions",
|
||||
"id": "amx",
|
||||
"format": "bin",
|
||||
"source": "amx.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "amx.bin" }
|
||||
]
|
||||
}
|
||||
]
|
1608
travis/test/avx2.asm
Normal file
1608
travis/test/avx2.asm
Normal file
File diff suppressed because it is too large
Load Diff
BIN
travis/test/avx2.bin.t
Normal file
BIN
travis/test/avx2.bin.t
Normal file
Binary file not shown.
11
travis/test/avx2.json
Normal file
11
travis/test/avx2.json
Normal file
@ -0,0 +1,11 @@
|
||||
[
|
||||
{
|
||||
"description": "Test AVX2 instructions (from gas testsuite)",
|
||||
"id": "avx2",
|
||||
"source": "avx2.asm",
|
||||
"option": "-DSRC -Ox",
|
||||
"target": [
|
||||
{ "output": "avx2.bin" }
|
||||
]
|
||||
}
|
||||
]
|
11
travis/test/br3104312.asm
Normal file
11
travis/test/br3104312.asm
Normal file
@ -0,0 +1,11 @@
|
||||
%if 1 < 8000_0002h
|
||||
%warning No bug with 8000_0002h
|
||||
%else
|
||||
%warning Bug with 8000_0002h
|
||||
%endif
|
||||
|
||||
%if 1 < 8000_0001h
|
||||
%warning No bug with 8000_0001h
|
||||
%else
|
||||
%warning Bug with 8000_0001h
|
||||
%endif
|
11
travis/test/br3104312.json
Normal file
11
travis/test/br3104312.json
Normal file
@ -0,0 +1,11 @@
|
||||
[
|
||||
{
|
||||
"description": "Test 8000_0001h and 8000_0002h bugs",
|
||||
"id": "br3104312",
|
||||
"source": "br3104312.asm",
|
||||
"option": "-E",
|
||||
"target": [
|
||||
{ "stderr": "br3104312.stderr" }
|
||||
]
|
||||
}
|
||||
]
|
2
travis/test/br3104312.stderr
Normal file
2
travis/test/br3104312.stderr
Normal file
@ -0,0 +1,2 @@
|
||||
./travis/test/br3104312.asm:2: warning: No bug with 8000_0002h [-w+user]
|
||||
./travis/test/br3104312.asm:8: warning: No bug with 8000_0001h [-w+user]
|
10
travis/test/br3392275.asm
Normal file
10
travis/test/br3392275.asm
Normal file
@ -0,0 +1,10 @@
|
||||
bits 32
|
||||
|
||||
blendvpd xmm2,xmm1,xmm0
|
||||
blendvpd xmm2,xmm1
|
||||
blendvps xmm2,xmm1,xmm0
|
||||
blendvps xmm2,xmm1
|
||||
pblendvb xmm2,xmm1,xmm0
|
||||
pblendvb xmm2,xmm1
|
||||
sha256rnds2 xmm2,xmm1,xmm0
|
||||
sha256rnds2 xmm2,xmm1
|
1
travis/test/br3392275.bin.t
Normal file
1
travis/test/br3392275.bin.t
Normal file
@ -0,0 +1 @@
|
||||
f8ムf8ムf8ムf8ムf8ムf8ム8ヒム8ヒム
|
12
travis/test/br3392275.json
Normal file
12
travis/test/br3392275.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"id": "br3392275",
|
||||
"description": "Do not require xmm0 to be explicitly declared when implicit",
|
||||
"format": "bin",
|
||||
"source": "br3392275.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "br3392275.bin" }
|
||||
]
|
||||
}
|
||||
]
|
5
travis/test/br3392363.asm
Normal file
5
travis/test/br3392363.asm
Normal file
@ -0,0 +1,5 @@
|
||||
bits 64
|
||||
vaddps zmm0 {k1}, zmm0, zmm0
|
||||
rep
|
||||
vaddps zmm0 {k1}, zmm0, zmm0
|
||||
rep movsd
|
1
travis/test/br3392363.bin.t
Normal file
1
travis/test/br3392363.bin.t
Normal file
@ -0,0 +1 @@
|
||||
b<EFBFBD>IXタ<EFBFBD><EFBFBD>IXタ<EFBFBD>
|
12
travis/test/br3392363.json
Normal file
12
travis/test/br3392363.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test br3392363",
|
||||
"id": "br3392363",
|
||||
"format": "bin",
|
||||
"source": "br3392363.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "br3392363.bin" }
|
||||
]
|
||||
}
|
||||
]
|
15
travis/test/br3392392.asm
Normal file
15
travis/test/br3392392.asm
Normal file
@ -0,0 +1,15 @@
|
||||
bits 64
|
||||
vpaddd zmm0, zmm0, [rax]{1to16}
|
||||
vpaddd zmm2{k3}, zmm0, zmm1
|
||||
vpaddd zmm2 {k3}, zmm0, zmm1
|
||||
vpaddd zmm0{k1}, zmm0, [rax]{1to16}
|
||||
vmovdqa32 [rsi]{k1}, zmm1
|
||||
vmovdqa32 [rsi]{z}, zmm1
|
||||
vmovdqa32 [rsi]{k1}{z}, zmm1
|
||||
vmovdqa32 [rsi]{z}{k1}, zmm1
|
||||
%ifdef ERROR
|
||||
vmovdqa32 [rsi]{z}{1to16}, zmm1
|
||||
vmovdqa32 [rsi]{z}{k1}{1to16}, zmm1
|
||||
vpaddd zmm0, zmm0, [rax]{k1}
|
||||
vpaddd zmm0, zmm1, zmm2{1to16}
|
||||
%endif
|
BIN
travis/test/br3392392.bin.t
Normal file
BIN
travis/test/br3392392.bin.t
Normal file
Binary file not shown.
21
travis/test/br3392392.json
Normal file
21
travis/test/br3392392.json
Normal file
@ -0,0 +1,21 @@
|
||||
[
|
||||
{
|
||||
"description": "Test br3392392",
|
||||
"id": "br3392392",
|
||||
"format": "bin",
|
||||
"source": "br3392392.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "br3392392.bin" }
|
||||
]
|
||||
},
|
||||
{
|
||||
"description": "Test br3392392 (error)",
|
||||
"ref": "br3392392",
|
||||
"option": "-DERROR -o br3392392.bin",
|
||||
"target": [
|
||||
{ "stderr": "br3392392.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
}
|
||||
]
|
1
travis/test/br3392392.stderr
Normal file
1
travis/test/br3392392.stderr
Normal file
@ -0,0 +1 @@
|
||||
./travis/test/br3392392.asm:14: error: broadcast not allowed with register operand
|
5
travis/test/br3392396.asm
Normal file
5
travis/test/br3392396.asm
Normal file
@ -0,0 +1,5 @@
|
||||
bits 64
|
||||
vmovdqa32 [rdi],zmm16
|
||||
vmovdqa32 [rdi+64],zmm17
|
||||
vmovdqa32 [rdi+128],zmm18
|
||||
vmovdqa32 [rdi+192],zmm19
|
1
travis/test/br3392396.bin.t
Normal file
1
travis/test/br3392396.bin.t
Normal file
@ -0,0 +1 @@
|
||||
bá}Hbá}HObá}HWbá}H_
|
12
travis/test/br3392396.json
Normal file
12
travis/test/br3392396.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test br3392396",
|
||||
"id": "br3392396",
|
||||
"format": "bin",
|
||||
"source": "br3392396.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "br3392396.bin" }
|
||||
]
|
||||
}
|
||||
]
|
22
travis/test/br3392411.asm
Normal file
22
travis/test/br3392411.asm
Normal file
@ -0,0 +1,22 @@
|
||||
bits 64
|
||||
default rel
|
||||
|
||||
%use smartalign
|
||||
|
||||
section .text code align=32
|
||||
|
||||
align 32
|
||||
|
||||
nop
|
||||
jz LDone
|
||||
|
||||
%rep 10
|
||||
nop
|
||||
%endrep
|
||||
|
||||
align 16
|
||||
%rep 115
|
||||
nop
|
||||
%endrep
|
||||
|
||||
LDone:
|
12
travis/test/br3392411.json
Normal file
12
travis/test/br3392411.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Description of a test",
|
||||
"id": "br3392411",
|
||||
"format": "win64",
|
||||
"source": "br3392411.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "br3392411.out" }
|
||||
]
|
||||
}
|
||||
]
|
BIN
travis/test/br3392411.out.t
Normal file
BIN
travis/test/br3392411.out.t
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
19
travis/test/ifid.asm
Normal file
19
travis/test/ifid.asm
Normal file
@ -0,0 +1,19 @@
|
||||
; BR 3392715: Test proper operation of %ifid with $ and $$
|
||||
; This produces a human-readable file when compiled with -f bin
|
||||
|
||||
%define LF 10
|
||||
|
||||
%macro ifid 2
|
||||
%ifid %1
|
||||
%define %%is 'true'
|
||||
%else
|
||||
%define %%is 'false'
|
||||
%endif
|
||||
%defstr %%what %1
|
||||
%defstr %%should %2
|
||||
db '%ifid ', %%what, ' = ', %%is, ' (expect ', %%should, ')', LF
|
||||
%endmacro
|
||||
|
||||
ifid hello, true
|
||||
ifid $, false
|
||||
ifid $$, false
|
3
travis/test/ifid.bin.t
Normal file
3
travis/test/ifid.bin.t
Normal file
@ -0,0 +1,3 @@
|
||||
%ifid hello = true (expect true)
|
||||
%ifid $ = false (expect false)
|
||||
%ifid $$ = false (expect false)
|
11
travis/test/ifid.json
Normal file
11
travis/test/ifid.json
Normal file
@ -0,0 +1,11 @@
|
||||
[
|
||||
{
|
||||
"description": "BR 3392715: Test proper operation of %ifid with $ and $$",
|
||||
"id": "ifid",
|
||||
"format": "bin",
|
||||
"source": "ifid.asm",
|
||||
"target": [
|
||||
{ "output": "ifid.bin" }
|
||||
]
|
||||
}
|
||||
]
|
213
travis/test/lwp.asm
Normal file
213
travis/test/lwp.asm
Normal file
@ -0,0 +1,213 @@
|
||||
; LWP testcases from 2010/03/22 binutils change: no more 16-bit variants
|
||||
;------------------------------------------------------------------------
|
||||
|
||||
%define testcase3(x) x
|
||||
%define testcase3(x,y) y,x
|
||||
%define testcase3(x,y,z) z,y,x
|
||||
|
||||
%macro testcase 3.nolist ; uncomment one of the two, and compare the -f bin and -l output between them
|
||||
%ifdef BIN
|
||||
db %1
|
||||
%endif
|
||||
%ifdef SRC
|
||||
%2 testcase3(%3)
|
||||
%endif
|
||||
%endmacro
|
||||
|
||||
bits 32
|
||||
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0 }, { llwpcb }, { eax }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1 }, { llwpcb }, { ecx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2 }, { llwpcb }, { edx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3 }, { llwpcb }, { ebx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4 }, { llwpcb }, { esp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5 }, { llwpcb }, { ebp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6 }, { llwpcb }, { esi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7 }, { llwpcb }, { edi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf }, { slwpcb }, { edi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce }, { slwpcb }, { esi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd }, { slwpcb }, { ebp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc }, { slwpcb }, { esp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb }, { slwpcb }, { ebx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca }, { slwpcb }, { edx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9 }, { slwpcb }, { ecx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8 }, { slwpcb }, { eax }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,edi,eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,esi,ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ebp,edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,esp,ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ebx,esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,edx,ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ecx,esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,eax,edi }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,edi,eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,esi,ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ebp,edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,esp,ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ebx,esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,edx,ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ecx,esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,eax,edi }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[edi],eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[esi],ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ebp],edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[esp],ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ebx],esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[edx],ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ecx],esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[eax],edi }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[edi],eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[esi],ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ebp],edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[esp],ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ebx],esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[edx],ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ecx],esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[eax],edi }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+edi],eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+esi],ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ebp],edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+esp],ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ebx],esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+edx],ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ecx],esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+eax],edi }
|
||||
testcase { 0x8f, 0xea, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+edi],eax }
|
||||
testcase { 0x8f, 0xea, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+esi],ecx }
|
||||
testcase { 0x8f, 0xea, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ebp],edx }
|
||||
testcase { 0x8f, 0xea, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+esp],ebx }
|
||||
testcase { 0x8f, 0xea, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ebx],esp }
|
||||
testcase { 0x8f, 0xea, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+edx],ebp }
|
||||
testcase { 0x8f, 0xea, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ecx],esi }
|
||||
testcase { 0x8f, 0xea, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+eax],edi }
|
||||
|
||||
bits 64
|
||||
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc0 }, { llwpcb }, { eax }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc1 }, { llwpcb }, { ecx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc2 }, { llwpcb }, { edx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc3 }, { llwpcb }, { ebx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc4 }, { llwpcb }, { esp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc5 }, { llwpcb }, { ebp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc6 }, { llwpcb }, { esi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc7 }, { llwpcb }, { edi }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc0 }, { llwpcb }, { r8d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc1 }, { llwpcb }, { r9d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc2 }, { llwpcb }, { r10d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc3 }, { llwpcb }, { r11d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc4 }, { llwpcb }, { r12d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc5 }, { llwpcb }, { r13d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc6 }, { llwpcb }, { r14d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc7 }, { llwpcb }, { r15d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcf }, { slwpcb }, { r15d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xce }, { slwpcb }, { r14d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcd }, { slwpcb }, { r13d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcc }, { slwpcb }, { r12d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xcb }, { slwpcb }, { r11d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xca }, { slwpcb }, { r10d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc9 }, { slwpcb }, { r9d }
|
||||
testcase { 0x8f, 0xc9, 0x78, 0x12, 0xc8 }, { slwpcb }, { r8d }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcf }, { slwpcb }, { edi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xce }, { slwpcb }, { esi }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcd }, { slwpcb }, { ebp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcc }, { slwpcb }, { esp }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xcb }, { slwpcb }, { ebx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xca }, { slwpcb }, { edx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc9 }, { slwpcb }, { ecx }
|
||||
testcase { 0x8f, 0xe9, 0x78, 0x12, 0xc8 }, { slwpcb }, { eax }
|
||||
testcase { 0x8f, 0xca, 0x78, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r15d,eax }
|
||||
testcase { 0x8f, 0xca, 0x70, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r14d,ecx }
|
||||
testcase { 0x8f, 0xca, 0x68, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r13d,edx }
|
||||
testcase { 0x8f, 0xca, 0x60, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r12d,ebx }
|
||||
testcase { 0x8f, 0xca, 0x58, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r11d,esp }
|
||||
testcase { 0x8f, 0xca, 0x50, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r10d,ebp }
|
||||
testcase { 0x8f, 0xca, 0x48, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r9d,esi }
|
||||
testcase { 0x8f, 0xca, 0x40, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,r8d,edi }
|
||||
testcase { 0x8f, 0xea, 0x38, 0x12, 0xc7, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,edi,r8d }
|
||||
testcase { 0x8f, 0xea, 0x30, 0x12, 0xc6, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,esi,r9d }
|
||||
testcase { 0x8f, 0xea, 0x28, 0x12, 0xc5, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ebp,r10d }
|
||||
testcase { 0x8f, 0xea, 0x20, 0x12, 0xc4, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,esp,r11d }
|
||||
testcase { 0x8f, 0xea, 0x18, 0x12, 0xc3, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ebx,r12d }
|
||||
testcase { 0x8f, 0xea, 0x10, 0x12, 0xc2, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,edx,r13d }
|
||||
testcase { 0x8f, 0xea, 0x08, 0x12, 0xc1, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,ecx,r14d }
|
||||
testcase { 0x8f, 0xea, 0x00, 0x12, 0xc0, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,eax,r15d }
|
||||
testcase { 0x8f, 0xca, 0x78, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r15d,eax }
|
||||
testcase { 0x8f, 0xca, 0x70, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r14d,ecx }
|
||||
testcase { 0x8f, 0xca, 0x68, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r13d,edx }
|
||||
testcase { 0x8f, 0xca, 0x60, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r12d,ebx }
|
||||
testcase { 0x8f, 0xca, 0x58, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r11d,esp }
|
||||
testcase { 0x8f, 0xca, 0x50, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r10d,ebp }
|
||||
testcase { 0x8f, 0xca, 0x48, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r9d,esi }
|
||||
testcase { 0x8f, 0xca, 0x40, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,r8d,edi }
|
||||
testcase { 0x8f, 0xea, 0x38, 0x12, 0xcf, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,edi,r8d }
|
||||
testcase { 0x8f, 0xea, 0x30, 0x12, 0xce, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,esi,r9d }
|
||||
testcase { 0x8f, 0xea, 0x28, 0x12, 0xcd, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ebp,r10d }
|
||||
testcase { 0x8f, 0xea, 0x20, 0x12, 0xcc, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,esp,r11d }
|
||||
testcase { 0x8f, 0xea, 0x18, 0x12, 0xcb, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ebx,r12d }
|
||||
testcase { 0x8f, 0xea, 0x10, 0x12, 0xca, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,edx,r13d }
|
||||
testcase { 0x8f, 0xea, 0x08, 0x12, 0xc9, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,ecx,r14d }
|
||||
testcase { 0x8f, 0xea, 0x00, 0x12, 0xc8, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,eax,r15d }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r15d],eax }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r14d],ecx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r13d],edx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r12d],ebx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r11d],esp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r10d],ebp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r9d],esi }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[r8d],edi }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x07, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[edi],r8d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x06, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[esi],r9d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x45, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ebp],r10d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x04, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[esp],r11d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x03, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ebx],r12d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x02, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[edx],r13d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x01, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[ecx],r14d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[eax],r15d }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r15d],eax }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r14d],ecx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r13d],edx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r12d],ebx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r11d],esp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r10d],ebp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r9d],esi }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[r8d],edi }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x0f, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[edi],r8d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x0e, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[esi],r9d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x4d, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ebp],r10d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x0c, 0x24, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[esp],r11d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x0b, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ebx],r12d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x0a, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[edx],r13d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x09, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[ecx],r14d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x08, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[eax],r15d }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r15d],eax }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r14d],ecx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r13d],edx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r12d],ebx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r11d],esp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r10d],ebp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r9d],esi }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+r8d],edi }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x87, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+edi],r8d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x86, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+esi],r9d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x85, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ebp],r10d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x84, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+esp],r11d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x83, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ebx],r12d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x82, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+edx],r13d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x81, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+ecx],r14d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x80, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpins }, { 0x12345678,[0xcafe+eax],r15d }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x78, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r15d],eax }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x70, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r14d],ecx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x68, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r13d],edx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x60, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r12d],ebx }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x58, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r11d],esp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x50, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r10d],ebp }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x48, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r9d],esi }
|
||||
testcase { 0x67, 0x8f, 0xca, 0x40, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+r8d],edi }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x38, 0x12, 0x8f, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+edi],r8d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x30, 0x12, 0x8e, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+esi],r9d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x28, 0x12, 0x8d, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ebp],r10d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x20, 0x12, 0x8c, 0x24, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+esp],r11d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x18, 0x12, 0x8b, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ebx],r12d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x10, 0x12, 0x8a, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+edx],r13d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x08, 0x12, 0x89, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+ecx],r14d }
|
||||
testcase { 0x67, 0x8f, 0xea, 0x00, 0x12, 0x88, 0xfe, 0xca, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12 }, { lwpval }, { 0x12345678,[0xcafe+eax],r15d }
|
BIN
travis/test/lwp.bin.t
Normal file
BIN
travis/test/lwp.bin.t
Normal file
Binary file not shown.
12
travis/test/lwp.json
Normal file
12
travis/test/lwp.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test LWP instructions",
|
||||
"id": "lwp",
|
||||
"format": "bin",
|
||||
"source": "lwp.asm",
|
||||
"option": "-Ox -DSRC",
|
||||
"target": [
|
||||
{ "output": "lwp.bin" }
|
||||
]
|
||||
}
|
||||
]
|
Binary file not shown.
1
travis/test/ret-16.stderr
Normal file
1
travis/test/ret-16.stderr
Normal file
@ -0,0 +1 @@
|
||||
./travis/test/ret.asm:18: error: expression syntax error
|
1
travis/test/ret-32.stderr
Normal file
1
travis/test/ret-32.stderr
Normal file
@ -0,0 +1 @@
|
||||
./travis/test/ret.asm:37: error: expression syntax error
|
1
travis/test/ret-64.stderr
Normal file
1
travis/test/ret-64.stderr
Normal file
@ -0,0 +1 @@
|
||||
./travis/test/ret.asm:53: error: expression syntax error
|
61
travis/test/ret.asm
Normal file
61
travis/test/ret.asm
Normal file
@ -0,0 +1,61 @@
|
||||
;; All the flavors of RET
|
||||
%ifndef ERROR
|
||||
%define ERROR 0
|
||||
%endif
|
||||
|
||||
%ifdef TEST_BITS_16
|
||||
bits 16
|
||||
|
||||
ret
|
||||
retn
|
||||
retf
|
||||
retw
|
||||
retnw
|
||||
retfw
|
||||
retd
|
||||
retnd
|
||||
retfd
|
||||
%if ERROR
|
||||
retq
|
||||
retnq
|
||||
retfq
|
||||
%endif
|
||||
%endif
|
||||
|
||||
%ifdef TEST_BITS_32
|
||||
bits 32
|
||||
|
||||
ret
|
||||
retn
|
||||
retf
|
||||
retw
|
||||
retnw
|
||||
retfw
|
||||
retd
|
||||
retnd
|
||||
retfd
|
||||
%if ERROR
|
||||
retq
|
||||
retnq
|
||||
retfq
|
||||
%endif
|
||||
%endif
|
||||
|
||||
%ifdef TEST_BITS_64
|
||||
bits 64
|
||||
|
||||
ret
|
||||
retn
|
||||
retf ; Probably should have been RETFQ, but: legacy...
|
||||
retw
|
||||
retnw
|
||||
retfw
|
||||
%if ERROR
|
||||
retd
|
||||
retnd
|
||||
%endif
|
||||
%endif
|
||||
retfd
|
||||
retq
|
||||
retnq
|
||||
retfq
|
1
travis/test/ret.bin.t
Normal file
1
travis/test/ret.bin.t
Normal file
@ -0,0 +1 @@
|
||||
テテヒテテヒfテfテfヒテテヒfテfテfヒテテヒテテヒfテfテfヒヒテテHヒ
|
39
travis/test/ret.json
Normal file
39
travis/test/ret.json
Normal file
@ -0,0 +1,39 @@
|
||||
[
|
||||
{
|
||||
"description": "Test all the flavors of RET",
|
||||
"id": "ret",
|
||||
"format": "bin",
|
||||
"source": "ret.asm",
|
||||
"option": "-Ox -DTEST_BITS_16 -DTEST_BITS_32 -DTEST_BITS_64",
|
||||
"target": [
|
||||
{ "output": "ret.bin" }
|
||||
]
|
||||
},
|
||||
{
|
||||
"description": "Test all the flavors of RET (err 16 bit)",
|
||||
"ref": "ret",
|
||||
"option": "-DERROR -DTEST_BITS_16 -o ret.bin",
|
||||
"target": [
|
||||
{ "stderr": "ret-16.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
},
|
||||
{
|
||||
"description": "Test all the flavors of RET (err 32 bit)",
|
||||
"ref": "ret",
|
||||
"option": "-DERROR -DTEST_BITS_32 -o ret.bin",
|
||||
"target": [
|
||||
{ "stderr": "ret-32.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
},
|
||||
{
|
||||
"description": "Test all the flavors of RET (err 64 bit)",
|
||||
"ref": "ret",
|
||||
"option": "-DERROR -DTEST_BITS_64 -o ret.bin",
|
||||
"target": [
|
||||
{ "stderr": "ret-64.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
}
|
||||
]
|
65
travis/test/sreg.asm
Normal file
65
travis/test/sreg.asm
Normal file
@ -0,0 +1,65 @@
|
||||
bits 64
|
||||
mov es,rax
|
||||
mov ss,rax
|
||||
mov ds,rax
|
||||
mov fs,rax
|
||||
mov gs,rax
|
||||
mov es,eax
|
||||
mov ss,eax
|
||||
mov ds,eax
|
||||
mov fs,eax
|
||||
mov gs,eax
|
||||
mov es,ax
|
||||
mov ss,ax
|
||||
mov ds,ax
|
||||
mov fs,ax
|
||||
mov gs,ax
|
||||
mov es,[rsi]
|
||||
mov ss,[rsi]
|
||||
mov ds,[rsi]
|
||||
mov fs,[rsi]
|
||||
mov gs,[rsi]
|
||||
mov es,word [rsi]
|
||||
mov ss,word [rsi]
|
||||
mov ds,word [rsi]
|
||||
mov fs,word [rsi]
|
||||
mov gs,word [rsi]
|
||||
mov es,qword [rsi]
|
||||
mov ss,qword [rsi]
|
||||
mov ds,qword [rsi]
|
||||
mov fs,qword [rsi]
|
||||
mov gs,qword [rsi]
|
||||
mov rax,es
|
||||
mov rax,cs
|
||||
mov rax,ss
|
||||
mov rax,ds
|
||||
mov rax,fs
|
||||
mov rax,gs
|
||||
mov eax,es
|
||||
mov eax,ss
|
||||
mov eax,ds
|
||||
mov eax,fs
|
||||
mov eax,fs
|
||||
mov ax,es
|
||||
mov ax,ss
|
||||
mov ax,ds
|
||||
mov ax,fs
|
||||
mov ax,gs
|
||||
mov [rdi],es
|
||||
mov [rdi],cs
|
||||
mov [rdi],ss
|
||||
mov [rdi],ds
|
||||
mov [rdi],fs
|
||||
mov [rdi],gs
|
||||
mov word [rdi],es
|
||||
mov word [rdi],cs
|
||||
mov word [rdi],ss
|
||||
mov word [rdi],ds
|
||||
mov word [rdi],fs
|
||||
mov word [rdi],gs
|
||||
mov qword [rdi],es
|
||||
mov qword [rdi],cs
|
||||
mov qword [rdi],ss
|
||||
mov qword [rdi],ds
|
||||
mov qword [rdi],fs
|
||||
mov qword [rdi],gs
|
1
travis/test/sreg.bin.t
Normal file
1
travis/test/sreg.bin.t
Normal file
@ -0,0 +1 @@
|
||||
ŽÀŽÐŽØŽàŽèŽÀŽÐŽØŽàŽèŽÀŽÐŽØŽàŽèŽŽŽŽ&Ž.ŽŽŽŽ&Ž.HŽHŽHŽHŽ&HŽ.ŒÀŒÈŒÐŒØŒàŒèŒÀŒÐŒØŒàŒàfŒÀfŒÐfŒØfŒàfŒèŒŒŒŒŒ'Œ/ŒŒŒŒŒ'Œ/HŒHŒHŒHŒHŒ'HŒ/
|
12
travis/test/sreg.json
Normal file
12
travis/test/sreg.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test segment registers in 64 bit mode",
|
||||
"id": "sreg",
|
||||
"format": "bin",
|
||||
"source": "sreg.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "sreg.bin" }
|
||||
]
|
||||
}
|
||||
]
|
@ -1,10 +1,12 @@
|
||||
{
|
||||
"description": "Test abuse the section flags which breaks NASM 0.98.37",
|
||||
"format": "elf",
|
||||
"source": "tmap.asm",
|
||||
"option": "-DLINUX",
|
||||
"target": [
|
||||
{ "output": "tmap.o" },
|
||||
{ "stderr": "tmap.o.stderr" }
|
||||
]
|
||||
}
|
||||
[
|
||||
{
|
||||
"description": "Test abuse the section flags which breaks NASM 0.98.37",
|
||||
"format": "elf",
|
||||
"source": "tmap.asm",
|
||||
"option": "-Ox -DLINUX",
|
||||
"target": [
|
||||
{ "output": "tmap.o" },
|
||||
{ "stderr": "tmap.stderr" }
|
||||
]
|
||||
}
|
||||
]
|
||||
|
16
travis/test/v4.asm
Normal file
16
travis/test/v4.asm
Normal file
@ -0,0 +1,16 @@
|
||||
bits 64
|
||||
|
||||
v4fmaddps zmm0,zmm1+3,[rax]
|
||||
v4fnmaddps zmm2,zmm3,[rax]
|
||||
v4fmaddss zmm4,zmm5+3,[rax]
|
||||
v4fnmaddss zmm6,zmm7+3,[rax]
|
||||
|
||||
v4dpwssds zmm8,zmm9,[rax]
|
||||
v4dpwssd zmm10,zmm11+3,[rax]
|
||||
v4dpwssd zmm10+0,zmm11+3,[rax]
|
||||
|
||||
%ifdef ERROR
|
||||
v4dpwssd zmm10+1,zmm11+3,[rax]
|
||||
v4dpwssd zmm10,zmm11+4,[rax]
|
||||
v4dpwssd zmm10,zmm11+7,[rax]
|
||||
%endif
|
BIN
travis/test/v4.bin.t
Normal file
BIN
travis/test/v4.bin.t
Normal file
Binary file not shown.
21
travis/test/v4.json
Normal file
21
travis/test/v4.json
Normal file
@ -0,0 +1,21 @@
|
||||
[
|
||||
{
|
||||
"description": "Test v4 instructions",
|
||||
"id": "v4",
|
||||
"format": "bin",
|
||||
"source": "v4.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "v4.bin" }
|
||||
]
|
||||
},
|
||||
{
|
||||
"description": "Test v4 instructions (error)",
|
||||
"ref": "v4",
|
||||
"option": "-DERROR -o v4.bin",
|
||||
"target": [
|
||||
{ "stderr": "v4.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
}
|
||||
]
|
3
travis/test/v4.stderr
Normal file
3
travis/test/v4.stderr
Normal file
@ -0,0 +1,3 @@
|
||||
./travis/test/v4.asm:13: error: register set not valid for operand
|
||||
./travis/test/v4.asm:14: error: invalid register set size
|
||||
./travis/test/v4.asm:15: error: invalid register set size
|
20
travis/test/vaesenc.asm
Normal file
20
travis/test/vaesenc.asm
Normal file
@ -0,0 +1,20 @@
|
||||
bits 64
|
||||
aesenc xmm0,xmm4
|
||||
vaesenc zmm0,zmm0,zmm4
|
||||
vpclmullqlqdq zmm1,zmm1,zmm5
|
||||
vpclmulqdq zmm0, zmm1, zmm2, 0
|
||||
vaesenclast zmm0, zmm1, zmm2
|
||||
|
||||
bits 32
|
||||
aesenc xmm0,xmm4
|
||||
vaesenc zmm0,zmm0,zmm4
|
||||
vpclmullqlqdq zmm1,zmm1,zmm5
|
||||
vpclmulqdq zmm0, zmm1, zmm2, 0
|
||||
vaesenclast zmm0, zmm1, zmm2
|
||||
|
||||
bits 16
|
||||
aesenc xmm0,xmm4
|
||||
vaesenc zmm0,zmm0,zmm4
|
||||
vpclmullqlqdq zmm1,zmm1,zmm5
|
||||
vpclmulqdq zmm0, zmm1, zmm2, 0
|
||||
vaesenclast zmm0, zmm1, zmm2
|
BIN
travis/test/vaesenc.bin.t
Normal file
BIN
travis/test/vaesenc.bin.t
Normal file
Binary file not shown.
12
travis/test/vaesenc.json
Normal file
12
travis/test/vaesenc.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test AES inctructions (BR 3392454, 3392460)",
|
||||
"id": "vaesenc",
|
||||
"format": "bin",
|
||||
"source": "vaesenc.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "vaesenc.bin" }
|
||||
]
|
||||
}
|
||||
]
|
9
travis/test/vex.asm
Normal file
9
travis/test/vex.asm
Normal file
@ -0,0 +1,9 @@
|
||||
bits 64
|
||||
vcomisd xmm0,xmm31
|
||||
vcomisd xmm0,xmm1
|
||||
{vex2} vcomisd xmm0,xmm1
|
||||
{vex3} vcomisd xmm0,xmm1
|
||||
{evex} vcomisd xmm0,xmm1
|
||||
%ifdef ERROR
|
||||
{vex3} add eax,edx
|
||||
%endif
|
1
travis/test/vex.bin.t
Normal file
1
travis/test/vex.bin.t
Normal file
@ -0,0 +1 @@
|
||||
b<EFBFBD><EFBFBD>/<2F><><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD>y/<EFBFBD>b<EFBFBD><EFBFBD>/<EFBFBD>
|
21
travis/test/vex.json
Normal file
21
travis/test/vex.json
Normal file
@ -0,0 +1,21 @@
|
||||
[
|
||||
{
|
||||
"description": "Test VEX2/VEX3/EVEX prefix",
|
||||
"id": "vex",
|
||||
"format": "bin",
|
||||
"source": "vex.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "vex.bin" }
|
||||
]
|
||||
},
|
||||
{
|
||||
"description": "Test VEX3 prefix error",
|
||||
"ref": "vex",
|
||||
"option": "-Ox -DERROR -o vex.bin.err",
|
||||
"target": [
|
||||
{ "stderr": "vex.stderr" }
|
||||
],
|
||||
"error": "expected"
|
||||
}
|
||||
]
|
1
travis/test/vex.stderr
Normal file
1
travis/test/vex.stderr
Normal file
@ -0,0 +1 @@
|
||||
./travis/test/vex.asm:8: error: specific encoding scheme not available
|
76
travis/test/vgather.asm
Normal file
76
travis/test/vgather.asm
Normal file
@ -0,0 +1,76 @@
|
||||
bits 64
|
||||
|
||||
vgatherdpd xmm0,[rcx+xmm2],xmm3
|
||||
vgatherqpd xmm0,[rcx+xmm2],xmm3
|
||||
vgatherdpd ymm0,[rcx+xmm2],ymm3
|
||||
vgatherqpd ymm0,[rcx+ymm2],ymm3
|
||||
|
||||
vgatherdpd xmm0,[rcx+xmm2*1],xmm3
|
||||
vgatherqpd xmm0,[rcx+xmm2*1],xmm3
|
||||
vgatherdpd ymm0,[rcx+xmm2*1],ymm3
|
||||
vgatherqpd ymm0,[rcx+ymm2*1],ymm3
|
||||
|
||||
vgatherdpd xmm0,[rcx+xmm2*2],xmm3
|
||||
vgatherqpd xmm0,[rcx+xmm2*2],xmm3
|
||||
vgatherdpd ymm0,[rcx+xmm2*2],ymm3
|
||||
vgatherqpd ymm0,[rcx+ymm2*2],ymm3
|
||||
|
||||
vgatherdpd xmm0,[rcx+xmm2*4],xmm3
|
||||
vgatherqpd xmm0,[rcx+xmm2*4],xmm3
|
||||
vgatherdpd ymm0,[rcx+xmm2*4],ymm3
|
||||
vgatherqpd ymm0,[rcx+ymm2*4],ymm3
|
||||
|
||||
vgatherdpd xmm0,[rcx+xmm2*8],xmm3
|
||||
vgatherqpd xmm0,[rcx+xmm2*8],xmm3
|
||||
vgatherdpd ymm0,[rcx+xmm2*8],ymm3
|
||||
vgatherqpd ymm0,[rcx+ymm2*8],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2],xmm3
|
||||
vgatherqpd xmm0,[xmm2],xmm3
|
||||
vgatherdpd ymm0,[xmm2],ymm3
|
||||
vgatherqpd ymm0,[ymm2],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*1],xmm3
|
||||
vgatherqpd xmm0,[xmm2*1],xmm3
|
||||
vgatherdpd ymm0,[xmm2*1],ymm3
|
||||
vgatherqpd ymm0,[ymm2*1],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*2],xmm3
|
||||
vgatherqpd xmm0,[xmm2*2],xmm3
|
||||
vgatherdpd ymm0,[xmm2*2],ymm3
|
||||
vgatherqpd ymm0,[ymm2*2],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*4],xmm3
|
||||
vgatherqpd xmm0,[xmm2*4],xmm3
|
||||
vgatherdpd ymm0,[xmm2*4],ymm3
|
||||
vgatherqpd ymm0,[ymm2*4],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*8],xmm3
|
||||
vgatherqpd xmm0,[xmm2*8],xmm3
|
||||
vgatherdpd ymm0,[xmm2*8],ymm3
|
||||
vgatherqpd ymm0,[ymm2*8],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2+rcx],xmm3
|
||||
vgatherqpd xmm0,[xmm2+rcx],xmm3
|
||||
vgatherdpd ymm0,[xmm2+rcx],ymm3
|
||||
vgatherqpd ymm0,[ymm2+rcx],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*1+rcx],xmm3
|
||||
vgatherqpd xmm0,[xmm2*1+rcx],xmm3
|
||||
vgatherdpd ymm0,[xmm2*1+rcx],ymm3
|
||||
vgatherqpd ymm0,[ymm2*1+rcx],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*2+rcx],xmm3
|
||||
vgatherqpd xmm0,[xmm2*2+rcx],xmm3
|
||||
vgatherdpd ymm0,[xmm2*2+rcx],ymm3
|
||||
vgatherqpd ymm0,[ymm2*2+rcx],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*4+rcx],xmm3
|
||||
vgatherqpd xmm0,[xmm2*4+rcx],xmm3
|
||||
vgatherdpd ymm0,[xmm2*4+rcx],ymm3
|
||||
vgatherqpd ymm0,[ymm2*4+rcx],ymm3
|
||||
|
||||
vgatherdpd xmm0,[xmm2*8+rcx],xmm3
|
||||
vgatherqpd xmm0,[xmm2*8+rcx],xmm3
|
||||
vgatherdpd ymm0,[xmm2*8+rcx],ymm3
|
||||
vgatherqpd ymm0,[ymm2*8+rcx],ymm3
|
BIN
travis/test/vgather.bin.t
Normal file
BIN
travis/test/vgather.bin.t
Normal file
Binary file not shown.
12
travis/test/vgather.json
Normal file
12
travis/test/vgather.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test vgather instruction",
|
||||
"id": "vgather",
|
||||
"format": "bin",
|
||||
"source": "vgather.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "vgather.bin" }
|
||||
]
|
||||
}
|
||||
]
|
28
travis/test/vpcmp.asm
Normal file
28
travis/test/vpcmp.asm
Normal file
@ -0,0 +1,28 @@
|
||||
bits 64
|
||||
|
||||
vpcmpeqb k2{k2},zmm0,zmm1
|
||||
vpcmpgtb k2{k2},zmm0,zmm1
|
||||
vpcmpeqw k2{k2},zmm0,zmm1
|
||||
vpcmpgtw k2{k2},zmm0,zmm1
|
||||
vpcmpeqd k2{k2},zmm0,zmm1
|
||||
vpcmpgtd k2{k2},zmm0,zmm1
|
||||
vpcmpeqq k2{k2},zmm0,zmm1
|
||||
vpcmpgtq k2{k2},zmm0,zmm1
|
||||
|
||||
vpcmpb k2{k2},zmm0,zmm1,0
|
||||
vpcmpb k2{k2},zmm0,zmm1,6
|
||||
vpcmpw k2{k2},zmm0,zmm1,0
|
||||
vpcmpw k2{k2},zmm0,zmm1,6
|
||||
vpcmpd k2{k2},zmm0,zmm1,0
|
||||
vpcmpd k2{k2},zmm0,zmm1,6
|
||||
vpcmpq k2{k2},zmm0,zmm1,0
|
||||
vpcmpq k2{k2},zmm0,zmm1,6
|
||||
|
||||
vpcmpneqb k2{k2},zmm0,zmm1
|
||||
vpcmpleb k2{k2},zmm0,zmm1
|
||||
vpcmpneqw k2{k2},zmm0,zmm1
|
||||
vpcmplew k2{k2},zmm0,zmm1
|
||||
vpcmpneqd k2{k2},zmm0,zmm1
|
||||
vpcmpled k2{k2},zmm0,zmm1
|
||||
vpcmpneqq k2{k2},zmm0,zmm1
|
||||
vpcmpleq k2{k2},zmm0,zmm1
|
BIN
travis/test/vpcmp.bin.t
Normal file
BIN
travis/test/vpcmp.bin.t
Normal file
Binary file not shown.
12
travis/test/vpcmp.json
Normal file
12
travis/test/vpcmp.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test vpcmp instruction",
|
||||
"id": "vpcmp",
|
||||
"format": "bin",
|
||||
"source": "vpcmp.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "vpcmp.bin" }
|
||||
]
|
||||
}
|
||||
]
|
10
travis/test/warnstack.asm
Normal file
10
travis/test/warnstack.asm
Normal file
@ -0,0 +1,10 @@
|
||||
%warning "Good warning"
|
||||
[warning push]
|
||||
[warning -user]
|
||||
%warning "Bad warning"
|
||||
[warning pop]
|
||||
%warning "Good warning"
|
||||
[warning -user]
|
||||
%warning "Bad warning"
|
||||
[warning pop] ; should warn but reset all
|
||||
%warning "Good warning"
|
0
travis/test/warnstack.bin.t
Normal file
0
travis/test/warnstack.bin.t
Normal file
13
travis/test/warnstack.json
Normal file
13
travis/test/warnstack.json
Normal file
@ -0,0 +1,13 @@
|
||||
[
|
||||
{
|
||||
"description": "Test warning stack",
|
||||
"id": "warnstack",
|
||||
"format": "bin",
|
||||
"source": "warnstack.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "warnstack.bin" },
|
||||
{ "stderr": "warnstack.stderr" }
|
||||
]
|
||||
}
|
||||
]
|
4
travis/test/warnstack.stderr
Normal file
4
travis/test/warnstack.stderr
Normal file
@ -0,0 +1,4 @@
|
||||
./travis/test/warnstack.asm:1: warning: Good warning [-w+user]
|
||||
./travis/test/warnstack.asm:6: warning: Good warning [-w+user]
|
||||
./travis/test/warnstack.asm:9: warning: warning stack empty [-w+warn-stack-empty]
|
||||
./travis/test/warnstack.asm:10: warning: Good warning [-w+user]
|
45
travis/test/winalign.asm
Normal file
45
travis/test/winalign.asm
Normal file
@ -0,0 +1,45 @@
|
||||
section .pdata rdata align=2
|
||||
dd 1
|
||||
dd 2
|
||||
dd 3
|
||||
|
||||
section .rdata align=16
|
||||
dd 4
|
||||
dd 5
|
||||
dd 6
|
||||
|
||||
section ultra
|
||||
dd 10
|
||||
dd 11
|
||||
dd 12
|
||||
|
||||
section infra rdata
|
||||
dd 20
|
||||
dd 21
|
||||
dd 22
|
||||
|
||||
section omega rdata align=1
|
||||
dd 90
|
||||
dd 91
|
||||
dd 92
|
||||
|
||||
section .xdata
|
||||
dd 7
|
||||
dd 8
|
||||
dd 9
|
||||
|
||||
section ultra align=8
|
||||
dd 13
|
||||
dd 14
|
||||
dd 15
|
||||
|
||||
section infra rdata align=1
|
||||
dd 23
|
||||
dd 24
|
||||
dd 25
|
||||
|
||||
section omega rdata
|
||||
sectalign 2
|
||||
dd 93
|
||||
dd 94
|
||||
dd 95
|
13
travis/test/winalign.json
Normal file
13
travis/test/winalign.json
Normal file
@ -0,0 +1,13 @@
|
||||
[
|
||||
{
|
||||
"description": "COFF alignment based on BR3392692",
|
||||
"id": "winalign",
|
||||
"format": "win64",
|
||||
"source": "winalign.asm",
|
||||
"error": "over",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "winalign.obj" }
|
||||
]
|
||||
}
|
||||
]
|
BIN
travis/test/winalign.obj.t
Normal file
BIN
travis/test/winalign.obj.t
Normal file
Binary file not shown.
15
travis/test/xdefine.asm
Normal file
15
travis/test/xdefine.asm
Normal file
@ -0,0 +1,15 @@
|
||||
%idefine d dword
|
||||
%define _1digits_nocheck(d) (((d)% 10)+'0')
|
||||
%xdefine _1digits(d) (!!(d/10)*(1<<32)+ _1digits_nocheck(d))
|
||||
|
||||
db _1digits(8) ; Should be 0x38
|
||||
|
||||
%define n 0x21
|
||||
%xdefine ctr n
|
||||
%define n 0x22
|
||||
|
||||
db ctr, n ; Should be 0x21, 0x22
|
||||
|
||||
%define MNSUFFIX
|
||||
%define MNCURRENT TEST%[MNSUFFIX]
|
||||
%xdefine var MNCURRENT
|
1
travis/test/xdefine.bin.t
Normal file
1
travis/test/xdefine.bin.t
Normal file
@ -0,0 +1 @@
|
||||
8!"
|
12
travis/test/xdefine.json
Normal file
12
travis/test/xdefine.json
Normal file
@ -0,0 +1,12 @@
|
||||
[
|
||||
{
|
||||
"description": "Test weird defines",
|
||||
"id": "xdefine",
|
||||
"format": "bin",
|
||||
"source": "xdefine.asm",
|
||||
"option": "-Ox",
|
||||
"target": [
|
||||
{ "output": "xdefine.bin" }
|
||||
]
|
||||
}
|
||||
]
|
6
travis/test/xpaste.asm
Normal file
6
travis/test/xpaste.asm
Normal file
@ -0,0 +1,6 @@
|
||||
%iassign OWORD_size 16 ; octo-word
|
||||
%idefine sizeof(_x_) _x_%+_size
|
||||
|
||||
%define ptr eax+sizeof(oword)
|
||||
|
||||
movdqa [ptr], xmm1
|
1
travis/test/xpaste.bin.t
Normal file
1
travis/test/xpaste.bin.t
Normal file
@ -0,0 +1 @@
|
||||
gfH
|
11
travis/test/xpaste.json
Normal file
11
travis/test/xpaste.json
Normal file
@ -0,0 +1,11 @@
|
||||
[
|
||||
{
|
||||
"description": "Test preproc xdefine",
|
||||
"id": "xpaste",
|
||||
"source": "xpaste.asm",
|
||||
"option": "-f bin -Ox",
|
||||
"target": [
|
||||
{ "output": "xpaste.bin" }
|
||||
]
|
||||
}
|
||||
]
|
Loading…
x
Reference in New Issue
Block a user