From ba5a39a5c33db1b637ee0f6934c860f09eea18fe Mon Sep 17 00:00:00 2001
From: Cyrill Gorcunov <gorcunov@gmail.com>
Date: Sun, 4 Nov 2018 18:34:47 +0300
Subject: [PATCH] test: nasm-t -- Add floatexp test

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 travis/test/floatexp-o0.bin.t | Bin 0 -> 2523 bytes
 travis/test/floatexp-ox.bin.t | Bin 0 -> 2268 bytes
 travis/test/floatexp.asm      | 379 ++++++++++++++++++++++++++++++++++
 travis/test/floatexp.json     |  20 ++
 4 files changed, 399 insertions(+)
 create mode 100644 travis/test/floatexp-o0.bin.t
 create mode 100644 travis/test/floatexp-ox.bin.t
 create mode 100644 travis/test/floatexp.asm
 create mode 100644 travis/test/floatexp.json

diff --git a/travis/test/floatexp-o0.bin.t b/travis/test/floatexp-o0.bin.t
new file mode 100644
index 0000000000000000000000000000000000000000..e8e37a4ca1a590aa0ad446c8dc9c4e27d065c1a4
GIT binary patch
literal 2523
zcmbVMO=uHA6rPYO_=7?aQbF5_Vm&DIpb$!RQ%P{~pb~@FgW#cT4jzPhFwxL%E=s}D
zMhb#AgOY=nCGjw5VRP`{rJ{#|dhzFAu^x;Ov7jctnSC?6lZ-K#Vcvf4dvE5=yf=AH
z%!xVFAuw#mfZ;k5FkU<RVBB{$!nomNVXQlO7&(iQF`P^AB{*%1rVX5~MGs_fu3EGZ
z#d*h~gW%66_>(-&U+|swW+)F^+J+P^AVQ?DDY4hUio&HsCtjSF;uQ^t`-Y_`(@HZ$
zq=2==o{^#jsK!(fAuyN#*{^PBkSjPsG{{Eo%x|$ah+yrLON&#*56Ni_YMS)Z=AHc)
z?^Qz@R4{3Nn|Ce^5^+g=Mw}{uT7p}bR)#{}EhR^w5-mgcYBX2cpmxFgcWClF_F8aH
zjRt#0FXXaA6T52`UA@vp`)1PQ%Y~b%lLPY>?cdr(yJgZhSIgBca6j*4f7RqU`EAuq
zs9H<j9nRVEZK!#<Y}<v1HG!;l=UlNOnB5*Z|1KiNiYBg}gSaELv)8XJA9`%kMm=5`
zwOK8C;-D_O%Fl=yo-LVl&-Mq4V*{)@J#kQ}$^FCQ^SSC5lb*^%`HSq4>%1=s)J5b#
z&-v99ezs;U=diNE5B7sMCHh_*u$VFS)+{;)wz-2AjW9fka|e9WIQ!5B9Pej-k0Wu`
zd3*uw4Sw`dsc0~9l!+ruB%~N+=(rRyhPVqij4<`IDlUuXq-$>^F04BA&X87~j)m;G
z!wt?cRPoU<=Eu0(d_NVXq+d!}8G5^P7gj{1wIX-%S41S&7#A^gsFIc^wSx_)v#AB{
z37*}wCO;W}p-@`<gW6B4rJ{_0+E33Dwa<#SiQk!^P1U|Do*NWTrWJmCT=C+4RXo)Q
z>MrjU&p~C+u3AE7kO-t{Cq%~uvMAT~$_2A5;<h)#*-Ub8dtAn0-g$}GTE<~+6b`fg
nPYyGw_+eE#xaSX9v=FqhWsa~yil6Q*x)@k9Wi8g~|G2~-jw1+Q

literal 0
HcmV?d00001

diff --git a/travis/test/floatexp-ox.bin.t b/travis/test/floatexp-ox.bin.t
new file mode 100644
index 0000000000000000000000000000000000000000..32d1b9f8867630b110f4ee793d847a9370b1fe72
GIT binary patch
literal 2268
zcma)6J!lj`6rLlA5EX?WTm(%bim^~gp>TxgUL=Qug-Q%!3c(_53JXCCFM1?<jS?^<
zk$_<5p`@@`?kpY}*c28v5iJ60qp>iU6#0>0Ae!~P*_qj$%ev-<_xAhdy?OKAo4Ii_
zZpH<d;c#3Fhv)X<_~ahJ@yy+U<G!26vF;Xd4A{Urq)g$LNpWoGv7~r59P5`dZ$mLH
z<*^OT=r08QSwYHg{0;_^Dqu**(#k``m{txjX92BJdC+q1{Z*|#LQPF=t5%ax-b^vA
za4mC&wDJ*66GfFm14l@|Wh(}G!YGuoGDo6If7FU7@;JP{F>!1BTW&B0ZF2arbARLY
zr<GI;Dnelo7EOu^jcKXf*m9U@h<ugRx}GDH3M$fb47=`I$~T4ub>dM3Esp}7fU^({
z62m+W>1zY|mfnNYHq75nU_UwJK8!u+KHoHIL*woQ_K?HpJCl`NSP&(Zz;vFXJhOC@
z`MMF9rytrR3z`>1F;3pM5^3bF2)|J2{pc!E5#o4e&3Id=$DwWd^1Zt=Cth(_UCx%<
z9ct>f=CHvBCf_n%GhE_uXz%lhjwWjJw&t+qeMeh6M+YiPaG^hq>HdRqVa8gFvY0;<
zt#S+XqgKasCQ9vB4fBWa(ABGxMXV%4m%)Y+w2d6Mp@DFplzsT^ky0ydI47=l_`<L(
z<q@jjY~f{T+#+?F)G1P3TD228t5t@Oa1n+!q8CkdQxy{TxUj6U#-Xo4LgX@*zjAWb
zQm7oFGivUU2t|G&>ehbU+Dhol)D!e;(AKh!60T^_bE}<dk2qBBA*=W~(Z^xy3lk|3
zJ(JjGP&gf!2=2V8l*V;%$u>m#OtM9T)r)eK&17qaXPx0mtoZBuY_Q*o;c4z*Mwv4_
zn~j)>tV{Gxb<lhbSQQO!DpStMRJKrr*Lw{2=MG1L65R;z7|}(O){8%f*pjSObj@_G
iGo7iI?_SWd)DnjofmX~FRl8Nin=_r8&G7%BU4H?yIr;ej

literal 0
HcmV?d00001

diff --git a/travis/test/floatexp.asm b/travis/test/floatexp.asm
new file mode 100644
index 00000000..3e4a558c
--- /dev/null
+++ b/travis/test/floatexp.asm
@@ -0,0 +1,379 @@
+	bits 64
+;
+; Test of floating-point formats
+;
+
+; 8-bit
+	mov al,__float8__(1.0)
+	mov al,__float8__(+1.0)
+	mov al,__float8__(-1.0)
+	mov al,__float8__(0.0)
+	mov al,__float8__(+0.0)
+	mov al,__float8__(-0.0)
+	mov al,__float8__(1.83203125)
+	mov al,__float8__(+1.83203125)
+	mov al,__float8__(-1.83203125)
+	mov al,__float8__(1.83203125e1)
+	mov al,__float8__(+1.83203125e1)
+	mov al,__float8__(-1.83203125e1)
+	mov al,__float8__(1.83203125e-1)
+	mov al,__float8__(+1.83203125e-1)
+	mov al,__float8__(-1.83203125e-1)
+	mov al,__float8__(1.13203125e-2)		; Denormal!
+	mov al,__float8__(+1.13203125e-2)		; Denormal!
+	mov al,__float8__(-1.13203125e-2)		; Denormal!
+	mov al,__float8__(__Infinity__)
+	mov al,__float8__(+__Infinity__)
+	mov al,__float8__(-__Infinity__)
+	mov al,__float8__(__NaN__)
+	mov al,__float8__(__QNaN__)
+	mov al,__float8__(__SNaN__)
+
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(+1.0)
+	mov ax,__float16__(-1.0)
+	mov ax,__float16__(0.0)
+	mov ax,__float16__(+0.0)
+	mov ax,__float16__(-0.0)
+	mov ax,__float16__(1.83203125)
+	mov ax,__float16__(+1.83203125)
+	mov ax,__float16__(-1.83203125)
+	mov ax,__float16__(1.83203125e3)
+	mov ax,__float16__(+1.83203125e3)
+	mov ax,__float16__(-1.83203125e3)
+	mov ax,__float16__(1.83203125e-3)
+	mov ax,__float16__(+1.83203125e-3)
+	mov ax,__float16__(-1.83203125e-3)
+	mov ax,__float16__(1.83203125e-6)		; Denormal!
+	mov ax,__float16__(+1.83203125e-6)		; Denormal!
+	mov ax,__float16__(-1.83203125e-6)		; Denormal!
+	mov ax,__float16__(__Infinity__)
+	mov ax,__float16__(+__Infinity__)
+	mov ax,__float16__(-__Infinity__)
+	mov ax,__float16__(__NaN__)
+	mov ax,__float16__(__QNaN__)
+	mov ax,__float16__(__SNaN__)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(+1.0)
+	mov eax,__float32__(-1.0)
+	mov eax,__float32__(0.0)
+	mov eax,__float32__(+0.0)
+	mov eax,__float32__(-0.0)
+	mov eax,__float32__(1.83203125)
+	mov eax,__float32__(+1.83203125)
+	mov eax,__float32__(-1.83203125)
+	mov eax,__float32__(1.83203125e15)
+	mov eax,__float32__(+1.83203125e15)
+	mov eax,__float32__(-1.83203125e15)
+	mov eax,__float32__(1.83203125e-15)
+	mov eax,__float32__(+1.83203125e-15)
+	mov eax,__float32__(-1.83203125e-15)
+	mov eax,__float32__(1.83203125e-40)		; Denormal!
+	mov eax,__float32__(+1.83203125e-40)		; Denormal!
+	mov eax,__float32__(-1.83203125e-40)		; Denormal!
+	mov eax,__float32__(__Infinity__)
+	mov eax,__float32__(+__Infinity__)
+	mov eax,__float32__(-__Infinity__)
+	mov eax,__float32__(__NaN__)
+	mov eax,__float32__(__QNaN__)
+	mov eax,__float32__(__SNaN__)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(+1.0)
+	mov rax,__float64__(-1.0)
+	mov rax,__float64__(0.0)
+	mov rax,__float64__(+0.0)
+	mov rax,__float64__(-0.0)
+	mov rax,__float64__(1.83203125)
+	mov rax,__float64__(+1.83203125)
+	mov rax,__float64__(-1.83203125)
+	mov rax,__float64__(1.83203125e300)
+	mov rax,__float64__(+1.83203125e300)
+	mov rax,__float64__(-1.83203125e300)
+	mov rax,__float64__(1.83203125e-300)
+	mov rax,__float64__(+1.83203125e-300)
+	mov rax,__float64__(-1.83203125e-300)
+	mov rax,__float64__(1.83203125e-320)		; Denormal!
+	mov rax,__float64__(+1.83203125e-320)		; Denormal!
+	mov rax,__float64__(-1.83203125e-320)		; Denormal!
+	mov rax,__float64__(__Infinity__)
+	mov rax,__float64__(+__Infinity__)
+	mov rax,__float64__(-__Infinity__)
+	mov rax,__float64__(__NaN__)
+	mov rax,__float64__(__QNaN__)
+	mov rax,__float64__(__SNaN__)
+
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(+1.0)
+	mov ax,__float80e__(+1.0)
+	mov rax,__float80m__(-1.0)
+	mov ax,__float80e__(-1.0)
+	mov rax,__float80m__(0.0)
+	mov ax,__float80e__(0.0)
+	mov rax,__float80m__(+0.0)
+	mov ax,__float80e__(+0.0)
+	mov rax,__float80m__(-0.0)
+	mov ax,__float80e__(-0.0)
+	mov rax,__float80m__(1.83203125)
+	mov ax,__float80e__(1.83203125)
+	mov rax,__float80m__(+1.83203125)
+	mov ax,__float80e__(+1.83203125)
+	mov rax,__float80m__(-1.83203125)
+	mov ax,__float80e__(-1.83203125)
+	mov rax,__float80m__(1.83203125e+4000)
+	mov ax,__float80e__(1.83203125e+4000)
+	mov rax,__float80m__(+1.83203125e+4000)
+	mov ax,__float80e__(+1.83203125e+4000)
+	mov rax,__float80m__(-1.83203125e+4000)
+	mov ax,__float80e__(-1.83203125e+4000)
+	mov rax,__float80m__(1.83203125e-4000)
+	mov ax,__float80e__(1.83203125e-4000)
+	mov rax,__float80m__(+1.83203125e-4000)
+	mov ax,__float80e__(+1.83203125e-4000)
+	mov rax,__float80m__(-1.83203125e-4000)
+	mov ax,__float80e__(-1.83203125e-4000)
+	mov rax,__float80m__(1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(+1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(-1.83203125e-4940)		; Denormal!
+	mov ax,__float80e__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float80m__(__Infinity__)
+	mov ax,__float80e__(__Infinity__)
+	mov rax,__float80m__(+__Infinity__)
+	mov ax,__float80e__(+__Infinity__)
+	mov rax,__float80m__(-__Infinity__)
+	mov ax,__float80e__(-__Infinity__)
+	mov rax,__float80m__(__NaN__)
+	mov ax,__float80e__(__NaN__)
+	mov rax,__float80m__(__QNaN__)
+	mov ax,__float80e__(__QNaN__)
+	mov rax,__float80m__(__SNaN__)
+	mov ax,__float80e__(__SNaN__)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(+1.0)
+	mov rax,__float128h__(+1.0)
+	mov rax,__float128l__(-1.0)
+	mov rax,__float128h__(-1.0)
+	mov rax,__float128l__(0.0)
+	mov rax,__float128h__(0.0)
+	mov rax,__float128l__(+0.0)
+	mov rax,__float128h__(+0.0)
+	mov rax,__float128l__(-0.0)
+	mov rax,__float128h__(-0.0)
+	mov rax,__float128l__(1.83203125)
+	mov rax,__float128h__(1.83203125)
+	mov rax,__float128l__(+1.83203125)
+	mov rax,__float128h__(+1.83203125)
+	mov rax,__float128l__(-1.83203125)
+	mov rax,__float128h__(-1.83203125)
+	mov rax,__float128l__(1.83203125e+4000)
+	mov rax,__float128h__(1.83203125e+4000)
+	mov rax,__float128l__(+1.83203125e+4000)
+	mov rax,__float128h__(+1.83203125e+4000)
+	mov rax,__float128l__(-1.83203125e+4000)
+	mov rax,__float128h__(-1.83203125e+4000)
+	mov rax,__float128l__(1.83203125e-4000)
+	mov rax,__float128h__(1.83203125e-4000)
+	mov rax,__float128l__(+1.83203125e-4000)
+	mov rax,__float128h__(+1.83203125e-4000)
+	mov rax,__float128l__(-1.83203125e-4000)
+	mov rax,__float128h__(-1.83203125e-4000)
+	mov rax,__float128l__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(+1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128h__(-1.83203125e-4940)		; Denormal!
+	mov rax,__float128l__(__Infinity__)
+	mov rax,__float128h__(__Infinity__)
+	mov rax,__float128l__(+__Infinity__)
+	mov rax,__float128h__(+__Infinity__)
+	mov rax,__float128l__(-__Infinity__)
+	mov rax,__float128h__(-__Infinity__)
+	mov rax,__float128l__(__NaN__)
+	mov rax,__float128h__(__NaN__)
+	mov rax,__float128l__(__QNaN__)
+	mov rax,__float128h__(__QNaN__)
+	mov rax,__float128l__(__SNaN__)
+	mov rax,__float128h__(__SNaN__)
+
+;
+; Test hexadecimal floating-point numbers
+;
+
+; 16-bit
+	mov ax,__float16__(1.0)
+	mov ax,__float16__(0x1.0)
+	mov ax,__float16__(2.0)
+	mov ax,__float16__(0x2.0)
+	mov ax,__float16__(0x1.0p+1)
+	mov ax,__float16__(0x1.0p-1)
+	mov ax,__float16__(0x0.0)
+	mov ax,__float16__(0x1.23456789)
+	mov ax,__float16__(0x0.123456789)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x1.23456789p10)
+	mov ax,__float16__(0x1.23456789p+10)
+	mov ax,__float16__(0x1.23456789p-10)
+	mov ax,__float16__(0x0.123456789p10)
+	mov ax,__float16__(0x0.123456789p+10)
+	mov ax,__float16__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float16__(0x0.0000123456789)
+	mov ax,__float16__(0x0.0000123456789p+10)
+	mov ax,__float16__(0x0.0000123456789p-10)
+
+; 32-bit
+	mov eax,__float32__(1.0)
+	mov eax,__float32__(0x1.0)
+	mov eax,__float32__(2.0)
+	mov eax,__float32__(0x2.0)
+	mov eax,__float32__(0x1.0p+1)
+	mov eax,__float32__(0x1.0p-1)
+	mov eax,__float32__(0x0.0)
+	mov eax,__float32__(0x1.23456789)
+	mov eax,__float32__(0x0.123456789)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x1.23456789p10)
+	mov eax,__float32__(0x1.23456789p+10)
+	mov eax,__float32__(0x1.23456789p-10)
+	mov eax,__float32__(0x0.123456789p10)
+	mov eax,__float32__(0x0.123456789p+10)
+	mov eax,__float32__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov eax,__float32__(0x0.0000123456789)
+	mov eax,__float32__(0x0.0000123456789p+10)
+	mov eax,__float32__(0x0.0000123456789p-10)
+	mov eax,__float32__(0x123456789.0)
+	mov eax,__float32__(0x0000123456789.0)
+	mov eax,__float32__(0x123456789.0p+0)
+	mov eax,__float32__(0x123456789.0p+64)
+
+; 64-bit
+	mov rax,__float64__(1.0)
+	mov rax,__float64__(0x1.0)
+	mov rax,__float64__(2.0)
+	mov rax,__float64__(0x2.0)
+	mov rax,__float64__(0x1.0p+1)
+	mov rax,__float64__(0x1.0p-1)
+	mov rax,__float64__(0x0.0)
+	mov rax,__float64__(0x1.23456789)
+	mov rax,__float64__(0x0.123456789)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x1.23456789p10)
+	mov rax,__float64__(0x1.23456789p+10)
+	mov rax,__float64__(0x1.23456789p-10)
+	mov rax,__float64__(0x0.123456789p10)
+	mov rax,__float64__(0x0.123456789p+10)
+	mov rax,__float64__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float64__(0x0.0000123456789)
+	mov rax,__float64__(0x0.0000123456789p+10)
+	mov rax,__float64__(0x0.0000123456789p-10)
+	mov rax,__float64__(0x123456789.0)
+	mov rax,__float64__(0x0000123456789.0)
+	mov rax,__float64__(0x123456789.0p+0)
+	mov rax,__float64__(0x123456789.0p+300)
+
+; 80-bit
+	mov rax,__float80m__(1.0)
+	mov ax,__float80e__(1.0)
+	mov rax,__float80m__(0x1.0)
+	mov ax,__float80e__(0x1.0)
+	mov rax,__float80m__(2.0)
+	mov ax,__float80e__(2.0)
+	mov rax,__float80m__(0x2.0)
+	mov ax,__float80e__(0x2.0)
+	mov rax,__float80m__(0x1.0p+1)
+	mov ax,__float80e__(0x1.0p+1)
+	mov rax,__float80m__(0x1.0p-1)
+	mov ax,__float80e__(0x1.0p-1)
+	mov rax,__float80m__(0x0.0)
+	mov ax,__float80e__(0x0.0)
+	mov rax,__float80m__(0x1.23456789)
+	mov ax,__float80e__(0x1.23456789)
+	mov rax,__float80m__(0x0.123456789)
+	mov ax,__float80e__(0x0.123456789)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x1.23456789p10)
+	mov ax,__float80e__(0x1.23456789p10)
+	mov rax,__float80m__(0x1.23456789p+10)
+	mov ax,__float80e__(0x1.23456789p+10)
+	mov rax,__float80m__(0x1.23456789p-10)
+	mov ax,__float80e__(0x1.23456789p-10)
+	mov rax,__float80m__(0x0.123456789p10)
+	mov ax,__float80e__(0x0.123456789p10)
+	mov rax,__float80m__(0x0.123456789p+10)
+	mov ax,__float80e__(0x0.123456789p+10)
+	mov rax,__float80m__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov ax,__float80e__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float80m__(0x0.0000123456789)
+	mov ax,__float80e__(0x0.0000123456789)
+	mov rax,__float80m__(0x0.0000123456789p+10)
+	mov ax,__float80e__(0x0.0000123456789p+10)
+	mov rax,__float80m__(0x0.0000123456789p-10)
+	mov ax,__float80e__(0x0.0000123456789p-10)
+	mov rax,__float80m__(0x123456789.0)
+	mov ax,__float80e__(0x123456789.0)
+	mov rax,__float80m__(0x0000123456789.0)
+	mov ax,__float80e__(0x0000123456789.0)
+	mov rax,__float80m__(0x123456789.0p+0)
+	mov ax,__float80e__(0x123456789.0p+0)
+	mov rax,__float80m__(0x123456789.0p+1024)
+	mov ax,__float80e__(0x123456789.0p+1024)
+
+; 128-bit
+	mov rax,__float128l__(1.0)
+	mov rax,__float128h__(1.0)
+	mov rax,__float128l__(0x1.0)
+	mov rax,__float128h__(0x1.0)
+	mov rax,__float128l__(2.0)
+	mov rax,__float128h__(2.0)
+	mov rax,__float128l__(0x2.0)
+	mov rax,__float128h__(0x2.0)
+	mov rax,__float128l__(0x1.0p+1)
+	mov rax,__float128h__(0x1.0p+1)
+	mov rax,__float128l__(0x1.0p-1)
+	mov rax,__float128h__(0x1.0p-1)
+	mov rax,__float128l__(0x0.0)
+	mov rax,__float128h__(0x0.0)
+	mov rax,__float128l__(0x1.23456789)
+	mov rax,__float128h__(0x1.23456789)
+	mov rax,__float128l__(0x0.123456789)
+	mov rax,__float128h__(0x0.123456789)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x1.23456789p10)
+	mov rax,__float128h__(0x1.23456789p10)
+	mov rax,__float128l__(0x1.23456789p+10)
+	mov rax,__float128h__(0x1.23456789p+10)
+	mov rax,__float128l__(0x1.23456789p-10)
+	mov rax,__float128h__(0x1.23456789p-10)
+	mov rax,__float128l__(0x0.123456789p10)
+	mov rax,__float128h__(0x0.123456789p10)
+	mov rax,__float128l__(0x0.123456789p+10)
+	mov rax,__float128h__(0x0.123456789p+10)
+	mov rax,__float128l__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128h__(0x0.123456789abcdef0123456789abcdef012345p-10)
+	mov rax,__float128l__(0x0.0000123456789)
+	mov rax,__float128h__(0x0.0000123456789)
+	mov rax,__float128l__(0x0.0000123456789p+10)
+	mov rax,__float128h__(0x0.0000123456789p+10)
+	mov rax,__float128l__(0x0.0000123456789p-10)
+	mov rax,__float128h__(0x0.0000123456789p-10)
+	mov rax,__float128l__(0x123456789.0)
+	mov rax,__float128h__(0x123456789.0)
+	mov rax,__float128l__(0x0000123456789.0)
+	mov rax,__float128h__(0x0000123456789.0)
+	mov rax,__float128l__(0x123456789.0p+0)
+	mov rax,__float128h__(0x123456789.0p+0)
+	mov rax,__float128l__(0x123456789.0p+1024)
+	mov rax,__float128h__(0x123456789.0p+1024)
diff --git a/travis/test/floatexp.json b/travis/test/floatexp.json
new file mode 100644
index 00000000..201fb4b2
--- /dev/null
+++ b/travis/test/floatexp.json
@@ -0,0 +1,20 @@
+[
+	{
+		"description": "Test of floating-point formats (-Ox)",
+		"id": "floatexp",
+		"format": "bin",
+		"source": "floatexp.asm",
+		"option": "-Ox",
+		"target": [
+			{ "output": "floatexp-ox.bin" }
+		]
+	},
+	{
+		"description": "Test of floating-point formats (-O0)",
+		"ref": "floatexp",
+		"option": "-O0",
+		"target": [
+			{ "output": "floatexp-o0.bin" }
+		]
+	}
+]